1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 248469c2dSAdrian Alonso /* 348469c2dSAdrian Alonso * Copyright (C) 2015 Freescale Semiconductor, Inc 448469c2dSAdrian Alonso * Peng Fan <Peng.Fan@freescale.com> 548469c2dSAdrian Alonso */ 648469c2dSAdrian Alonso #ifndef __PFUZE3000_PMIC_H_ 748469c2dSAdrian Alonso #define __PFUZE3000_PMIC_H_ 848469c2dSAdrian Alonso 948469c2dSAdrian Alonso /* PFUZE3000 registers */ 1048469c2dSAdrian Alonso enum { 1148469c2dSAdrian Alonso PFUZE3000_DEVICEID = 0x00, 1248469c2dSAdrian Alonso 1348469c2dSAdrian Alonso PFUZE3000_REVID = 0x03, 1448469c2dSAdrian Alonso PFUZE3000_FABID = 0x04, 1548469c2dSAdrian Alonso PFUZE3000_INTSTAT0 = 0x05, 1648469c2dSAdrian Alonso PFUZE3000_INTMASK0 = 0x06, 1748469c2dSAdrian Alonso PFUZE3000_INTSENSE0 = 0x07, 1848469c2dSAdrian Alonso PFUZE3000_INTSTAT1 = 0x08, 1948469c2dSAdrian Alonso PFUZE3000_INTMASK1 = 0x09, 2048469c2dSAdrian Alonso PFUZE3000_INTSENSE1 = 0x0A, 2148469c2dSAdrian Alonso 2248469c2dSAdrian Alonso PFUZE3000_INTSTAT3 = 0x0E, 2348469c2dSAdrian Alonso PFUZE3000_INTMASK3 = 0x0F, 2448469c2dSAdrian Alonso PFUZE3000_INTSENSE3 = 0x10, 2548469c2dSAdrian Alonso PFUZE3000_INTSTAT4 = 0x11, 2648469c2dSAdrian Alonso PFUZE3000_INTMASK4 = 0x12, 2748469c2dSAdrian Alonso PFUZE3000_INTSENSE4 = 0x13, 2848469c2dSAdrian Alonso 2948469c2dSAdrian Alonso PFUZE3000_COINCTL = 0x1A, 3048469c2dSAdrian Alonso PFUZE3000_PWRCTL = 0x1B, 3148469c2dSAdrian Alonso PFUZE3000_MEMA = 0x1C, 3248469c2dSAdrian Alonso PFUZE3000_MEMB = 0x1D, 3348469c2dSAdrian Alonso PFUZE3000_MEMC = 0x1E, 3448469c2dSAdrian Alonso PFUZE3000_MEMD = 0x1F, 3548469c2dSAdrian Alonso 3648469c2dSAdrian Alonso PFUZE3000_SW1AVOLT = 0x20, 3748469c2dSAdrian Alonso PFUZE3000_SW1ASTBY = 0x21, 3848469c2dSAdrian Alonso PFUZE3000_SW1AOFF = 0x22, 3948469c2dSAdrian Alonso PFUZE3000_SW1AMODE = 0x23, 4048469c2dSAdrian Alonso PFUZE3000_SW1ACONF = 0x24, 4148469c2dSAdrian Alonso 4248469c2dSAdrian Alonso PFUZE3000_SW1BVOLT = 0x2E, 4348469c2dSAdrian Alonso PFUZE3000_SW1BSTBY = 0x2F, 4448469c2dSAdrian Alonso PFUZE3000_SW1BOFF = 0x30, 4548469c2dSAdrian Alonso PFUZE3000_SW1BMODE = 0x31, 4648469c2dSAdrian Alonso PFUZE3000_SW1BCONF = 0x32, 4748469c2dSAdrian Alonso 4848469c2dSAdrian Alonso PFUZE3000_SW2VOLT = 0x35, 4948469c2dSAdrian Alonso PFUZE3000_SW2STBY = 0x36, 5048469c2dSAdrian Alonso PFUZE3000_SW2OFF = 0x37, 5148469c2dSAdrian Alonso PFUZE3000_SW2MODE = 0x38, 5248469c2dSAdrian Alonso PFUZE3000_SW2CONF = 0x39, 5348469c2dSAdrian Alonso 5448469c2dSAdrian Alonso PFUZE3000_SW3VOLT = 0x3C, 5548469c2dSAdrian Alonso PFUZE3000_SW3STBY = 0x3D, 5648469c2dSAdrian Alonso PFUZE3000_SW3OFF = 0x3E, 5748469c2dSAdrian Alonso PFUZE3000_SW3MODE = 0x3F, 5848469c2dSAdrian Alonso PFUZE3000_SW3CONF = 0x40, 5948469c2dSAdrian Alonso 6048469c2dSAdrian Alonso PFUZE3000_SWBSTCTL = 0x66, 6148469c2dSAdrian Alonso 6248469c2dSAdrian Alonso PFUZE3000_LDOGCTL = 0x69, 6348469c2dSAdrian Alonso PFUZE3000_VREFDDRCTL = 0x6A, 6448469c2dSAdrian Alonso PFUZE3000_VSNVSCTL = 0x6B, 6548469c2dSAdrian Alonso PFUZE3000_VLDO1CTL = 0x6C, 6648469c2dSAdrian Alonso PFUZE3000_VLDO2CTL = 0x6D, 6748469c2dSAdrian Alonso PFUZE3000_VCC_SDCTL = 0x6E, 6848469c2dSAdrian Alonso PFUZE3000_V33CTL = 0x6F, 6948469c2dSAdrian Alonso PFUZE3000_VLDO3CTL = 0x70, 7048469c2dSAdrian Alonso PFUZE3000_VLD4CTL = 0x71, 7148469c2dSAdrian Alonso 7248469c2dSAdrian Alonso PMIC_NUM_OF_REGS = 0x7F, 7348469c2dSAdrian Alonso }; 7448469c2dSAdrian Alonso 7548469c2dSAdrian Alonso int power_pfuze3000_init(unsigned char bus); 7648469c2dSAdrian Alonso 77894a4b4dSBreno Lima /* Voltage Configuration */ 78894a4b4dSBreno Lima #define PFUZE3000_SW1AB_SETP(x) ((x - 7000) / 250) 79894a4b4dSBreno Lima #define PFUZE3000_SW3_SETP(x) ((x - 9000) / 500) 80894a4b4dSBreno Lima #define PFUZE3000_VLDO_SETP(x) ((x - 8000) / 500) 81894a4b4dSBreno Lima 8248469c2dSAdrian Alonso #endif 83