1 /* 2 * Copyright (C) 2014 Gateworks Corporation 3 * Tim Harvey <tharvey@gateworks.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __PFUZE100_PMIC_H_ 9 #define __PFUZE100_PMIC_H_ 10 11 /* Device ID */ 12 enum {PFUZE100 = 0x10, PFUZE200 = 0x11, PFUZE3000 = 0x30}; 13 14 #define PFUZE100_REGULATOR_DRIVER "pfuze100_regulator" 15 16 /* PFUZE100 registers */ 17 enum { 18 PFUZE100_DEVICEID = 0x00, 19 PFUZE100_REVID = 0x03, 20 PFUZE100_FABID = 0x04, 21 22 PFUZE100_SW1ABVOL = 0x20, 23 PFUZE100_SW1ABSTBY = 0x21, 24 PFUZE100_SW1ABOFF = 0x22, 25 PFUZE100_SW1ABMODE = 0x23, 26 PFUZE100_SW1ABCONF = 0x24, 27 PFUZE100_SW1CVOL = 0x2e, 28 PFUZE100_SW1CSTBY = 0x2f, 29 PFUZE100_SW1COFF = 0x30, 30 PFUZE100_SW1CMODE = 0x31, 31 PFUZE100_SW1CCONF = 0x32, 32 PFUZE100_SW2VOL = 0x35, 33 PFUZE100_SW2STBY = 0x36, 34 PFUZE100_SW2OFF = 0x37, 35 PFUZE100_SW2MODE = 0x38, 36 PFUZE100_SW2CONF = 0x39, 37 PFUZE100_SW3AVOL = 0x3c, 38 PFUZE100_SW3ASTBY = 0x3D, 39 PFUZE100_SW3AOFF = 0x3E, 40 PFUZE100_SW3AMODE = 0x3F, 41 PFUZE100_SW3ACONF = 0x40, 42 PFUZE100_SW3BVOL = 0x43, 43 PFUZE100_SW3BSTBY = 0x44, 44 PFUZE100_SW3BOFF = 0x45, 45 PFUZE100_SW3BMODE = 0x46, 46 PFUZE100_SW3BCONF = 0x47, 47 PFUZE100_SW4VOL = 0x4a, 48 PFUZE100_SW4STBY = 0x4b, 49 PFUZE100_SW4OFF = 0x4c, 50 PFUZE100_SW4MODE = 0x4d, 51 PFUZE100_SW4CONF = 0x4e, 52 PFUZE100_SWBSTCON1 = 0x66, 53 PFUZE100_VREFDDRCON = 0x6a, 54 PFUZE100_VSNVSVOL = 0x6b, 55 PFUZE100_VGEN1VOL = 0x6c, 56 PFUZE100_VGEN2VOL = 0x6d, 57 PFUZE100_VGEN3VOL = 0x6e, 58 PFUZE100_VGEN4VOL = 0x6f, 59 PFUZE100_VGEN5VOL = 0x70, 60 PFUZE100_VGEN6VOL = 0x71, 61 62 PFUZE100_NUM_OF_REGS = 0x7f, 63 }; 64 65 /* Registor offset based on VOLT register */ 66 #define PFUZE100_VOL_OFFSET 0 67 #define PFUZE100_STBY_OFFSET 1 68 #define PFUZE100_OFF_OFFSET 2 69 #define PFUZE100_MODE_OFFSET 3 70 #define PFUZE100_CONF_OFFSET 4 71 72 /* 73 * Buck Regulators 74 */ 75 76 #define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250) 77 78 /* SW1A/B/C Output Voltage Configuration */ 79 #define SW1x_0_300V 0 80 #define SW1x_0_325V 1 81 #define SW1x_0_350V 2 82 #define SW1x_0_375V 3 83 #define SW1x_0_400V 4 84 #define SW1x_0_425V 5 85 #define SW1x_0_450V 6 86 #define SW1x_0_475V 7 87 #define SW1x_0_500V 8 88 #define SW1x_0_525V 9 89 #define SW1x_0_550V 10 90 #define SW1x_0_575V 11 91 #define SW1x_0_600V 12 92 #define SW1x_0_625V 13 93 #define SW1x_0_650V 14 94 #define SW1x_0_675V 15 95 #define SW1x_0_700V 16 96 #define SW1x_0_725V 17 97 #define SW1x_0_750V 18 98 #define SW1x_0_775V 19 99 #define SW1x_0_800V 20 100 #define SW1x_0_825V 21 101 #define SW1x_0_850V 22 102 #define SW1x_0_875V 23 103 #define SW1x_0_900V 24 104 #define SW1x_0_925V 25 105 #define SW1x_0_950V 26 106 #define SW1x_0_975V 27 107 #define SW1x_1_000V 28 108 #define SW1x_1_025V 29 109 #define SW1x_1_050V 30 110 #define SW1x_1_075V 31 111 #define SW1x_1_100V 32 112 #define SW1x_1_125V 33 113 #define SW1x_1_150V 34 114 #define SW1x_1_175V 35 115 #define SW1x_1_200V 36 116 #define SW1x_1_225V 37 117 #define SW1x_1_250V 38 118 #define SW1x_1_275V 39 119 #define SW1x_1_300V 40 120 #define SW1x_1_325V 41 121 #define SW1x_1_350V 42 122 #define SW1x_1_375V 43 123 #define SW1x_1_400V 44 124 #define SW1x_1_425V 45 125 #define SW1x_1_450V 46 126 #define SW1x_1_475V 47 127 #define SW1x_1_500V 48 128 #define SW1x_1_525V 49 129 #define SW1x_1_550V 50 130 #define SW1x_1_575V 51 131 #define SW1x_1_600V 52 132 #define SW1x_1_625V 53 133 #define SW1x_1_650V 54 134 #define SW1x_1_675V 55 135 #define SW1x_1_700V 56 136 #define SW1x_1_725V 57 137 #define SW1x_1_750V 58 138 #define SW1x_1_775V 59 139 #define SW1x_1_800V 60 140 #define SW1x_1_825V 61 141 #define SW1x_1_850V 62 142 #define SW1x_1_875V 63 143 144 #define SW1x_NORMAL_MASK 0x3f 145 #define SW1x_STBY_MASK 0x3f 146 #define SW1x_OFF_MASK 0x3f 147 148 #define SW_MODE_MASK 0xf 149 #define SW_MODE_SHIFT 0 150 151 #define SW1xCONF_DVSSPEED_MASK 0xc0 152 #define SW1xCONF_DVSSPEED_2US 0x00 153 #define SW1xCONF_DVSSPEED_4US 0x40 154 #define SW1xCONF_DVSSPEED_8US 0x80 155 #define SW1xCONF_DVSSPEED_16US 0xc0 156 157 /* 158 * LDO Configuration 159 */ 160 161 /* VGEN1/2 Voltage Configuration */ 162 #define LDOA_0_80V 0 163 #define LDOA_0_85V 1 164 #define LDOA_0_90V 2 165 #define LDOA_0_95V 3 166 #define LDOA_1_00V 4 167 #define LDOA_1_05V 5 168 #define LDOA_1_10V 6 169 #define LDOA_1_15V 7 170 #define LDOA_1_20V 8 171 #define LDOA_1_25V 9 172 #define LDOA_1_30V 10 173 #define LDOA_1_35V 11 174 #define LDOA_1_40V 12 175 #define LDOA_1_45V 13 176 #define LDOA_1_50V 14 177 #define LDOA_1_55V 15 178 179 /* VGEN3/4/5/6 Voltage Configuration */ 180 #define LDOB_1_80V 0 181 #define LDOB_1_90V 1 182 #define LDOB_2_00V 2 183 #define LDOB_2_10V 3 184 #define LDOB_2_20V 4 185 #define LDOB_2_30V 5 186 #define LDOB_2_40V 6 187 #define LDOB_2_50V 7 188 #define LDOB_2_60V 8 189 #define LDOB_2_70V 9 190 #define LDOB_2_80V 10 191 #define LDOB_2_90V 11 192 #define LDOB_3_00V 12 193 #define LDOB_3_10V 13 194 #define LDOB_3_20V 14 195 #define LDOB_3_30V 15 196 197 #define LDO_VOL_MASK 0xf 198 #define LDO_EN (1 << 4) 199 #define LDO_MODE_SHIFT 4 200 #define LDO_MODE_MASK (1 << 4) 201 #define LDO_MODE_OFF 0 202 #define LDO_MODE_ON 1 203 204 #define VREFDDRCON_EN (1 << 4) 205 /* 206 * Boost Regulator 207 */ 208 209 /* SWBST Output Voltage */ 210 #define SWBST_5_00V 0 211 #define SWBST_5_05V 1 212 #define SWBST_5_10V 2 213 #define SWBST_5_15V 3 214 215 #define SWBST_VOL_MASK 0x3 216 #define SWBST_MODE_MASK 0xC 217 #define SWBST_MODE_SHIFT 0x2 218 #define SWBST_MODE_OFF 0 219 #define SWBST_MODE_PFM 1 220 #define SWBST_MODE_AUTO 2 221 #define SWBST_MODE_APS 3 222 223 /* 224 * Regulator Mode Control 225 * 226 * OFF: The regulator is switched off and the output voltage is discharged. 227 * PFM: In this mode, the regulator is always in PFM mode, which is useful 228 * at light loads for optimized efficiency. 229 * PWM: In this mode, the regulator is always in PWM mode operation 230 * regardless of load conditions. 231 * APS: In this mode, the regulator moves automatically between pulse 232 * skipping mode and PWM mode depending on load conditions. 233 * 234 * SWxMODE[3:0] 235 * Normal Mode | Standby Mode | value 236 * OFF OFF 0x0 237 * PWM OFF 0x1 238 * PFM OFF 0x3 239 * APS OFF 0x4 240 * PWM PWM 0x5 241 * PWM APS 0x6 242 * APS APS 0x8 243 * APS PFM 0xc 244 * PWM PFM 0xd 245 */ 246 #define OFF_OFF 0x0 247 #define PWM_OFF 0x1 248 #define PFM_OFF 0x3 249 #define APS_OFF 0x4 250 #define PWM_PWM 0x5 251 #define PWM_APS 0x6 252 #define APS_APS 0x8 253 #define APS_PFM 0xc 254 #define PWM_PFM 0xd 255 256 #define SWITCH_SIZE 0x7 257 258 int power_pfuze100_init(unsigned char bus); 259 #endif 260