xref: /openbmc/u-boot/include/power/max8997_muic.h (revision 274bced8)
1 /*
2  *  Copyright (C) 2012 Samsung Electronics
3  *  Lukasz Majewski <l.majewski@samsung.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __MAX8997_MUIC_H_
9 #define __MAX8997_MUIC_H_
10 
11 #include <power/power_chrg.h>
12 
13 /* MAX8997_MUIC_STATUS2 */
14 #define MAX8997_MUIC_CHG_NO	0x00
15 #define MAX8997_MUIC_CHG_USB	0x01
16 #define MAX8997_MUIC_CHG_USB_D	0x02
17 #define MAX8997_MUIC_CHG_TA	0x03
18 #define MAX8997_MUIC_CHG_TA_500 0x04
19 #define MAX8997_MUIC_CHG_TA_1A	0x05
20 #define MAX8997_MUIC_CHG_MASK	0x07
21 
22 /* MAX 8997 MUIC registers */
23 enum {
24 	MAX8997_MUIC_ID         = 0x00,
25 	MAX8997_MUIC_INT1	= 0x01,
26 	MAX8997_MUIC_INT2	= 0x02,
27 	MAX8997_MUIC_INT3	= 0x03,
28 	MAX8997_MUIC_STATUS1	= 0x04,
29 	MAX8997_MUIC_STATUS2	= 0x05,
30 	MAX8997_MUIC_STATUS3	= 0x06,
31 	MAX8997_MUIC_INTMASK1	= 0x07,
32 	MAX8997_MUIC_INTMASK2	= 0x08,
33 	MAX8997_MUIC_INTMASK3	= 0x09,
34 	MAX8997_MUIC_CDETCTRL	= 0x0A,
35 	MAX8997_MUIC_CONTROL1	= 0x0C,
36 	MAX8997_MUIC_CONTROL2	= 0x0D,
37 	MAX8997_MUIC_CONTROL3	= 0x0E,
38 
39 	MUIC_NUM_OF_REGS = 0x0F,
40 };
41 
42 #define MAX8997_MUIC_I2C_ADDR	(0x4A >> 1)
43 
44 int power_muic_init(unsigned int bus);
45 #endif /* __MAX8997_MUIC_H_ */
46