1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2242b2f0cSPeter Griffin /* 3242b2f0cSPeter Griffin * (C) Copyright 2015 Linaro 4242b2f0cSPeter Griffin * Peter Griffin <peter.griffin@linaro.org> 5242b2f0cSPeter Griffin */ 6242b2f0cSPeter Griffin 7242b2f0cSPeter Griffin #ifndef __HI6553_PMIC_H__ 8242b2f0cSPeter Griffin #define __HI6553_PMIC_H__ 9242b2f0cSPeter Griffin 10242b2f0cSPeter Griffin /* Registers */ 11242b2f0cSPeter Griffin enum { 12242b2f0cSPeter Griffin HI6553_VERSION_REG = 0x000, 13242b2f0cSPeter Griffin HI6553_ENABLE2_LDO1_8 = 0x029, 14242b2f0cSPeter Griffin HI6553_DISABLE2_LDO1_8, 15242b2f0cSPeter Griffin HI6553_ONOFF_STATUS2_LDO1_8, 16242b2f0cSPeter Griffin HI6553_ENABLE3_LDO9_16, 17242b2f0cSPeter Griffin HI6553_DISABLE3_LDO9_16, 18242b2f0cSPeter Griffin HI6553_ONOFF_STATUS3_LDO9_16, 19242b2f0cSPeter Griffin 20242b2f0cSPeter Griffin HI6553_DISABLE6_XO_CLK = 0x036, 21242b2f0cSPeter Griffin HI6553_PERI_EN_MARK = 0x040, 22242b2f0cSPeter Griffin HI6553_BUCK2_REG1 = 0x04a, 23242b2f0cSPeter Griffin HI6553_BUCK2_REG5 = 0x04e, 24242b2f0cSPeter Griffin HI6553_BUCK2_REG6, 25242b2f0cSPeter Griffin 26242b2f0cSPeter Griffin HI6553_BUCK3_REG3 = 0x054, 27242b2f0cSPeter Griffin HI6553_BUCK3_REG5 = 0x056, 28242b2f0cSPeter Griffin HI6553_BUCK3_REG6, 29242b2f0cSPeter Griffin HI6553_BUCK4_REG2 = 0x05b, 30242b2f0cSPeter Griffin HI6553_BUCK4_REG5 = 0x05e, 31242b2f0cSPeter Griffin HI6553_BUCK4_REG6, 32242b2f0cSPeter Griffin 33242b2f0cSPeter Griffin HI6553_CLK_TOP0 = 0x063, 34242b2f0cSPeter Griffin HI6553_CLK_TOP3 = 0x066, 35242b2f0cSPeter Griffin HI6553_CLK_TOP4, 36242b2f0cSPeter Griffin HI6553_VSET_BUCK2_ADJ = 0x06d, 37242b2f0cSPeter Griffin HI6553_VSET_BUCK3_ADJ, 38242b2f0cSPeter Griffin HI6553_LDO7_REG_ADJ = 0x078, 39242b2f0cSPeter Griffin HI6553_LDO10_REG_ADJ = 0x07b, 40242b2f0cSPeter Griffin HI6553_LDO19_REG_ADJ = 0x084, 41242b2f0cSPeter Griffin HI6553_LDO20_REG_ADJ, 42242b2f0cSPeter Griffin HI6553_DR_LED_CTRL = 0x098, 43242b2f0cSPeter Griffin HI6553_DR_OUT_CTRL, 44242b2f0cSPeter Griffin HI6553_DR3_ISET, 45242b2f0cSPeter Griffin HI6553_DR3_START_DEL, 46242b2f0cSPeter Griffin HI6553_DR4_ISET, 47242b2f0cSPeter Griffin HI6553_DR4_START_DEL, 48242b2f0cSPeter Griffin HI6553_DR345_TIM_CONF0 = 0x0a0, 49242b2f0cSPeter Griffin HI6553_NP_REG_ADJ1 = 0x0be, 50242b2f0cSPeter Griffin HI6553_NP_REG_CHG = 0x0c0, 51242b2f0cSPeter Griffin HI6553_BUCK01_CTRL2 = 0x0d9, 52242b2f0cSPeter Griffin HI6553_BUCK0_CTRL1 = 0x0dd, 53242b2f0cSPeter Griffin HI6553_BUCK0_CTRL5 = 0x0e1, 54242b2f0cSPeter Griffin HI6553_BUCK0_CTRL7 = 0x0e3, 55242b2f0cSPeter Griffin HI6553_BUCK1_CTRL1 = 0x0e8, 56242b2f0cSPeter Griffin HI6553_BUCK1_CTRL5 = 0x0ec, 57242b2f0cSPeter Griffin HI6553_BUCK1_CTRL7 = 0x0ef, 58242b2f0cSPeter Griffin HI6553_CLK19M2_600_586_EN = 0x0fe, 59242b2f0cSPeter Griffin }; 60242b2f0cSPeter Griffin 61242b2f0cSPeter Griffin #define HI6553_DISABLE6_XO_CLK_BB (1 << 0) 62242b2f0cSPeter Griffin #define HI6553_DISABLE6_XO_CLK_CONN (1 << 1) 63242b2f0cSPeter Griffin #define HI6553_DISABLE6_XO_CLK_NFC (1 << 2) 64242b2f0cSPeter Griffin #define HI6553_DISABLE6_XO_CLK_RF1 (1 << 3) 65242b2f0cSPeter Griffin #define HI6553_DISABLE6_XO_CLK_RF2 (1 << 4) 66242b2f0cSPeter Griffin 67242b2f0cSPeter Griffin #define HI6553_LED_START_DELAY_TIME 0x00 68242b2f0cSPeter Griffin #define HI6553_LED_ELEC_VALUE 0x07 69242b2f0cSPeter Griffin #define HI6553_LED_LIGHT_TIME 0xf0 70242b2f0cSPeter Griffin #define HI6553_LED_GREEN_ENABLE (1 << 1) 71242b2f0cSPeter Griffin #define HI6553_LED_OUT_CTRL 0x00 72242b2f0cSPeter Griffin 73242b2f0cSPeter Griffin #define HI6553_PMU_V300 0x30 74242b2f0cSPeter Griffin #define HI6553_PMU_V310 0x31 75242b2f0cSPeter Griffin 76242b2f0cSPeter Griffin int power_hi6553_init(u8 *base); 77242b2f0cSPeter Griffin 78242b2f0cSPeter Griffin #endif /* __HI6553_PMIC_H__ */ 79