xref: /openbmc/u-boot/include/phy.h (revision c32a6fd07b1839e4a45729587ebc8e1c55601a4d)
1 /*
2  * Copyright 2011 Freescale Semiconductor, Inc.
3  *	Andy Fleming <afleming@gmail.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  *
7  * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
8  */
9 
10 #ifndef _PHY_H
11 #define _PHY_H
12 
13 #include <linux/list.h>
14 #include <linux/mii.h>
15 #include <linux/ethtool.h>
16 #include <linux/mdio.h>
17 
18 #define PHY_MAX_ADDR 32
19 
20 #define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
21 				 SUPPORTED_TP | \
22 				 SUPPORTED_MII)
23 
24 #define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
25 				 SUPPORTED_10baseT_Full)
26 
27 #define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
28 				 SUPPORTED_100baseT_Full)
29 
30 #define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
31 				 SUPPORTED_1000baseT_Full)
32 
33 #define PHY_BASIC_FEATURES	(PHY_10BT_FEATURES | \
34 				 PHY_100BT_FEATURES | \
35 				 PHY_DEFAULT_FEATURES)
36 
37 #define PHY_GBIT_FEATURES	(PHY_BASIC_FEATURES | \
38 				 PHY_1000BT_FEATURES)
39 
40 #define PHY_10G_FEATURES	(PHY_GBIT_FEATURES | \
41 				SUPPORTED_10000baseT_Full)
42 
43 #ifndef PHY_ANEG_TIMEOUT
44 #define PHY_ANEG_TIMEOUT	4000
45 #endif
46 
47 
48 typedef enum {
49 	PHY_INTERFACE_MODE_MII,
50 	PHY_INTERFACE_MODE_GMII,
51 	PHY_INTERFACE_MODE_SGMII,
52 	PHY_INTERFACE_MODE_SGMII_2500,
53 	PHY_INTERFACE_MODE_QSGMII,
54 	PHY_INTERFACE_MODE_TBI,
55 	PHY_INTERFACE_MODE_RMII,
56 	PHY_INTERFACE_MODE_RGMII,
57 	PHY_INTERFACE_MODE_RGMII_ID,
58 	PHY_INTERFACE_MODE_RGMII_RXID,
59 	PHY_INTERFACE_MODE_RGMII_TXID,
60 	PHY_INTERFACE_MODE_RTBI,
61 	PHY_INTERFACE_MODE_XGMII,
62 	PHY_INTERFACE_MODE_NONE,	/* Must be last */
63 
64 	PHY_INTERFACE_MODE_COUNT,
65 } phy_interface_t;
66 
67 static const char *phy_interface_strings[] = {
68 	[PHY_INTERFACE_MODE_MII]		= "mii",
69 	[PHY_INTERFACE_MODE_GMII]		= "gmii",
70 	[PHY_INTERFACE_MODE_SGMII]		= "sgmii",
71 	[PHY_INTERFACE_MODE_SGMII_2500]		= "sgmii-2500",
72 	[PHY_INTERFACE_MODE_QSGMII]		= "qsgmii",
73 	[PHY_INTERFACE_MODE_TBI]		= "tbi",
74 	[PHY_INTERFACE_MODE_RMII]		= "rmii",
75 	[PHY_INTERFACE_MODE_RGMII]		= "rgmii",
76 	[PHY_INTERFACE_MODE_RGMII_ID]		= "rgmii-id",
77 	[PHY_INTERFACE_MODE_RGMII_RXID]		= "rgmii-rxid",
78 	[PHY_INTERFACE_MODE_RGMII_TXID]		= "rgmii-txid",
79 	[PHY_INTERFACE_MODE_RTBI]		= "rtbi",
80 	[PHY_INTERFACE_MODE_XGMII]		= "xgmii",
81 	[PHY_INTERFACE_MODE_NONE]		= "",
82 };
83 
84 static inline const char *phy_string_for_interface(phy_interface_t i)
85 {
86 	/* Default to unknown */
87 	if (i > PHY_INTERFACE_MODE_NONE)
88 		i = PHY_INTERFACE_MODE_NONE;
89 
90 	return phy_interface_strings[i];
91 }
92 
93 
94 struct phy_device;
95 
96 #define MDIO_NAME_LEN 32
97 
98 struct mii_dev {
99 	struct list_head link;
100 	char name[MDIO_NAME_LEN];
101 	void *priv;
102 	int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
103 	int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
104 			u16 val);
105 	int (*reset)(struct mii_dev *bus);
106 	struct phy_device *phymap[PHY_MAX_ADDR];
107 	u32 phy_mask;
108 };
109 
110 /* struct phy_driver: a structure which defines PHY behavior
111  *
112  * uid will contain a number which represents the PHY.  During
113  * startup, the driver will poll the PHY to find out what its
114  * UID--as defined by registers 2 and 3--is.  The 32-bit result
115  * gotten from the PHY will be masked to
116  * discard any bits which may change based on revision numbers
117  * unimportant to functionality
118  *
119  */
120 struct phy_driver {
121 	char *name;
122 	unsigned int uid;
123 	unsigned int mask;
124 	unsigned int mmds;
125 
126 	u32 features;
127 
128 	/* Called to do any driver startup necessities */
129 	/* Will be called during phy_connect */
130 	int (*probe)(struct phy_device *phydev);
131 
132 	/* Called to configure the PHY, and modify the controller
133 	 * based on the results.  Should be called after phy_connect */
134 	int (*config)(struct phy_device *phydev);
135 
136 	/* Called when starting up the controller */
137 	int (*startup)(struct phy_device *phydev);
138 
139 	/* Called when bringing down the controller */
140 	int (*shutdown)(struct phy_device *phydev);
141 
142 	int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
143 	int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
144 			u16 val);
145 	struct list_head list;
146 };
147 
148 struct phy_device {
149 	/* Information about the PHY type */
150 	/* And management functions */
151 	struct mii_dev *bus;
152 	struct phy_driver *drv;
153 	void *priv;
154 
155 #ifdef CONFIG_DM_ETH
156 	struct udevice *dev;
157 #else
158 	struct eth_device *dev;
159 #endif
160 
161 	/* forced speed & duplex (no autoneg)
162 	 * partner speed & duplex & pause (autoneg)
163 	 */
164 	int speed;
165 	int duplex;
166 
167 	/* The most recently read link state */
168 	int link;
169 	int port;
170 	phy_interface_t interface;
171 
172 	u32 advertising;
173 	u32 supported;
174 	u32 mmds;
175 
176 	int autoneg;
177 	int addr;
178 	int pause;
179 	int asym_pause;
180 	u32 phy_id;
181 	u32 flags;
182 };
183 
184 struct fixed_link {
185 	int phy_id;
186 	int duplex;
187 	int link_speed;
188 	int pause;
189 	int asym_pause;
190 };
191 
192 static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
193 {
194 	struct mii_dev *bus = phydev->bus;
195 
196 	return bus->read(bus, phydev->addr, devad, regnum);
197 }
198 
199 static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
200 			u16 val)
201 {
202 	struct mii_dev *bus = phydev->bus;
203 
204 	return bus->write(bus, phydev->addr, devad, regnum, val);
205 }
206 
207 #ifdef CONFIG_PHYLIB_10G
208 extern struct phy_driver gen10g_driver;
209 
210 /* For now, XGMII is the only 10G interface */
211 static inline int is_10g_interface(phy_interface_t interface)
212 {
213 	return interface == PHY_INTERFACE_MODE_XGMII;
214 }
215 
216 #endif
217 
218 int phy_init(void);
219 int phy_reset(struct phy_device *phydev);
220 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
221 		phy_interface_t interface);
222 #ifdef CONFIG_DM_ETH
223 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
224 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
225 				struct udevice *dev,
226 				phy_interface_t interface);
227 #else
228 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
229 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
230 				struct eth_device *dev,
231 				phy_interface_t interface);
232 #endif
233 int phy_startup(struct phy_device *phydev);
234 int phy_config(struct phy_device *phydev);
235 int phy_shutdown(struct phy_device *phydev);
236 int phy_register(struct phy_driver *drv);
237 int phy_set_supported(struct phy_device *phydev, u32 max_speed);
238 int genphy_config_aneg(struct phy_device *phydev);
239 int genphy_restart_aneg(struct phy_device *phydev);
240 int genphy_update_link(struct phy_device *phydev);
241 int genphy_parse_link(struct phy_device *phydev);
242 int genphy_config(struct phy_device *phydev);
243 int genphy_startup(struct phy_device *phydev);
244 int genphy_shutdown(struct phy_device *phydev);
245 int gen10g_config(struct phy_device *phydev);
246 int gen10g_startup(struct phy_device *phydev);
247 int gen10g_shutdown(struct phy_device *phydev);
248 int gen10g_discover_mmds(struct phy_device *phydev);
249 
250 int phy_aquantia_init(void);
251 int phy_atheros_init(void);
252 int phy_broadcom_init(void);
253 int phy_cortina_init(void);
254 int phy_davicom_init(void);
255 int phy_et1011c_init(void);
256 int phy_lxt_init(void);
257 int phy_marvell_init(void);
258 int phy_micrel_init(void);
259 int phy_natsemi_init(void);
260 int phy_realtek_init(void);
261 int phy_smsc_init(void);
262 int phy_teranetics_init(void);
263 int phy_ti_init(void);
264 int phy_vitesse_init(void);
265 
266 int board_phy_config(struct phy_device *phydev);
267 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
268 
269 /**
270  * phy_get_interface_by_name() - Look up a PHY interface name
271  *
272  * @str:	PHY interface name, e.g. "mii"
273  * @return PHY_INTERFACE_MODE_... value, or -1 if not found
274  */
275 int phy_get_interface_by_name(const char *str);
276 
277 /* PHY UIDs for various PHYs that are referenced in external code */
278 #define PHY_UID_CS4340  0x13e51002
279 #define PHY_UID_TN2020	0x00a19410
280 
281 #endif
282