1 /* 2 * (C) Copyright 2000 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #ifndef _PCMCIA_H 25 #define _PCMCIA_H 26 27 #include <common.h> 28 #include <config.h> 29 30 /* 31 * Allow configuration to select PCMCIA slot, 32 * or try to generate a useful default 33 */ 34 #if ( CONFIG_COMMANDS & CFG_CMD_PCMCIA) || \ 35 ((CONFIG_COMMANDS & CFG_CMD_IDE) && \ 36 (defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) ) 37 38 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 39 40 /* The RPX series use SLOT_B */ 41 #if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE) 42 # define CONFIG_PCMCIA_SLOT_B 43 #elif defined(CONFIG_ADS) /* The ADS board use SLOT_A */ 44 # define CONFIG_PCMCIA_SLOT_A 45 #elif defined(CONFIG_FADS) /* The FADS series are a mess */ 46 # if defined(CONFIG_MPC860T) || defined(CONFIG_MPC860) || defined(CONFIG_MPC821) 47 # define CONFIG_PCMCIA_SLOT_A 48 # else 49 # define CONFIG_PCMCIA_SLOT_B 50 # endif 51 #elif defined(CONFIG_TQM8xxL) 52 # define CONFIG_PCMCIA_SLOT_B /* The TQM8xxL use SLOT_B */ 53 #elif defined(CONFIG_SPD823TS) /* The SPD8xx use SLOT_B */ 54 # define CONFIG_PCMCIA_SLOT_B 55 #elif defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) /* The IVM* use SLOT_A */ 56 # define CONFIG_PCMCIA_SLOT_A 57 #elif defined(CONFIG_LWMON) /* The LWMON use SLOT_B */ 58 # define CONFIG_PCMCIA_SLOT_B 59 #elif defined(CONFIG_ICU862) /* The ICU862 use SLOT_B */ 60 # define CONFIG_PCMCIA_SLOT_B 61 #elif defined(CONFIG_C2MON) /* The C2MON use SLOT_B */ 62 # define CONFIG_PCMCIA_SLOT_B 63 #elif defined(CONFIG_R360MPI) /* The R360MPI use SLOT_B */ 64 # define CONFIG_PCMCIA_SLOT_B 65 #else 66 # error "PCMCIA Slot not configured" 67 #endif 68 69 #endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */ 70 71 /* Make sure exactly one slot is defined - we support only one for now */ 72 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 73 #error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured 74 #endif 75 #if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B) 76 #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured 77 #endif 78 79 #ifndef PCMCIA_SOCKETS_NO 80 #define PCMCIA_SOCKETS_NO 1 81 #endif 82 #ifndef PCMCIA_MEM_WIN_NO 83 #define PCMCIA_MEM_WIN_NO 4 84 #endif 85 #define PCMCIA_IO_WIN_NO 2 86 87 /* define _slot_ to be able to optimize macros */ 88 #ifdef CONFIG_PCMCIA_SLOT_A 89 # define _slot_ 0 90 # define PCMCIA_SLOT_MSG "slot A" 91 # define PCMCIA_SLOT_x PCMCIA_PSLOT_A 92 #else 93 # define _slot_ 1 94 # define PCMCIA_SLOT_MSG "slot B" 95 # define PCMCIA_SLOT_x PCMCIA_PSLOT_B 96 #endif 97 98 /* 99 * The TQM850L hardware has two pins swapped! Grrrrgh! 100 */ 101 #ifdef CONFIG_TQM850L 102 #define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXOE 103 #define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXRESET 104 #else 105 #define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXRESET 106 #define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXOE 107 #endif 108 109 /* 110 * This structure is used to address each window in the PCMCIA controller. 111 * 112 * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly 113 * after pcmcia_win_t[n]... 114 */ 115 116 typedef struct { 117 ulong br; 118 ulong or; 119 } pcmcia_win_t; 120 121 /* 122 * Definitions for PCMCIA control registers to operate in IDE mode 123 * 124 * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL) 125 * to be done later (depending on CPU clock) 126 */ 127 128 /* Window 0: 129 * Base: 0xFE100000 CS1 130 * Port Size: 2 Bytes 131 * Port Size: 16 Bit 132 * Common Memory Space 133 */ 134 135 #define CFG_PCMCIA_PBR0 0xFE100000 136 #define CFG_PCMCIA_POR0 ( PCMCIA_BSIZE_2 \ 137 | PCMCIA_PPS_16 \ 138 | PCMCIA_PRS_MEM \ 139 | PCMCIA_SLOT_x \ 140 | PCMCIA_PV \ 141 ) 142 143 /* Window 1: 144 * Base: 0xFE100080 CS1 145 * Port Size: 8 Bytes 146 * Port Size: 8 Bit 147 * Common Memory Space 148 */ 149 150 #define CFG_PCMCIA_PBR1 0xFE100080 151 #define CFG_PCMCIA_POR1 ( PCMCIA_BSIZE_8 \ 152 | PCMCIA_PPS_8 \ 153 | PCMCIA_PRS_MEM \ 154 | PCMCIA_SLOT_x \ 155 | PCMCIA_PV \ 156 ) 157 158 /* Window 2: 159 * Base: 0xFE100100 CS2 160 * Port Size: 8 Bytes 161 * Port Size: 8 Bit 162 * Common Memory Space 163 */ 164 165 #define CFG_PCMCIA_PBR2 0xFE100100 166 #define CFG_PCMCIA_POR2 ( PCMCIA_BSIZE_8 \ 167 | PCMCIA_PPS_8 \ 168 | PCMCIA_PRS_MEM \ 169 | PCMCIA_SLOT_x \ 170 | PCMCIA_PV \ 171 ) 172 173 /* Window 3: 174 * not used 175 */ 176 #define CFG_PCMCIA_PBR3 0 177 #define CFG_PCMCIA_POR3 0 178 179 /* Window 4: 180 * Base: 0xFE100C00 CS1 181 * Port Size: 2 Bytes 182 * Port Size: 16 Bit 183 * Common Memory Space 184 */ 185 186 #define CFG_PCMCIA_PBR4 0xFE100C00 187 #define CFG_PCMCIA_POR4 ( PCMCIA_BSIZE_2 \ 188 | PCMCIA_PPS_16 \ 189 | PCMCIA_PRS_MEM \ 190 | PCMCIA_SLOT_x \ 191 | PCMCIA_PV \ 192 ) 193 194 /* Window 5: 195 * Base: 0xFE100C80 CS1 196 * Port Size: 8 Bytes 197 * Port Size: 8 Bit 198 * Common Memory Space 199 */ 200 201 #define CFG_PCMCIA_PBR5 0xFE100C80 202 #define CFG_PCMCIA_POR5 ( PCMCIA_BSIZE_8 \ 203 | PCMCIA_PPS_8 \ 204 | PCMCIA_PRS_MEM \ 205 | PCMCIA_SLOT_x \ 206 | PCMCIA_PV \ 207 ) 208 209 /* Window 6: 210 * Base: 0xFE100D00 CS2 211 * Port Size: 8 Bytes 212 * Port Size: 8 Bit 213 * Common Memory Space 214 */ 215 216 #define CFG_PCMCIA_PBR6 0xFE100D00 217 #define CFG_PCMCIA_POR6 ( PCMCIA_BSIZE_8 \ 218 | PCMCIA_PPS_8 \ 219 | PCMCIA_PRS_MEM \ 220 | PCMCIA_SLOT_x \ 221 | PCMCIA_PV \ 222 ) 223 224 /* Window 7: 225 * not used 226 */ 227 #define CFG_PCMCIA_PBR7 0 228 #define CFG_PCMCIA_POR7 0 229 230 /**********************************************************************/ 231 232 /* 233 * CIS Tupel codes 234 */ 235 #define CISTPL_NULL 0x00 236 #define CISTPL_DEVICE 0x01 237 #define CISTPL_LONGLINK_CB 0x02 238 #define CISTPL_INDIRECT 0x03 239 #define CISTPL_CONFIG_CB 0x04 240 #define CISTPL_CFTABLE_ENTRY_CB 0x05 241 #define CISTPL_LONGLINK_MFC 0x06 242 #define CISTPL_BAR 0x07 243 #define CISTPL_PWR_MGMNT 0x08 244 #define CISTPL_EXTDEVICE 0x09 245 #define CISTPL_CHECKSUM 0x10 246 #define CISTPL_LONGLINK_A 0x11 247 #define CISTPL_LONGLINK_C 0x12 248 #define CISTPL_LINKTARGET 0x13 249 #define CISTPL_NO_LINK 0x14 250 #define CISTPL_VERS_1 0x15 251 #define CISTPL_ALTSTR 0x16 252 #define CISTPL_DEVICE_A 0x17 253 #define CISTPL_JEDEC_C 0x18 254 #define CISTPL_JEDEC_A 0x19 255 #define CISTPL_CONFIG 0x1a 256 #define CISTPL_CFTABLE_ENTRY 0x1b 257 #define CISTPL_DEVICE_OC 0x1c 258 #define CISTPL_DEVICE_OA 0x1d 259 #define CISTPL_DEVICE_GEO 0x1e 260 #define CISTPL_DEVICE_GEO_A 0x1f 261 #define CISTPL_MANFID 0x20 262 #define CISTPL_FUNCID 0x21 263 #define CISTPL_FUNCE 0x22 264 #define CISTPL_SWIL 0x23 265 #define CISTPL_END 0xff 266 267 /* 268 * CIS Function ID codes 269 */ 270 #define CISTPL_FUNCID_MULTI 0x00 271 #define CISTPL_FUNCID_MEMORY 0x01 272 #define CISTPL_FUNCID_SERIAL 0x02 273 #define CISTPL_FUNCID_PARALLEL 0x03 274 #define CISTPL_FUNCID_FIXED 0x04 275 #define CISTPL_FUNCID_VIDEO 0x05 276 #define CISTPL_FUNCID_NETWORK 0x06 277 #define CISTPL_FUNCID_AIMS 0x07 278 #define CISTPL_FUNCID_SCSI 0x08 279 280 /* 281 * Fixed Disk FUNCE codes 282 */ 283 #define CISTPL_IDE_INTERFACE 0x01 284 285 #define CISTPL_FUNCE_IDE_IFACE 0x01 286 #define CISTPL_FUNCE_IDE_MASTER 0x02 287 #define CISTPL_FUNCE_IDE_SLAVE 0x03 288 289 /* First feature byte */ 290 #define CISTPL_IDE_SILICON 0x04 291 #define CISTPL_IDE_UNIQUE 0x08 292 #define CISTPL_IDE_DUAL 0x10 293 294 /* Second feature byte */ 295 #define CISTPL_IDE_HAS_SLEEP 0x01 296 #define CISTPL_IDE_HAS_STANDBY 0x02 297 #define CISTPL_IDE_HAS_IDLE 0x04 298 #define CISTPL_IDE_LOW_POWER 0x08 299 #define CISTPL_IDE_REG_INHIBIT 0x10 300 #define CISTPL_IDE_HAS_INDEX 0x20 301 #define CISTPL_IDE_IOIS16 0x40 302 303 #endif /* CFG_CMD_PCMCIA || CFG_CMD_IDE && (CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT) */ 304 305 #endif /* _PCMCIA_H */ 306