1 /* 2 * (C) Copyright 2000-2004 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _PCMCIA_H 9 #define _PCMCIA_H 10 11 #include <common.h> 12 #include <config.h> 13 14 /* 15 * Allow configuration to select PCMCIA slot, 16 * or try to generate a useful default 17 */ 18 #if defined(CONFIG_CMD_PCMCIA) 19 20 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 21 # error "PCMCIA Slot not configured" 22 #endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */ 23 24 /* Make sure exactly one slot is defined - we support only one for now */ 25 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 26 #error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured 27 #endif 28 #if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B) 29 #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured 30 #endif 31 32 #ifndef PCMCIA_SOCKETS_NO 33 #define PCMCIA_SOCKETS_NO 1 34 #endif 35 #ifndef PCMCIA_MEM_WIN_NO 36 #define PCMCIA_MEM_WIN_NO 4 37 #endif 38 #define PCMCIA_IO_WIN_NO 2 39 40 /* define _slot_ to be able to optimize macros */ 41 #ifdef CONFIG_PCMCIA_SLOT_A 42 # define _slot_ 0 43 # define PCMCIA_SLOT_MSG "slot A" 44 # define PCMCIA_SLOT_x PCMCIA_PSLOT_A 45 #else 46 # define _slot_ 1 47 # define PCMCIA_SLOT_MSG "slot B" 48 # define PCMCIA_SLOT_x PCMCIA_PSLOT_B 49 #endif 50 51 /* 52 * This structure is used to address each window in the PCMCIA controller. 53 * 54 * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly 55 * after pcmcia_win_t[n]... 56 */ 57 58 typedef struct { 59 ulong br; 60 ulong or; 61 } pcmcia_win_t; 62 63 /**********************************************************************/ 64 65 /* 66 * CIS Tupel codes 67 */ 68 #define CISTPL_NULL 0x00 69 #define CISTPL_DEVICE 0x01 70 #define CISTPL_LONGLINK_CB 0x02 71 #define CISTPL_INDIRECT 0x03 72 #define CISTPL_CONFIG_CB 0x04 73 #define CISTPL_CFTABLE_ENTRY_CB 0x05 74 #define CISTPL_LONGLINK_MFC 0x06 75 #define CISTPL_BAR 0x07 76 #define CISTPL_PWR_MGMNT 0x08 77 #define CISTPL_EXTDEVICE 0x09 78 #define CISTPL_CHECKSUM 0x10 79 #define CISTPL_LONGLINK_A 0x11 80 #define CISTPL_LONGLINK_C 0x12 81 #define CISTPL_LINKTARGET 0x13 82 #define CISTPL_NO_LINK 0x14 83 #define CISTPL_VERS_1 0x15 84 #define CISTPL_ALTSTR 0x16 85 #define CISTPL_DEVICE_A 0x17 86 #define CISTPL_JEDEC_C 0x18 87 #define CISTPL_JEDEC_A 0x19 88 #define CISTPL_CONFIG 0x1a 89 #define CISTPL_CFTABLE_ENTRY 0x1b 90 #define CISTPL_DEVICE_OC 0x1c 91 #define CISTPL_DEVICE_OA 0x1d 92 #define CISTPL_DEVICE_GEO 0x1e 93 #define CISTPL_DEVICE_GEO_A 0x1f 94 #define CISTPL_MANFID 0x20 95 #define CISTPL_FUNCID 0x21 96 #define CISTPL_FUNCE 0x22 97 #define CISTPL_SWIL 0x23 98 #define CISTPL_END 0xff 99 100 /* 101 * CIS Function ID codes 102 */ 103 #define CISTPL_FUNCID_MULTI 0x00 104 #define CISTPL_FUNCID_MEMORY 0x01 105 #define CISTPL_FUNCID_SERIAL 0x02 106 #define CISTPL_FUNCID_PARALLEL 0x03 107 #define CISTPL_FUNCID_FIXED 0x04 108 #define CISTPL_FUNCID_VIDEO 0x05 109 #define CISTPL_FUNCID_NETWORK 0x06 110 #define CISTPL_FUNCID_AIMS 0x07 111 #define CISTPL_FUNCID_SCSI 0x08 112 113 /* 114 * Fixed Disk FUNCE codes 115 */ 116 #define CISTPL_IDE_INTERFACE 0x01 117 118 #define CISTPL_FUNCE_IDE_IFACE 0x01 119 #define CISTPL_FUNCE_IDE_MASTER 0x02 120 #define CISTPL_FUNCE_IDE_SLAVE 0x03 121 122 /* First feature byte */ 123 #define CISTPL_IDE_SILICON 0x04 124 #define CISTPL_IDE_UNIQUE 0x08 125 #define CISTPL_IDE_DUAL 0x10 126 127 /* Second feature byte */ 128 #define CISTPL_IDE_HAS_SLEEP 0x01 129 #define CISTPL_IDE_HAS_STANDBY 0x02 130 #define CISTPL_IDE_HAS_IDLE 0x04 131 #define CISTPL_IDE_LOW_POWER 0x08 132 #define CISTPL_IDE_REG_INHIBIT 0x10 133 #define CISTPL_IDE_HAS_INDEX 0x20 134 #define CISTPL_IDE_IOIS16 0x40 135 136 #endif 137 138 #endif /* _PCMCIA_H */ 139