xref: /openbmc/u-boot/include/pcmcia.h (revision 940db16d)
1 /*
2  * (C) Copyright 2000-2004
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _PCMCIA_H
9 #define _PCMCIA_H
10 
11 #include <common.h>
12 #include <config.h>
13 
14 /*
15  * Allow configuration to select PCMCIA slot,
16  * or try to generate a useful default
17  */
18 #if defined(CONFIG_CMD_PCMCIA) || \
19     (defined(CONFIG_CMD_IDE) && \
20 	(defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) )
21 
22 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
23 
24 					/* The RPX series use SLOT_B	*/
25 #if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
26 # define CONFIG_PCMCIA_SLOT_B
27 #elif defined(CONFIG_ADS)		/* The ADS  board uses SLOT_A	*/
28 # define CONFIG_PCMCIA_SLOT_A
29 #elif defined(CONFIG_FADS)		/* The FADS series are a mess	*/
30 # if defined(CONFIG_MPC86x) || defined(CONFIG_MPC821)
31 #  define CONFIG_PCMCIA_SLOT_A
32 # else
33 #  define CONFIG_PCMCIA_SLOT_B
34 # endif
35 #elif defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx)
36 # define	CONFIG_PCMCIA_SLOT_B	/* The TQM8xxL use SLOT_B	*/
37 #elif defined(CONFIG_SPD823TS)		/* The SPD8xx  use SLOT_B	*/
38 # define CONFIG_PCMCIA_SLOT_B
39 #elif defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)	/* The IVM* use SLOT_A	*/
40 # define CONFIG_PCMCIA_SLOT_A
41 #elif defined(CONFIG_LWMON)		/* The LWMON  use SLOT_B	*/
42 # define CONFIG_PCMCIA_SLOT_B
43 #elif defined(CONFIG_ICU862)		/* The ICU862 use SLOT_B	*/
44 # define CONFIG_PCMCIA_SLOT_B
45 #elif defined(CONFIG_R360MPI)		/* The R360MPI use SLOT_B	*/
46 # define CONFIG_PCMCIA_SLOT_B
47 #elif defined(CONFIG_ATC)		/* The ATC use SLOT_A	*/
48 # define CONFIG_PCMCIA_SLOT_A
49 #elif defined(CONFIG_NETTA)
50 # define CONFIG_PCMCIA_SLOT_A
51 #elif defined(CONFIG_UC100)		/* The UC100 use SLOT_B	        */
52 # define CONFIG_PCMCIA_SLOT_B
53 #else
54 # error "PCMCIA Slot not configured"
55 #endif
56 
57 #endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
58 
59 /* Make sure exactly one slot is defined - we support only one for now */
60 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
61 #error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
62 #endif
63 #if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
64 #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
65 #endif
66 
67 #ifndef PCMCIA_SOCKETS_NO
68 #define PCMCIA_SOCKETS_NO	1
69 #endif
70 #ifndef PCMCIA_MEM_WIN_NO
71 #define PCMCIA_MEM_WIN_NO	4
72 #endif
73 #define PCMCIA_IO_WIN_NO	2
74 
75 /* define _slot_ to be able to optimize macros */
76 #ifdef CONFIG_PCMCIA_SLOT_A
77 # define _slot_			0
78 # define PCMCIA_SLOT_MSG	"slot A"
79 # define PCMCIA_SLOT_x		PCMCIA_PSLOT_A
80 #else
81 # define _slot_			1
82 # define PCMCIA_SLOT_MSG	"slot B"
83 # define PCMCIA_SLOT_x		PCMCIA_PSLOT_B
84 #endif
85 
86 /*
87  * The TQM850L hardware has two pins swapped! Grrrrgh!
88  */
89 #ifdef	CONFIG_TQM850L
90 #define __MY_PCMCIA_GCRX_CXRESET	PCMCIA_GCRX_CXOE
91 #define __MY_PCMCIA_GCRX_CXOE		PCMCIA_GCRX_CXRESET
92 #else
93 #define __MY_PCMCIA_GCRX_CXRESET	PCMCIA_GCRX_CXRESET
94 #define __MY_PCMCIA_GCRX_CXOE		PCMCIA_GCRX_CXOE
95 #endif
96 
97 /*
98  * This structure is used to address each window in the PCMCIA controller.
99  *
100  * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
101  * after pcmcia_win_t[n]...
102  */
103 
104 typedef struct {
105 	ulong	br;
106 	ulong	or;
107 } pcmcia_win_t;
108 
109 /*
110  * Definitions for PCMCIA control registers to operate in IDE mode
111  *
112  * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL)
113  * to be done later (depending on CPU clock)
114  */
115 
116 /* Window 0:
117  *	Base: 0xFE100000	CS1
118  *	Port Size:     2 Bytes
119  *	Port Size:    16 Bit
120  *	Common Memory Space
121  */
122 
123 #define CONFIG_SYS_PCMCIA_PBR0		0xFE100000
124 #define CONFIG_SYS_PCMCIA_POR0	    (	PCMCIA_BSIZE_2	\
125 			    |	PCMCIA_PPS_16	\
126 			    |	PCMCIA_PRS_MEM	\
127 			    |	PCMCIA_SLOT_x	\
128 			    |	PCMCIA_PV	\
129 			    )
130 
131 /* Window 1:
132  *	Base: 0xFE100080	CS1
133  *	Port Size:     8 Bytes
134  *	Port Size:     8 Bit
135  *	Common Memory Space
136  */
137 
138 #define CONFIG_SYS_PCMCIA_PBR1		0xFE100080
139 #define CONFIG_SYS_PCMCIA_POR1	    (	PCMCIA_BSIZE_8	\
140 			    |	PCMCIA_PPS_8	\
141 			    |	PCMCIA_PRS_MEM	\
142 			    |	PCMCIA_SLOT_x	\
143 			    |	PCMCIA_PV	\
144 			    )
145 
146 /* Window 2:
147  *	Base: 0xFE100100	CS2
148  *	Port Size:     8 Bytes
149  *	Port Size:     8 Bit
150  *	Common Memory Space
151  */
152 
153 #define CONFIG_SYS_PCMCIA_PBR2		0xFE100100
154 #define CONFIG_SYS_PCMCIA_POR2	    (	PCMCIA_BSIZE_8	\
155 			    |	PCMCIA_PPS_8	\
156 			    |	PCMCIA_PRS_MEM	\
157 			    |	PCMCIA_SLOT_x	\
158 			    |	PCMCIA_PV	\
159 			    )
160 
161 /* Window 3:
162  *	not used
163  */
164 #define CONFIG_SYS_PCMCIA_PBR3		0
165 #define CONFIG_SYS_PCMCIA_POR3		0
166 
167 /* Window 4:
168  *	Base: 0xFE100C00	CS1
169  *	Port Size:     2 Bytes
170  *	Port Size:    16 Bit
171  *	Common Memory Space
172  */
173 
174 #define CONFIG_SYS_PCMCIA_PBR4		0xFE100C00
175 #define CONFIG_SYS_PCMCIA_POR4	    (	PCMCIA_BSIZE_2	\
176 			    |	PCMCIA_PPS_16	\
177 			    |	PCMCIA_PRS_MEM	\
178 			    |	PCMCIA_SLOT_x	\
179 			    |	PCMCIA_PV	\
180 			    )
181 
182 /* Window 5:
183  *	Base: 0xFE100C80	CS1
184  *	Port Size:     8 Bytes
185  *	Port Size:     8 Bit
186  *	Common Memory Space
187  */
188 
189 #define CONFIG_SYS_PCMCIA_PBR5		0xFE100C80
190 #define CONFIG_SYS_PCMCIA_POR5	    (	PCMCIA_BSIZE_8	\
191 			    |	PCMCIA_PPS_8	\
192 			    |	PCMCIA_PRS_MEM	\
193 			    |	PCMCIA_SLOT_x	\
194 			    |	PCMCIA_PV	\
195 			    )
196 
197 /* Window 6:
198  *	Base: 0xFE100D00	CS2
199  *	Port Size:     8 Bytes
200  *	Port Size:     8 Bit
201  *	Common Memory Space
202  */
203 
204 #define CONFIG_SYS_PCMCIA_PBR6		0xFE100D00
205 #define CONFIG_SYS_PCMCIA_POR6	    (	PCMCIA_BSIZE_8	\
206 			    |	PCMCIA_PPS_8	\
207 			    |	PCMCIA_PRS_MEM	\
208 			    |	PCMCIA_SLOT_x	\
209 			    |	PCMCIA_PV	\
210 			    )
211 
212 /* Window 7:
213  *	not used
214  */
215 #define CONFIG_SYS_PCMCIA_PBR7		0
216 #define CONFIG_SYS_PCMCIA_POR7		0
217 
218 /**********************************************************************/
219 
220 /*
221  * CIS Tupel codes
222  */
223 #define CISTPL_NULL		0x00
224 #define CISTPL_DEVICE		0x01
225 #define CISTPL_LONGLINK_CB	0x02
226 #define CISTPL_INDIRECT		0x03
227 #define CISTPL_CONFIG_CB	0x04
228 #define CISTPL_CFTABLE_ENTRY_CB 0x05
229 #define CISTPL_LONGLINK_MFC	0x06
230 #define CISTPL_BAR		0x07
231 #define CISTPL_PWR_MGMNT	0x08
232 #define CISTPL_EXTDEVICE	0x09
233 #define CISTPL_CHECKSUM		0x10
234 #define CISTPL_LONGLINK_A	0x11
235 #define CISTPL_LONGLINK_C	0x12
236 #define CISTPL_LINKTARGET	0x13
237 #define CISTPL_NO_LINK		0x14
238 #define CISTPL_VERS_1		0x15
239 #define CISTPL_ALTSTR		0x16
240 #define CISTPL_DEVICE_A		0x17
241 #define CISTPL_JEDEC_C		0x18
242 #define CISTPL_JEDEC_A		0x19
243 #define CISTPL_CONFIG		0x1a
244 #define CISTPL_CFTABLE_ENTRY	0x1b
245 #define CISTPL_DEVICE_OC	0x1c
246 #define CISTPL_DEVICE_OA	0x1d
247 #define CISTPL_DEVICE_GEO	0x1e
248 #define CISTPL_DEVICE_GEO_A	0x1f
249 #define CISTPL_MANFID		0x20
250 #define CISTPL_FUNCID		0x21
251 #define CISTPL_FUNCE		0x22
252 #define CISTPL_SWIL		0x23
253 #define CISTPL_END		0xff
254 
255 /*
256  * CIS Function ID codes
257  */
258 #define CISTPL_FUNCID_MULTI	0x00
259 #define CISTPL_FUNCID_MEMORY	0x01
260 #define CISTPL_FUNCID_SERIAL	0x02
261 #define CISTPL_FUNCID_PARALLEL	0x03
262 #define CISTPL_FUNCID_FIXED	0x04
263 #define CISTPL_FUNCID_VIDEO	0x05
264 #define CISTPL_FUNCID_NETWORK	0x06
265 #define CISTPL_FUNCID_AIMS	0x07
266 #define CISTPL_FUNCID_SCSI	0x08
267 
268 /*
269  * Fixed Disk FUNCE codes
270  */
271 #define CISTPL_IDE_INTERFACE	0x01
272 
273 #define CISTPL_FUNCE_IDE_IFACE	0x01
274 #define CISTPL_FUNCE_IDE_MASTER	0x02
275 #define CISTPL_FUNCE_IDE_SLAVE	0x03
276 
277 /* First feature byte */
278 #define CISTPL_IDE_SILICON	0x04
279 #define CISTPL_IDE_UNIQUE	0x08
280 #define CISTPL_IDE_DUAL		0x10
281 
282 /* Second feature byte */
283 #define CISTPL_IDE_HAS_SLEEP	0x01
284 #define CISTPL_IDE_HAS_STANDBY	0x02
285 #define CISTPL_IDE_HAS_IDLE	0x04
286 #define CISTPL_IDE_LOW_POWER	0x08
287 #define CISTPL_IDE_REG_INHIBIT	0x10
288 #define CISTPL_IDE_HAS_INDEX	0x20
289 #define CISTPL_IDE_IOIS16	0x40
290 
291 #endif
292 
293 #ifdef	CONFIG_8xx
294 extern u_int *pcmcia_pgcrx[];
295 #define	PCMCIA_PGCRX(slot)	(*pcmcia_pgcrx[slot])
296 #endif
297 
298 #if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
299 extern int check_ide_device(int slot);
300 #endif
301 
302 #endif /* _PCMCIA_H */
303