1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2affae2bfSwdenk /* 304a85b3bSwdenk * (C) Copyright 2000-2004 4affae2bfSwdenk * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5affae2bfSwdenk */ 6affae2bfSwdenk 7affae2bfSwdenk #ifndef _PCMCIA_H 8affae2bfSwdenk #define _PCMCIA_H 9affae2bfSwdenk 10affae2bfSwdenk #include <common.h> 11affae2bfSwdenk #include <config.h> 12affae2bfSwdenk 13affae2bfSwdenk /* 14affae2bfSwdenk * Allow configuration to select PCMCIA slot, 15affae2bfSwdenk * or try to generate a useful default 16affae2bfSwdenk */ 175b8e76c3SHeiko Schocher #if defined(CONFIG_CMD_PCMCIA) 18affae2bfSwdenk 19affae2bfSwdenk #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 20affae2bfSwdenk # error "PCMCIA Slot not configured" 21affae2bfSwdenk #endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */ 22affae2bfSwdenk 23affae2bfSwdenk /* Make sure exactly one slot is defined - we support only one for now */ 24affae2bfSwdenk #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 25affae2bfSwdenk #error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured 26affae2bfSwdenk #endif 27affae2bfSwdenk #if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B) 28affae2bfSwdenk #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured 29affae2bfSwdenk #endif 30affae2bfSwdenk 31ea909b76Swdenk #ifndef PCMCIA_SOCKETS_NO 32affae2bfSwdenk #define PCMCIA_SOCKETS_NO 1 33ea909b76Swdenk #endif 34ea909b76Swdenk #ifndef PCMCIA_MEM_WIN_NO 35affae2bfSwdenk #define PCMCIA_MEM_WIN_NO 4 36ea909b76Swdenk #endif 37affae2bfSwdenk #define PCMCIA_IO_WIN_NO 2 38affae2bfSwdenk 39affae2bfSwdenk /* define _slot_ to be able to optimize macros */ 40affae2bfSwdenk #ifdef CONFIG_PCMCIA_SLOT_A 41affae2bfSwdenk # define _slot_ 0 42affae2bfSwdenk # define PCMCIA_SLOT_MSG "slot A" 43affae2bfSwdenk # define PCMCIA_SLOT_x PCMCIA_PSLOT_A 44affae2bfSwdenk #else 45affae2bfSwdenk # define _slot_ 1 46affae2bfSwdenk # define PCMCIA_SLOT_MSG "slot B" 47affae2bfSwdenk # define PCMCIA_SLOT_x PCMCIA_PSLOT_B 48affae2bfSwdenk #endif 49affae2bfSwdenk 50affae2bfSwdenk /* 51affae2bfSwdenk * This structure is used to address each window in the PCMCIA controller. 52affae2bfSwdenk * 53affae2bfSwdenk * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly 54affae2bfSwdenk * after pcmcia_win_t[n]... 55affae2bfSwdenk */ 56affae2bfSwdenk 57affae2bfSwdenk typedef struct { 58affae2bfSwdenk ulong br; 59affae2bfSwdenk ulong or; 60affae2bfSwdenk } pcmcia_win_t; 61affae2bfSwdenk 62affae2bfSwdenk /**********************************************************************/ 63affae2bfSwdenk 64affae2bfSwdenk /* 65affae2bfSwdenk * CIS Tupel codes 66affae2bfSwdenk */ 67affae2bfSwdenk #define CISTPL_NULL 0x00 68affae2bfSwdenk #define CISTPL_DEVICE 0x01 69affae2bfSwdenk #define CISTPL_LONGLINK_CB 0x02 70affae2bfSwdenk #define CISTPL_INDIRECT 0x03 71affae2bfSwdenk #define CISTPL_CONFIG_CB 0x04 72affae2bfSwdenk #define CISTPL_CFTABLE_ENTRY_CB 0x05 73affae2bfSwdenk #define CISTPL_LONGLINK_MFC 0x06 74affae2bfSwdenk #define CISTPL_BAR 0x07 75affae2bfSwdenk #define CISTPL_PWR_MGMNT 0x08 76affae2bfSwdenk #define CISTPL_EXTDEVICE 0x09 77affae2bfSwdenk #define CISTPL_CHECKSUM 0x10 78affae2bfSwdenk #define CISTPL_LONGLINK_A 0x11 79affae2bfSwdenk #define CISTPL_LONGLINK_C 0x12 80affae2bfSwdenk #define CISTPL_LINKTARGET 0x13 81affae2bfSwdenk #define CISTPL_NO_LINK 0x14 82affae2bfSwdenk #define CISTPL_VERS_1 0x15 83affae2bfSwdenk #define CISTPL_ALTSTR 0x16 84affae2bfSwdenk #define CISTPL_DEVICE_A 0x17 85affae2bfSwdenk #define CISTPL_JEDEC_C 0x18 86affae2bfSwdenk #define CISTPL_JEDEC_A 0x19 87affae2bfSwdenk #define CISTPL_CONFIG 0x1a 88affae2bfSwdenk #define CISTPL_CFTABLE_ENTRY 0x1b 89affae2bfSwdenk #define CISTPL_DEVICE_OC 0x1c 90affae2bfSwdenk #define CISTPL_DEVICE_OA 0x1d 91affae2bfSwdenk #define CISTPL_DEVICE_GEO 0x1e 92affae2bfSwdenk #define CISTPL_DEVICE_GEO_A 0x1f 93affae2bfSwdenk #define CISTPL_MANFID 0x20 94affae2bfSwdenk #define CISTPL_FUNCID 0x21 95affae2bfSwdenk #define CISTPL_FUNCE 0x22 96affae2bfSwdenk #define CISTPL_SWIL 0x23 97affae2bfSwdenk #define CISTPL_END 0xff 98affae2bfSwdenk 99affae2bfSwdenk /* 100affae2bfSwdenk * CIS Function ID codes 101affae2bfSwdenk */ 102affae2bfSwdenk #define CISTPL_FUNCID_MULTI 0x00 103affae2bfSwdenk #define CISTPL_FUNCID_MEMORY 0x01 104affae2bfSwdenk #define CISTPL_FUNCID_SERIAL 0x02 105affae2bfSwdenk #define CISTPL_FUNCID_PARALLEL 0x03 106affae2bfSwdenk #define CISTPL_FUNCID_FIXED 0x04 107affae2bfSwdenk #define CISTPL_FUNCID_VIDEO 0x05 108affae2bfSwdenk #define CISTPL_FUNCID_NETWORK 0x06 109affae2bfSwdenk #define CISTPL_FUNCID_AIMS 0x07 110affae2bfSwdenk #define CISTPL_FUNCID_SCSI 0x08 111affae2bfSwdenk 112affae2bfSwdenk /* 113affae2bfSwdenk * Fixed Disk FUNCE codes 114affae2bfSwdenk */ 115affae2bfSwdenk #define CISTPL_IDE_INTERFACE 0x01 116affae2bfSwdenk 117affae2bfSwdenk #define CISTPL_FUNCE_IDE_IFACE 0x01 118affae2bfSwdenk #define CISTPL_FUNCE_IDE_MASTER 0x02 119affae2bfSwdenk #define CISTPL_FUNCE_IDE_SLAVE 0x03 120affae2bfSwdenk 121affae2bfSwdenk /* First feature byte */ 122affae2bfSwdenk #define CISTPL_IDE_SILICON 0x04 123affae2bfSwdenk #define CISTPL_IDE_UNIQUE 0x08 124affae2bfSwdenk #define CISTPL_IDE_DUAL 0x10 125affae2bfSwdenk 126affae2bfSwdenk /* Second feature byte */ 127affae2bfSwdenk #define CISTPL_IDE_HAS_SLEEP 0x01 128affae2bfSwdenk #define CISTPL_IDE_HAS_STANDBY 0x02 129affae2bfSwdenk #define CISTPL_IDE_HAS_IDLE 0x04 130affae2bfSwdenk #define CISTPL_IDE_LOW_POWER 0x08 131affae2bfSwdenk #define CISTPL_IDE_REG_INHIBIT 0x10 132affae2bfSwdenk #define CISTPL_IDE_HAS_INDEX 0x20 133affae2bfSwdenk #define CISTPL_IDE_IOIS16 0x40 134affae2bfSwdenk 135068b60a0SJon Loeliger #endif 136affae2bfSwdenk 137affae2bfSwdenk #endif /* _PCMCIA_H */ 138