xref: /openbmc/u-boot/include/palmas.h (revision ca831f4933dc68d9ed1b6399cbda90068c520005)
1  /*
2   * (C) Copyright 2012-2013
3   * Texas Instruments, <www.ti.com>
4   *
5   * SPDX-License-Identifier:	GPL-2.0+
6   */
7  #ifndef PALMAS_H
8  #define PALMAS_H
9  
10  #include <common.h>
11  #include <i2c.h>
12  
13  /* I2C chip addresses, TW6035/37 */
14  #define TWL603X_CHIP_P1		0x48	/* Page 1 */
15  #define TWL603X_CHIP_P2		0x49	/* Page 2 */
16  #define TWL603X_CHIP_P3		0x4a	/* Page 3 */
17  
18  /* TPS659038/39 */
19  #define TPS65903X_CHIP_P1	0x58	/* Page 1 */
20  
21  /* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */
22  
23  /* LDO1 control/voltage */
24  #define LDO1_CTRL		0x50
25  #define LDO1_VOLTAGE		0x51
26  
27  /* LDO2 control/voltage */
28  #define LDO2_CTRL		0x52
29  #define LDO2_VOLTAGE		0x53
30  
31  /* LDO9 control/voltage */
32  #define LDO9_CTRL		0x60
33  #define LDO9_VOLTAGE		0x61
34  
35  /* LDOUSB control/voltage */
36  #define LDOUSB_CTRL		0x64
37  #define LDOUSB_VOLTAGE		0x65
38  #define LDO_CTRL		0x6a
39  
40  /* Control of 32 kHz audio clock */
41  #define CLK32KGAUDIO_CTRL	0xd5
42  
43  /* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
44  #define SYSEN2_CTRL		0xd9
45  
46  /*
47   * Bit field definitions for LDOx_CTRL, SYSENx_CTRL
48   * and some other xxx_CTRL resources:
49   */
50  #define LDO9_BYP_EN		(1 << 6)	/* LDO9 only! */
51  #define RSC_STAT_ON		(1 << 4)	/* RO status bit! */
52  #define RSC_MODE_SLEEP		(1 << 2)
53  #define RSC_MODE_ACTIVE		(1 << 0)
54  
55  /* Some LDO voltage values */
56  #define LDO_VOLT_OFF		0
57  #define LDO_VOLT_1V8		0x13
58  #define LDO_VOLT_3V0		0x2b
59  #define LDO_VOLT_3V3		0x31
60  /* Request bypass, LDO9 only */
61  #define LDO9_BYPASS		0x3f
62  
63  /* SMPS7_CTRL */
64  #define SMPS7_CTRL		0x30
65  
66  /* SMPS9_CTRL */
67  #define SMPS9_CTRL		0x38
68  #define SMPS9_VOLTAGE		0x3b
69  
70  /* SMPS10_CTRL */
71  #define SMPS10_CTRL		0x3c
72  #define SMPS10_MODE_ACTIVE_D	0x0d
73  
74  /* Bit field definitions for SMPSx_CTRL */
75  #define SMPS_MODE_ACT_AUTO	1
76  #define SMPS_MODE_ACT_ECO	2
77  #define SMPS_MODE_ACT_FPWM	3
78  #define SMPS_MODE_SLP_AUTO	(1 << 2)
79  #define SMPS_MODE_SLP_ECO	(2 << 2)
80  #define SMPS_MODE_SLP_FPWM	(3 << 2)
81  
82  /*
83   * Some popular SMPS voltages, all with RANGE=1; note
84   * that RANGE cannot be changed on the fly
85   */
86  #define SMPS_VOLT_OFF		0
87  #define SMPS_VOLT_1V2		0x90
88  #define SMPS_VOLT_1V8		0xae
89  #define SMPS_VOLT_2V1		0xbd
90  #define SMPS_VOLT_3V0		0xea
91  #define SMPS_VOLT_3V3		0xf9
92  
93  /* Backup Battery & VRTC Control */
94  #define BB_VRTC_CTRL		0xa8
95  /* Bit definitions for BB_VRTC_CTRL */
96  #define VRTC_EN_SLP		(1 << 6)
97  #define VRTC_EN_OFF		(1 << 5)
98  #define VRTC_PWEN		(1 << 4)
99  #define BB_LOW_ICHRG		(1 << 3)
100  #define BB_HIGH_ICHRG		(0 << 3)
101  #define BB_VSEL_3V0		(0 << 1)
102  #define BB_VSEL_2V5		(1 << 1)
103  #define BB_VSEL_3V15		(2 << 1)
104  #define BB_VSEL_VBAT		(3 << 1)
105  #define BB_CHRG_EN		(1 << 0)
106  
107  /*
108   * Functions to read and write from TPS659038/TWL6035/TWL6037
109   * or other Palmas family of TI PMICs
110   */
111  static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
112  {
113  	return i2c_write(chip_no, reg, 1, &val, 1);
114  }
115  
116  static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
117  {
118  	return i2c_read(chip_no, reg, 1, val, 1);
119  }
120  
121  void palmas_init_settings(void);
122  int palmas_mmc1_poweron_ldo(void);
123  int twl603x_mmc1_set_ldo9(u8 vsel);
124  int twl603x_audio_power(u8 on);
125  int twl603x_enable_bb_charge(u8 bb_fields);
126  int palmas_enable_ss_ldo(void);
127  
128  #endif /* PALMAS_H */
129