1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 24cf9e464SStefan Roese /* 34cf9e464SStefan Roese * Copyright (C) 2016 Stefan Roese <sr@denx.de> 44cf9e464SStefan Roese */ 54cf9e464SStefan Roese 64cf9e464SStefan Roese #ifndef _NUVOTON_NCT6102D_H_ 74cf9e464SStefan Roese #define _NUVOTON_NCT6102D_H_ 84cf9e464SStefan Roese 94cf9e464SStefan Roese /* I/O address of Nuvoton Super IO chip */ 104cf9e464SStefan Roese #define NCT6102D_IO_PORT 0x4e 114cf9e464SStefan Roese 124cf9e464SStefan Roese /* Extended Function Enable Registers */ 134cf9e464SStefan Roese #define NCT_EFER (NCT6102D_IO_PORT + 0) 144cf9e464SStefan Roese /* Extended Function Index Register (same as EFER) */ 154cf9e464SStefan Roese #define NCT_EFIR (NCT6102D_IO_PORT + 0) 164cf9e464SStefan Roese /* Extended Function Data Register */ 174cf9e464SStefan Roese #define NCT_EFDR (NCT_EFIR + 1) 184cf9e464SStefan Roese 194cf9e464SStefan Roese #define NCT_LD_SELECT_REG 0x07 204cf9e464SStefan Roese 214cf9e464SStefan Roese /* Logical device number */ 224cf9e464SStefan Roese #define NCT6102D_LD_UARTA 0x02 234cf9e464SStefan Roese #define NCT6102D_LD_WDT 0x08 244cf9e464SStefan Roese 254cf9e464SStefan Roese #define NCT6102D_UARTA_ENABLE 0x30 264cf9e464SStefan Roese #define NCT6102D_WDT_TIMEOUT 0xf1 274cf9e464SStefan Roese 284cf9e464SStefan Roese #define NCT_ENTRY_KEY 0x87 294cf9e464SStefan Roese #define NCT_EXIT_KEY 0xaa 304cf9e464SStefan Roese 314cf9e464SStefan Roese int nct6102d_wdt_disable(void); 324cf9e464SStefan Roese 334cf9e464SStefan Roese #endif /* _NUVOTON_NCT6102D_H_ */ 34