1 /* 2 * (C) Copyright 2008 3 * Benjamin Warren, biggerbadderben@gmail.com 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 /* 25 * netdev.h - definitions an prototypes for network devices 26 */ 27 28 #ifndef _NETDEV_H_ 29 #define _NETDEV_H_ 30 31 /* 32 * Board and CPU-specific initialization functions 33 * board_eth_init() has highest priority. cpu_eth_init() only 34 * gets called if board_eth_init() isn't instantiated or fails. 35 * Return values: 36 * 0: success 37 * -1: failure 38 */ 39 40 int board_eth_init(bd_t *bis); 41 int cpu_eth_init(bd_t *bis); 42 43 /* Driver initialization prototypes */ 44 int altera_tse_initialize(u8 dev_num, int mac_base, 45 int sgdma_rx_base, int sgdma_tx_base, 46 u32 sgdma_desc_base, u32 sgdma_desc_size); 47 int at91emac_register(bd_t *bis, unsigned long iobase); 48 int au1x00_enet_initialize(bd_t*); 49 int ax88180_initialize(bd_t *bis); 50 int bfin_EMAC_initialize(bd_t *bis); 51 int calxedaxgmac_initialize(u32 id, ulong base_addr); 52 int cs8900_initialize(u8 dev_num, int base_addr); 53 int davinci_emac_initialize(void); 54 int dc21x4x_initialize(bd_t *bis); 55 int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface); 56 int dm9000_initialize(bd_t *bis); 57 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); 58 int e1000_initialize(bd_t *bis); 59 int eepro100_initialize(bd_t *bis); 60 int enc28j60_initialize(unsigned int bus, unsigned int cs, 61 unsigned int max_hz, unsigned int mode); 62 int ep93xx_eth_initialize(u8 dev_num, int base_addr); 63 int eth_3com_initialize (bd_t * bis); 64 int ethoc_initialize(u8 dev_num, int base_addr); 65 int fec_initialize (bd_t *bis); 66 int fecmxc_initialize(bd_t *bis); 67 int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); 68 int ftgmac100_initialize(bd_t *bits); 69 int ftmac100_initialize(bd_t *bits); 70 int ftmac110_initialize(bd_t *bits); 71 int greth_initialize(bd_t *bis); 72 void gt6426x_eth_initialize(bd_t *bis); 73 int inca_switch_initialize(bd_t *bis); 74 int ks8695_eth_initialize(void); 75 int ks8851_mll_initialize(u8 dev_num, int base_addr); 76 int lan91c96_initialize(u8 dev_num, int base_addr); 77 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); 78 int mcdmafec_initialize(bd_t *bis); 79 int mcffec_initialize(bd_t *bis); 80 int mpc512x_fec_initialize(bd_t *bis); 81 int mpc5xxx_fec_initialize(bd_t *bis); 82 int mpc82xx_scc_enet_initialize(bd_t *bis); 83 int mvgbe_initialize(bd_t *bis); 84 int natsemi_initialize(bd_t *bis); 85 int ne2k_register(void); 86 int npe_initialize(bd_t *bis); 87 int ns8382x_initialize(bd_t *bis); 88 int pcnet_initialize(bd_t *bis); 89 int plb2800_eth_initialize(bd_t *bis); 90 int ppc_4xx_eth_initialize (bd_t *bis); 91 int rtl8139_initialize(bd_t *bis); 92 int rtl8169_initialize(bd_t *bis); 93 int scc_initialize(bd_t *bis); 94 int sh_eth_initialize(bd_t *bis); 95 int skge_initialize(bd_t *bis); 96 int smc91111_initialize(u8 dev_num, int base_addr); 97 int smc911x_initialize(u8 dev_num, int base_addr); 98 int sunxi_wemac_initialize(bd_t *bis); 99 int tsi108_eth_initialize(bd_t *bis); 100 int uec_standard_init(bd_t *bis); 101 int uli526x_initialize(bd_t *bis); 102 int armada100_fec_register(unsigned long base_addr); 103 int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, 104 unsigned long dma_addr); 105 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, 106 int txpp, int rxpp); 107 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, 108 unsigned long ctrl_addr); 109 int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio); 110 /* 111 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface 112 * exported by a public hader file, we need a global definition at this point. 113 */ 114 #if defined(CONFIG_XILINX_LL_TEMAC) 115 #define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */ 116 #define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */ 117 #define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */ 118 #endif 119 120 /* Boards with PCI network controllers can call this from their board_eth_init() 121 * function to initialize whatever's on board. 122 * Return value is total # of devices found */ 123 124 static inline int pci_eth_init(bd_t *bis) 125 { 126 int num = 0; 127 128 #ifdef CONFIG_PCI 129 130 #ifdef CONFIG_EEPRO100 131 num += eepro100_initialize(bis); 132 #endif 133 #ifdef CONFIG_TULIP 134 num += dc21x4x_initialize(bis); 135 #endif 136 #ifdef CONFIG_E1000 137 num += e1000_initialize(bis); 138 #endif 139 #ifdef CONFIG_PCNET 140 num += pcnet_initialize(bis); 141 #endif 142 #ifdef CONFIG_NATSEMI 143 num += natsemi_initialize(bis); 144 #endif 145 #ifdef CONFIG_NS8382X 146 num += ns8382x_initialize(bis); 147 #endif 148 #if defined(CONFIG_RTL8139) 149 num += rtl8139_initialize(bis); 150 #endif 151 #if defined(CONFIG_RTL8169) 152 num += rtl8169_initialize(bis); 153 #endif 154 #if defined(CONFIG_ULI526X) 155 num += uli526x_initialize(bis); 156 #endif 157 158 #endif /* CONFIG_PCI */ 159 return num; 160 } 161 162 /* 163 * Boards with mv88e61xx switch can use this by defining 164 * CONFIG_MV88E61XX_SWITCH in respective board configheader file 165 * the stuct and enums here are used to specify switch configuration params 166 */ 167 #if defined(CONFIG_MV88E61XX_SWITCH) 168 169 /* constants for any 88E61xx switch */ 170 #define MV88E61XX_MAX_PORTS_NUM 6 171 172 enum mv88e61xx_cfg_mdip { 173 MV88E61XX_MDIP_NOCHANGE, 174 MV88E61XX_MDIP_REVERSE 175 }; 176 177 enum mv88e61xx_cfg_ledinit { 178 MV88E61XX_LED_INIT_DIS, 179 MV88E61XX_LED_INIT_EN 180 }; 181 182 enum mv88e61xx_cfg_rgmiid { 183 MV88E61XX_RGMII_DELAY_DIS, 184 MV88E61XX_RGMII_DELAY_EN 185 }; 186 187 enum mv88e61xx_cfg_prtstt { 188 MV88E61XX_PORTSTT_DISABLED, 189 MV88E61XX_PORTSTT_BLOCKING, 190 MV88E61XX_PORTSTT_LEARNING, 191 MV88E61XX_PORTSTT_FORWARDING 192 }; 193 194 struct mv88e61xx_config { 195 char *name; 196 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM]; 197 enum mv88e61xx_cfg_rgmiid rgmii_delay; 198 enum mv88e61xx_cfg_prtstt portstate; 199 enum mv88e61xx_cfg_ledinit led_init; 200 enum mv88e61xx_cfg_mdip mdip; 201 u32 ports_enabled; 202 u8 cpuport; 203 }; 204 205 /* 206 * Common mappings for Internal VLANs 207 * These mappings consider that all ports are useable; the driver 208 * will mask inexistent/unused ports. 209 */ 210 211 /* Switch mode : routes any port to any port */ 212 #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F } 213 214 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */ 215 #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F } 216 217 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); 218 #endif /* CONFIG_MV88E61XX_SWITCH */ 219 220 struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id); 221 #ifdef CONFIG_PHYLIB 222 struct phy_device; 223 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, 224 struct mii_dev *bus, struct phy_device *phydev); 225 #else 226 /* 227 * Allow FEC to fine-tune MII configuration on boards which require this. 228 */ 229 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); 230 #endif 231 232 #endif /* _NETDEV_H_ */ 233