1 /* 2 * (C) Copyright 2008 3 * Benjamin Warren, biggerbadderben@gmail.com 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 /* 9 * netdev.h - definitions an prototypes for network devices 10 */ 11 12 #ifndef _NETDEV_H_ 13 #define _NETDEV_H_ 14 15 /* 16 * Board and CPU-specific initialization functions 17 * board_eth_init() has highest priority. cpu_eth_init() only 18 * gets called if board_eth_init() isn't instantiated or fails. 19 * Return values: 20 * 0: success 21 * -1: failure 22 */ 23 24 int board_eth_init(bd_t *bis); 25 int cpu_eth_init(bd_t *bis); 26 27 /* Driver initialization prototypes */ 28 int altera_tse_initialize(u8 dev_num, int mac_base, 29 int sgdma_rx_base, int sgdma_tx_base, 30 u32 sgdma_desc_base, u32 sgdma_desc_size); 31 int at91emac_register(bd_t *bis, unsigned long iobase); 32 int au1x00_enet_initialize(bd_t*); 33 int ax88180_initialize(bd_t *bis); 34 int bfin_EMAC_initialize(bd_t *bis); 35 int calxedaxgmac_initialize(u32 id, ulong base_addr); 36 int cs8900_initialize(u8 dev_num, int base_addr); 37 int davinci_emac_initialize(void); 38 int dc21x4x_initialize(bd_t *bis); 39 int designware_initialize(ulong base_addr, u32 interface); 40 int dm9000_initialize(bd_t *bis); 41 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); 42 int e1000_initialize(bd_t *bis); 43 int eepro100_initialize(bd_t *bis); 44 int enc28j60_initialize(unsigned int bus, unsigned int cs, 45 unsigned int max_hz, unsigned int mode); 46 int ep93xx_eth_initialize(u8 dev_num, int base_addr); 47 int eth_3com_initialize (bd_t * bis); 48 int ethoc_initialize(u8 dev_num, int base_addr); 49 int fec_initialize (bd_t *bis); 50 int fecmxc_initialize(bd_t *bis); 51 int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); 52 int ftgmac100_initialize(bd_t *bits); 53 int ftmac100_initialize(bd_t *bits); 54 int ftmac110_initialize(bd_t *bits); 55 int greth_initialize(bd_t *bis); 56 void gt6426x_eth_initialize(bd_t *bis); 57 int ks8695_eth_initialize(void); 58 int ks8851_mll_initialize(u8 dev_num, int base_addr); 59 int lan91c96_initialize(u8 dev_num, int base_addr); 60 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); 61 int mcdmafec_initialize(bd_t *bis); 62 int mcffec_initialize(bd_t *bis); 63 int mpc512x_fec_initialize(bd_t *bis); 64 int mpc5xxx_fec_initialize(bd_t *bis); 65 int mpc82xx_scc_enet_initialize(bd_t *bis); 66 int mvgbe_initialize(bd_t *bis); 67 int natsemi_initialize(bd_t *bis); 68 int ne2k_register(void); 69 int npe_initialize(bd_t *bis); 70 int ns8382x_initialize(bd_t *bis); 71 int pcnet_initialize(bd_t *bis); 72 int plb2800_eth_initialize(bd_t *bis); 73 int ppc_4xx_eth_initialize (bd_t *bis); 74 int rtl8139_initialize(bd_t *bis); 75 int rtl8169_initialize(bd_t *bis); 76 int scc_initialize(bd_t *bis); 77 int sh_eth_initialize(bd_t *bis); 78 int skge_initialize(bd_t *bis); 79 int smc91111_initialize(u8 dev_num, int base_addr); 80 int smc911x_initialize(u8 dev_num, int base_addr); 81 int sunxi_wemac_initialize(bd_t *bis); 82 int tsi108_eth_initialize(bd_t *bis); 83 int uec_standard_init(bd_t *bis); 84 int uli526x_initialize(bd_t *bis); 85 int armada100_fec_register(unsigned long base_addr); 86 int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, 87 unsigned long dma_addr); 88 int xilinx_emaclite_of_init(const void *blob); 89 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, 90 int txpp, int rxpp); 91 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, 92 unsigned long ctrl_addr); 93 int zynq_gem_of_init(const void *blob); 94 int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio); 95 /* 96 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface 97 * exported by a public hader file, we need a global definition at this point. 98 */ 99 #if defined(CONFIG_XILINX_LL_TEMAC) 100 #define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */ 101 #define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */ 102 #define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */ 103 #endif 104 105 /* Boards with PCI network controllers can call this from their board_eth_init() 106 * function to initialize whatever's on board. 107 * Return value is total # of devices found */ 108 109 static inline int pci_eth_init(bd_t *bis) 110 { 111 int num = 0; 112 113 #ifdef CONFIG_PCI 114 115 #ifdef CONFIG_EEPRO100 116 num += eepro100_initialize(bis); 117 #endif 118 #ifdef CONFIG_TULIP 119 num += dc21x4x_initialize(bis); 120 #endif 121 #ifdef CONFIG_E1000 122 num += e1000_initialize(bis); 123 #endif 124 #ifdef CONFIG_PCNET 125 num += pcnet_initialize(bis); 126 #endif 127 #ifdef CONFIG_NATSEMI 128 num += natsemi_initialize(bis); 129 #endif 130 #ifdef CONFIG_NS8382X 131 num += ns8382x_initialize(bis); 132 #endif 133 #if defined(CONFIG_RTL8139) 134 num += rtl8139_initialize(bis); 135 #endif 136 #if defined(CONFIG_RTL8169) 137 num += rtl8169_initialize(bis); 138 #endif 139 #if defined(CONFIG_ULI526X) 140 num += uli526x_initialize(bis); 141 #endif 142 143 #endif /* CONFIG_PCI */ 144 return num; 145 } 146 147 /* 148 * Boards with mv88e61xx switch can use this by defining 149 * CONFIG_MV88E61XX_SWITCH in respective board configheader file 150 * the stuct and enums here are used to specify switch configuration params 151 */ 152 #if defined(CONFIG_MV88E61XX_SWITCH) 153 154 /* constants for any 88E61xx switch */ 155 #define MV88E61XX_MAX_PORTS_NUM 6 156 157 enum mv88e61xx_cfg_mdip { 158 MV88E61XX_MDIP_NOCHANGE, 159 MV88E61XX_MDIP_REVERSE 160 }; 161 162 enum mv88e61xx_cfg_ledinit { 163 MV88E61XX_LED_INIT_DIS, 164 MV88E61XX_LED_INIT_EN 165 }; 166 167 enum mv88e61xx_cfg_rgmiid { 168 MV88E61XX_RGMII_DELAY_DIS, 169 MV88E61XX_RGMII_DELAY_EN 170 }; 171 172 enum mv88e61xx_cfg_prtstt { 173 MV88E61XX_PORTSTT_DISABLED, 174 MV88E61XX_PORTSTT_BLOCKING, 175 MV88E61XX_PORTSTT_LEARNING, 176 MV88E61XX_PORTSTT_FORWARDING 177 }; 178 179 struct mv88e61xx_config { 180 char *name; 181 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM]; 182 enum mv88e61xx_cfg_rgmiid rgmii_delay; 183 enum mv88e61xx_cfg_prtstt portstate; 184 enum mv88e61xx_cfg_ledinit led_init; 185 enum mv88e61xx_cfg_mdip mdip; 186 u32 ports_enabled; 187 u8 cpuport; 188 }; 189 190 /* 191 * Common mappings for Internal VLANs 192 * These mappings consider that all ports are useable; the driver 193 * will mask inexistent/unused ports. 194 */ 195 196 /* Switch mode : routes any port to any port */ 197 #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F } 198 199 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */ 200 #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F } 201 202 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); 203 #endif /* CONFIG_MV88E61XX_SWITCH */ 204 205 struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id); 206 #ifdef CONFIG_PHYLIB 207 struct phy_device; 208 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, 209 struct mii_dev *bus, struct phy_device *phydev); 210 #else 211 /* 212 * Allow FEC to fine-tune MII configuration on boards which require this. 213 */ 214 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); 215 #endif 216 217 #endif /* _NETDEV_H_ */ 218