1 /* 2 * (C) Copyright 2008 3 * Benjamin Warren, biggerbadderben@gmail.com 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 /* 9 * netdev.h - definitions an prototypes for network devices 10 */ 11 12 #ifndef _NETDEV_H_ 13 #define _NETDEV_H_ 14 15 /* 16 * Board and CPU-specific initialization functions 17 * board_eth_init() has highest priority. cpu_eth_init() only 18 * gets called if board_eth_init() isn't instantiated or fails. 19 * Return values: 20 * 0: success 21 * -1: failure 22 */ 23 24 int board_eth_init(bd_t *bis); 25 int cpu_eth_init(bd_t *bis); 26 27 /* Driver initialization prototypes */ 28 int altera_tse_initialize(u8 dev_num, int mac_base, 29 int sgdma_rx_base, int sgdma_tx_base, 30 u32 sgdma_desc_base, u32 sgdma_desc_size); 31 int at91emac_register(bd_t *bis, unsigned long iobase); 32 int au1x00_enet_initialize(bd_t*); 33 int ax88180_initialize(bd_t *bis); 34 int bfin_EMAC_initialize(bd_t *bis); 35 int calxedaxgmac_initialize(u32 id, ulong base_addr); 36 int cs8900_initialize(u8 dev_num, int base_addr); 37 int davinci_emac_initialize(void); 38 int dc21x4x_initialize(bd_t *bis); 39 int designware_initialize(ulong base_addr, u32 interface); 40 int dm9000_initialize(bd_t *bis); 41 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); 42 int e1000_initialize(bd_t *bis); 43 int eepro100_initialize(bd_t *bis); 44 int enc28j60_initialize(unsigned int bus, unsigned int cs, 45 unsigned int max_hz, unsigned int mode); 46 int ep93xx_eth_initialize(u8 dev_num, int base_addr); 47 int eth_3com_initialize (bd_t * bis); 48 int ethoc_initialize(u8 dev_num, int base_addr); 49 int fec_initialize (bd_t *bis); 50 int fecmxc_initialize(bd_t *bis); 51 int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); 52 int ftgmac100_initialize(bd_t *bits); 53 int ftmac100_initialize(bd_t *bits); 54 int ftmac110_initialize(bd_t *bits); 55 int greth_initialize(bd_t *bis); 56 void gt6426x_eth_initialize(bd_t *bis); 57 int ks8695_eth_initialize(void); 58 int ks8851_mll_initialize(u8 dev_num, int base_addr); 59 int lan91c96_initialize(u8 dev_num, int base_addr); 60 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); 61 int mcdmafec_initialize(bd_t *bis); 62 int mcffec_initialize(bd_t *bis); 63 int mpc512x_fec_initialize(bd_t *bis); 64 int mpc5xxx_fec_initialize(bd_t *bis); 65 int mpc82xx_scc_enet_initialize(bd_t *bis); 66 int mvgbe_initialize(bd_t *bis); 67 int natsemi_initialize(bd_t *bis); 68 int ne2k_register(void); 69 int npe_initialize(bd_t *bis); 70 int ns8382x_initialize(bd_t *bis); 71 int pcnet_initialize(bd_t *bis); 72 int plb2800_eth_initialize(bd_t *bis); 73 int ppc_4xx_eth_initialize (bd_t *bis); 74 int rtl8139_initialize(bd_t *bis); 75 int rtl8169_initialize(bd_t *bis); 76 int scc_initialize(bd_t *bis); 77 int sh_eth_initialize(bd_t *bis); 78 int skge_initialize(bd_t *bis); 79 int smc91111_initialize(u8 dev_num, int base_addr); 80 int smc911x_initialize(u8 dev_num, int base_addr); 81 int sunxi_emac_initialize(bd_t *bis); 82 int sunxi_gmac_initialize(bd_t *bis); 83 int tsi108_eth_initialize(bd_t *bis); 84 int uec_standard_init(bd_t *bis); 85 int uli526x_initialize(bd_t *bis); 86 int armada100_fec_register(unsigned long base_addr); 87 int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, 88 unsigned long dma_addr); 89 int xilinx_emaclite_of_init(const void *blob); 90 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, 91 int txpp, int rxpp); 92 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, 93 unsigned long ctrl_addr); 94 int zynq_gem_of_init(const void *blob); 95 int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio); 96 /* 97 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface 98 * exported by a public hader file, we need a global definition at this point. 99 */ 100 #if defined(CONFIG_XILINX_LL_TEMAC) 101 #define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */ 102 #define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */ 103 #define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */ 104 #endif 105 106 /* Boards with PCI network controllers can call this from their board_eth_init() 107 * function to initialize whatever's on board. 108 * Return value is total # of devices found */ 109 110 static inline int pci_eth_init(bd_t *bis) 111 { 112 int num = 0; 113 114 #ifdef CONFIG_PCI 115 116 #ifdef CONFIG_EEPRO100 117 num += eepro100_initialize(bis); 118 #endif 119 #ifdef CONFIG_TULIP 120 num += dc21x4x_initialize(bis); 121 #endif 122 #ifdef CONFIG_E1000 123 num += e1000_initialize(bis); 124 #endif 125 #ifdef CONFIG_PCNET 126 num += pcnet_initialize(bis); 127 #endif 128 #ifdef CONFIG_NATSEMI 129 num += natsemi_initialize(bis); 130 #endif 131 #ifdef CONFIG_NS8382X 132 num += ns8382x_initialize(bis); 133 #endif 134 #if defined(CONFIG_RTL8139) 135 num += rtl8139_initialize(bis); 136 #endif 137 #if defined(CONFIG_RTL8169) 138 num += rtl8169_initialize(bis); 139 #endif 140 #if defined(CONFIG_ULI526X) 141 num += uli526x_initialize(bis); 142 #endif 143 144 #endif /* CONFIG_PCI */ 145 return num; 146 } 147 148 /* 149 * Boards with mv88e61xx switch can use this by defining 150 * CONFIG_MV88E61XX_SWITCH in respective board configheader file 151 * the stuct and enums here are used to specify switch configuration params 152 */ 153 #if defined(CONFIG_MV88E61XX_SWITCH) 154 155 /* constants for any 88E61xx switch */ 156 #define MV88E61XX_MAX_PORTS_NUM 6 157 158 enum mv88e61xx_cfg_mdip { 159 MV88E61XX_MDIP_NOCHANGE, 160 MV88E61XX_MDIP_REVERSE 161 }; 162 163 enum mv88e61xx_cfg_ledinit { 164 MV88E61XX_LED_INIT_DIS, 165 MV88E61XX_LED_INIT_EN 166 }; 167 168 enum mv88e61xx_cfg_rgmiid { 169 MV88E61XX_RGMII_DELAY_DIS, 170 MV88E61XX_RGMII_DELAY_EN 171 }; 172 173 enum mv88e61xx_cfg_prtstt { 174 MV88E61XX_PORTSTT_DISABLED, 175 MV88E61XX_PORTSTT_BLOCKING, 176 MV88E61XX_PORTSTT_LEARNING, 177 MV88E61XX_PORTSTT_FORWARDING 178 }; 179 180 struct mv88e61xx_config { 181 char *name; 182 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM]; 183 enum mv88e61xx_cfg_rgmiid rgmii_delay; 184 enum mv88e61xx_cfg_prtstt portstate; 185 enum mv88e61xx_cfg_ledinit led_init; 186 enum mv88e61xx_cfg_mdip mdip; 187 u32 ports_enabled; 188 u8 cpuport; 189 }; 190 191 /* 192 * Common mappings for Internal VLANs 193 * These mappings consider that all ports are useable; the driver 194 * will mask inexistent/unused ports. 195 */ 196 197 /* Switch mode : routes any port to any port */ 198 #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F } 199 200 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */ 201 #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F } 202 203 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); 204 #endif /* CONFIG_MV88E61XX_SWITCH */ 205 206 struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id); 207 #ifdef CONFIG_PHYLIB 208 struct phy_device; 209 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, 210 struct mii_dev *bus, struct phy_device *phydev); 211 #else 212 /* 213 * Allow FEC to fine-tune MII configuration on boards which require this. 214 */ 215 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); 216 #endif 217 218 #endif /* _NETDEV_H_ */ 219