xref: /openbmc/u-boot/include/netdev.h (revision 544acb07)
1 /*
2  * (C) Copyright 2008
3  * Benjamin Warren, biggerbadderben@gmail.com
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 /*
9  * netdev.h - definitions an prototypes for network devices
10  */
11 
12 #ifndef _NETDEV_H_
13 #define _NETDEV_H_
14 
15 /*
16  * Board and CPU-specific initialization functions
17  * board_eth_init() has highest priority.  cpu_eth_init() only
18  * gets called if board_eth_init() isn't instantiated or fails.
19  * Return values:
20  *      0: success
21  *     -1: failure
22  */
23 
24 int board_eth_init(bd_t *bis);
25 int cpu_eth_init(bd_t *bis);
26 
27 /* Driver initialization prototypes */
28 int at91emac_register(bd_t *bis, unsigned long iobase);
29 int au1x00_enet_initialize(bd_t*);
30 int ax88180_initialize(bd_t *bis);
31 int bcm_sf2_eth_register(bd_t *bis, u8 dev_num);
32 int bfin_EMAC_initialize(bd_t *bis);
33 int calxedaxgmac_initialize(u32 id, ulong base_addr);
34 int cs8900_initialize(u8 dev_num, int base_addr);
35 int davinci_emac_initialize(void);
36 int dc21x4x_initialize(bd_t *bis);
37 int designware_initialize(ulong base_addr, u32 interface);
38 int dm9000_initialize(bd_t *bis);
39 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
40 int e1000_initialize(bd_t *bis);
41 int eepro100_initialize(bd_t *bis);
42 int enc28j60_initialize(unsigned int bus, unsigned int cs,
43 	unsigned int max_hz, unsigned int mode);
44 int ep93xx_eth_initialize(u8 dev_num, int base_addr);
45 int eth_3com_initialize (bd_t * bis);
46 int ethoc_initialize(u8 dev_num, int base_addr);
47 int fec_initialize (bd_t *bis);
48 int fecmxc_initialize(bd_t *bis);
49 int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
50 int ftgmac100_initialize(bd_t *bits);
51 int ftmac100_initialize(bd_t *bits);
52 int ftmac110_initialize(bd_t *bits);
53 int greth_initialize(bd_t *bis);
54 void gt6426x_eth_initialize(bd_t *bis);
55 int ks8851_mll_initialize(u8 dev_num, int base_addr);
56 int lan91c96_initialize(u8 dev_num, int base_addr);
57 int lpc32xx_eth_initialize(bd_t *bis);
58 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
59 int mcdmafec_initialize(bd_t *bis);
60 int mcffec_initialize(bd_t *bis);
61 int mpc512x_fec_initialize(bd_t *bis);
62 int mpc5xxx_fec_initialize(bd_t *bis);
63 int mpc82xx_scc_enet_initialize(bd_t *bis);
64 int mvgbe_initialize(bd_t *bis);
65 int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr);
66 int natsemi_initialize(bd_t *bis);
67 int ne2k_register(void);
68 int npe_initialize(bd_t *bis);
69 int ns8382x_initialize(bd_t *bis);
70 int pcnet_initialize(bd_t *bis);
71 int ppc_4xx_eth_initialize (bd_t *bis);
72 int rtl8139_initialize(bd_t *bis);
73 int rtl8169_initialize(bd_t *bis);
74 int scc_initialize(bd_t *bis);
75 int sh_eth_initialize(bd_t *bis);
76 int skge_initialize(bd_t *bis);
77 int smc91111_initialize(u8 dev_num, int base_addr);
78 int smc911x_initialize(u8 dev_num, int base_addr);
79 int tsi108_eth_initialize(bd_t *bis);
80 int uec_standard_init(bd_t *bis);
81 int uli526x_initialize(bd_t *bis);
82 int armada100_fec_register(unsigned long base_addr);
83 int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
84 							unsigned long dma_addr);
85 int xilinx_emaclite_of_init(const void *blob);
86 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
87 							int txpp, int rxpp);
88 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
89 						unsigned long ctrl_addr);
90 int zynq_gem_of_init(const void *blob);
91 int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
92 			int phy_addr, u32 emio);
93 /*
94  * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
95  * exported by a public hader file, we need a global definition at this point.
96  */
97 #if defined(CONFIG_XILINX_LL_TEMAC)
98 #define XILINX_LL_TEMAC_M_FIFO		0	/* use FIFO Ctrl */
99 #define XILINX_LL_TEMAC_M_SDMA_PLB	(1 << 0)/* use SDMA Ctrl via PLB */
100 #define XILINX_LL_TEMAC_M_SDMA_DCR	(1 << 1)/* use SDMA Ctrl via DCR */
101 #endif
102 
103 /* Boards with PCI network controllers can call this from their board_eth_init()
104  * function to initialize whatever's on board.
105  * Return value is total # of devices found */
106 
107 static inline int pci_eth_init(bd_t *bis)
108 {
109 	int num = 0;
110 
111 #ifdef CONFIG_PCI
112 
113 #ifdef CONFIG_EEPRO100
114 	num += eepro100_initialize(bis);
115 #endif
116 #ifdef CONFIG_TULIP
117 	num += dc21x4x_initialize(bis);
118 #endif
119 #ifdef CONFIG_E1000
120 	num += e1000_initialize(bis);
121 #endif
122 #ifdef CONFIG_PCNET
123 	num += pcnet_initialize(bis);
124 #endif
125 #ifdef CONFIG_NATSEMI
126 	num += natsemi_initialize(bis);
127 #endif
128 #ifdef CONFIG_NS8382X
129 	num += ns8382x_initialize(bis);
130 #endif
131 #if defined(CONFIG_RTL8139)
132 	num += rtl8139_initialize(bis);
133 #endif
134 #if defined(CONFIG_RTL8169)
135 	num += rtl8169_initialize(bis);
136 #endif
137 #if defined(CONFIG_ULI526X)
138 	num += uli526x_initialize(bis);
139 #endif
140 
141 #endif  /* CONFIG_PCI */
142 	return num;
143 }
144 
145 /*
146  * Boards with mv88e61xx switch can use this by defining
147  * CONFIG_MV88E61XX_SWITCH in respective board configheader file
148  * the stuct and enums here are used to specify switch configuration params
149  */
150 #if defined(CONFIG_MV88E61XX_SWITCH)
151 
152 /* constants for any 88E61xx switch */
153 #define MV88E61XX_MAX_PORTS_NUM	6
154 
155 enum mv88e61xx_cfg_mdip {
156 	MV88E61XX_MDIP_NOCHANGE,
157 	MV88E61XX_MDIP_REVERSE
158 };
159 
160 enum mv88e61xx_cfg_ledinit {
161 	MV88E61XX_LED_INIT_DIS,
162 	MV88E61XX_LED_INIT_EN
163 };
164 
165 enum mv88e61xx_cfg_rgmiid {
166 	MV88E61XX_RGMII_DELAY_DIS,
167 	MV88E61XX_RGMII_DELAY_EN
168 };
169 
170 enum mv88e61xx_cfg_prtstt {
171 	MV88E61XX_PORTSTT_DISABLED,
172 	MV88E61XX_PORTSTT_BLOCKING,
173 	MV88E61XX_PORTSTT_LEARNING,
174 	MV88E61XX_PORTSTT_FORWARDING
175 };
176 
177 struct mv88e61xx_config {
178 	char *name;
179 	u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
180 	enum mv88e61xx_cfg_rgmiid rgmii_delay;
181 	enum mv88e61xx_cfg_prtstt portstate;
182 	enum mv88e61xx_cfg_ledinit led_init;
183 	enum mv88e61xx_cfg_mdip mdip;
184 	u32 ports_enabled;
185 	u8 cpuport;
186 };
187 
188 /*
189  * Common mappings for Internal VLANs
190  * These mappings consider that all ports are useable; the driver
191  * will mask inexistent/unused ports.
192  */
193 
194 /* Switch mode : routes any port to any port */
195 #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
196 
197 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
198 #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
199 
200 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
201 #endif /* CONFIG_MV88E61XX_SWITCH */
202 
203 struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
204 #ifdef CONFIG_PHYLIB
205 struct phy_device;
206 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
207 		struct mii_dev *bus, struct phy_device *phydev);
208 #else
209 /*
210  * Allow FEC to fine-tune MII configuration on boards which require this.
211  */
212 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
213 #endif
214 
215 #endif /* _NETDEV_H_ */
216