xref: /openbmc/u-boot/include/netdev.h (revision 2f20aa82)
1 /*
2  * (C) Copyright 2008
3  * Benjamin Warren, biggerbadderben@gmail.com
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 /*
9  * netdev.h - definitions an prototypes for network devices
10  */
11 
12 #ifndef _NETDEV_H_
13 #define _NETDEV_H_
14 
15 /*
16  * Board and CPU-specific initialization functions
17  * board_eth_init() has highest priority.  cpu_eth_init() only
18  * gets called if board_eth_init() isn't instantiated or fails.
19  * Return values:
20  *      0: success
21  *     -1: failure
22  */
23 
24 int board_eth_init(bd_t *bis);
25 int cpu_eth_init(bd_t *bis);
26 
27 /* Driver initialization prototypes */
28 int altera_tse_initialize(u8 dev_num, int mac_base,
29 			  int sgdma_rx_base, int sgdma_tx_base,
30 			  u32 sgdma_desc_base, u32 sgdma_desc_size);
31 int at91emac_register(bd_t *bis, unsigned long iobase);
32 int au1x00_enet_initialize(bd_t*);
33 int ax88180_initialize(bd_t *bis);
34 int bcm_sf2_eth_register(bd_t *bis, u8 dev_num);
35 int bfin_EMAC_initialize(bd_t *bis);
36 int calxedaxgmac_initialize(u32 id, ulong base_addr);
37 int cs8900_initialize(u8 dev_num, int base_addr);
38 int davinci_emac_initialize(void);
39 int dc21x4x_initialize(bd_t *bis);
40 int designware_initialize(ulong base_addr, u32 interface);
41 int dm9000_initialize(bd_t *bis);
42 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
43 int e1000_initialize(bd_t *bis);
44 int eepro100_initialize(bd_t *bis);
45 int enc28j60_initialize(unsigned int bus, unsigned int cs,
46 	unsigned int max_hz, unsigned int mode);
47 int ep93xx_eth_initialize(u8 dev_num, int base_addr);
48 int eth_3com_initialize (bd_t * bis);
49 int ethoc_initialize(u8 dev_num, int base_addr);
50 int fec_initialize (bd_t *bis);
51 int fecmxc_initialize(bd_t *bis);
52 int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
53 int ftgmac100_initialize(bd_t *bits);
54 int ftmac100_initialize(bd_t *bits);
55 int ftmac110_initialize(bd_t *bits);
56 int greth_initialize(bd_t *bis);
57 void gt6426x_eth_initialize(bd_t *bis);
58 int ks8695_eth_initialize(void);
59 int ks8851_mll_initialize(u8 dev_num, int base_addr);
60 int lan91c96_initialize(u8 dev_num, int base_addr);
61 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
62 int mcdmafec_initialize(bd_t *bis);
63 int mcffec_initialize(bd_t *bis);
64 int mpc512x_fec_initialize(bd_t *bis);
65 int mpc5xxx_fec_initialize(bd_t *bis);
66 int mpc82xx_scc_enet_initialize(bd_t *bis);
67 int mvgbe_initialize(bd_t *bis);
68 int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr);
69 int natsemi_initialize(bd_t *bis);
70 int ne2k_register(void);
71 int npe_initialize(bd_t *bis);
72 int ns8382x_initialize(bd_t *bis);
73 int pcnet_initialize(bd_t *bis);
74 int ppc_4xx_eth_initialize (bd_t *bis);
75 int rtl8139_initialize(bd_t *bis);
76 int rtl8169_initialize(bd_t *bis);
77 int scc_initialize(bd_t *bis);
78 int sh_eth_initialize(bd_t *bis);
79 int skge_initialize(bd_t *bis);
80 int smc91111_initialize(u8 dev_num, int base_addr);
81 int smc911x_initialize(u8 dev_num, int base_addr);
82 int sunxi_emac_initialize(bd_t *bis);
83 int sunxi_gmac_initialize(bd_t *bis);
84 int tsi108_eth_initialize(bd_t *bis);
85 int uec_standard_init(bd_t *bis);
86 int uli526x_initialize(bd_t *bis);
87 int armada100_fec_register(unsigned long base_addr);
88 int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
89 							unsigned long dma_addr);
90 int xilinx_emaclite_of_init(const void *blob);
91 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
92 							int txpp, int rxpp);
93 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
94 						unsigned long ctrl_addr);
95 int zynq_gem_of_init(const void *blob);
96 int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
97 			int phy_addr, u32 emio);
98 /*
99  * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
100  * exported by a public hader file, we need a global definition at this point.
101  */
102 #if defined(CONFIG_XILINX_LL_TEMAC)
103 #define XILINX_LL_TEMAC_M_FIFO		0	/* use FIFO Ctrl */
104 #define XILINX_LL_TEMAC_M_SDMA_PLB	(1 << 0)/* use SDMA Ctrl via PLB */
105 #define XILINX_LL_TEMAC_M_SDMA_DCR	(1 << 1)/* use SDMA Ctrl via DCR */
106 #endif
107 
108 /* Boards with PCI network controllers can call this from their board_eth_init()
109  * function to initialize whatever's on board.
110  * Return value is total # of devices found */
111 
112 static inline int pci_eth_init(bd_t *bis)
113 {
114 	int num = 0;
115 
116 #ifdef CONFIG_PCI
117 
118 #ifdef CONFIG_EEPRO100
119 	num += eepro100_initialize(bis);
120 #endif
121 #ifdef CONFIG_TULIP
122 	num += dc21x4x_initialize(bis);
123 #endif
124 #ifdef CONFIG_E1000
125 	num += e1000_initialize(bis);
126 #endif
127 #ifdef CONFIG_PCNET
128 	num += pcnet_initialize(bis);
129 #endif
130 #ifdef CONFIG_NATSEMI
131 	num += natsemi_initialize(bis);
132 #endif
133 #ifdef CONFIG_NS8382X
134 	num += ns8382x_initialize(bis);
135 #endif
136 #if defined(CONFIG_RTL8139)
137 	num += rtl8139_initialize(bis);
138 #endif
139 #if defined(CONFIG_RTL8169)
140 	num += rtl8169_initialize(bis);
141 #endif
142 #if defined(CONFIG_ULI526X)
143 	num += uli526x_initialize(bis);
144 #endif
145 
146 #endif  /* CONFIG_PCI */
147 	return num;
148 }
149 
150 /*
151  * Boards with mv88e61xx switch can use this by defining
152  * CONFIG_MV88E61XX_SWITCH in respective board configheader file
153  * the stuct and enums here are used to specify switch configuration params
154  */
155 #if defined(CONFIG_MV88E61XX_SWITCH)
156 
157 /* constants for any 88E61xx switch */
158 #define MV88E61XX_MAX_PORTS_NUM	6
159 
160 enum mv88e61xx_cfg_mdip {
161 	MV88E61XX_MDIP_NOCHANGE,
162 	MV88E61XX_MDIP_REVERSE
163 };
164 
165 enum mv88e61xx_cfg_ledinit {
166 	MV88E61XX_LED_INIT_DIS,
167 	MV88E61XX_LED_INIT_EN
168 };
169 
170 enum mv88e61xx_cfg_rgmiid {
171 	MV88E61XX_RGMII_DELAY_DIS,
172 	MV88E61XX_RGMII_DELAY_EN
173 };
174 
175 enum mv88e61xx_cfg_prtstt {
176 	MV88E61XX_PORTSTT_DISABLED,
177 	MV88E61XX_PORTSTT_BLOCKING,
178 	MV88E61XX_PORTSTT_LEARNING,
179 	MV88E61XX_PORTSTT_FORWARDING
180 };
181 
182 struct mv88e61xx_config {
183 	char *name;
184 	u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
185 	enum mv88e61xx_cfg_rgmiid rgmii_delay;
186 	enum mv88e61xx_cfg_prtstt portstate;
187 	enum mv88e61xx_cfg_ledinit led_init;
188 	enum mv88e61xx_cfg_mdip mdip;
189 	u32 ports_enabled;
190 	u8 cpuport;
191 };
192 
193 /*
194  * Common mappings for Internal VLANs
195  * These mappings consider that all ports are useable; the driver
196  * will mask inexistent/unused ports.
197  */
198 
199 /* Switch mode : routes any port to any port */
200 #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
201 
202 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
203 #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
204 
205 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
206 #endif /* CONFIG_MV88E61XX_SWITCH */
207 
208 struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
209 #ifdef CONFIG_PHYLIB
210 struct phy_device;
211 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
212 		struct mii_dev *bus, struct phy_device *phydev);
213 #else
214 /*
215  * Allow FEC to fine-tune MII configuration on boards which require this.
216  */
217 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
218 #endif
219 
220 #endif /* _NETDEV_H_ */
221