1 /* 2 * (C) Copyright 2008 3 * Benjamin Warren, biggerbadderben@gmail.com 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 /* 9 * netdev.h - definitions an prototypes for network devices 10 */ 11 12 #ifndef _NETDEV_H_ 13 #define _NETDEV_H_ 14 15 /* 16 * Board and CPU-specific initialization functions 17 * board_eth_init() has highest priority. cpu_eth_init() only 18 * gets called if board_eth_init() isn't instantiated or fails. 19 * Return values: 20 * 0: success 21 * -1: failure 22 */ 23 24 int board_eth_init(bd_t *bis); 25 int cpu_eth_init(bd_t *bis); 26 27 /* Driver initialization prototypes */ 28 int altera_tse_initialize(u8 dev_num, int mac_base, 29 int sgdma_rx_base, int sgdma_tx_base, 30 u32 sgdma_desc_base, u32 sgdma_desc_size); 31 int at91emac_register(bd_t *bis, unsigned long iobase); 32 int au1x00_enet_initialize(bd_t*); 33 int ax88180_initialize(bd_t *bis); 34 int bcm_sf2_eth_register(bd_t *bis, u8 dev_num); 35 int bfin_EMAC_initialize(bd_t *bis); 36 int calxedaxgmac_initialize(u32 id, ulong base_addr); 37 int cs8900_initialize(u8 dev_num, int base_addr); 38 int davinci_emac_initialize(void); 39 int dc21x4x_initialize(bd_t *bis); 40 int designware_initialize(ulong base_addr, u32 interface); 41 int dm9000_initialize(bd_t *bis); 42 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); 43 int e1000_initialize(bd_t *bis); 44 int eepro100_initialize(bd_t *bis); 45 int enc28j60_initialize(unsigned int bus, unsigned int cs, 46 unsigned int max_hz, unsigned int mode); 47 int ep93xx_eth_initialize(u8 dev_num, int base_addr); 48 int eth_3com_initialize (bd_t * bis); 49 int ethoc_initialize(u8 dev_num, int base_addr); 50 int fec_initialize (bd_t *bis); 51 int fecmxc_initialize(bd_t *bis); 52 int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); 53 int ftgmac100_initialize(bd_t *bits); 54 int ftmac100_initialize(bd_t *bits); 55 int ftmac110_initialize(bd_t *bits); 56 int greth_initialize(bd_t *bis); 57 void gt6426x_eth_initialize(bd_t *bis); 58 int ks8851_mll_initialize(u8 dev_num, int base_addr); 59 int lan91c96_initialize(u8 dev_num, int base_addr); 60 int lpc32xx_eth_initialize(bd_t *bis); 61 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); 62 int mcdmafec_initialize(bd_t *bis); 63 int mcffec_initialize(bd_t *bis); 64 int mpc512x_fec_initialize(bd_t *bis); 65 int mpc5xxx_fec_initialize(bd_t *bis); 66 int mpc82xx_scc_enet_initialize(bd_t *bis); 67 int mvgbe_initialize(bd_t *bis); 68 int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr); 69 int natsemi_initialize(bd_t *bis); 70 int ne2k_register(void); 71 int npe_initialize(bd_t *bis); 72 int ns8382x_initialize(bd_t *bis); 73 int pch_gbe_register(bd_t *bis); 74 int pcnet_initialize(bd_t *bis); 75 int ppc_4xx_eth_initialize (bd_t *bis); 76 int rtl8139_initialize(bd_t *bis); 77 int rtl8169_initialize(bd_t *bis); 78 int scc_initialize(bd_t *bis); 79 int sh_eth_initialize(bd_t *bis); 80 int skge_initialize(bd_t *bis); 81 int smc91111_initialize(u8 dev_num, int base_addr); 82 int smc911x_initialize(u8 dev_num, int base_addr); 83 int sunxi_emac_initialize(bd_t *bis); 84 int sunxi_gmac_initialize(bd_t *bis); 85 int tsi108_eth_initialize(bd_t *bis); 86 int uec_standard_init(bd_t *bis); 87 int uli526x_initialize(bd_t *bis); 88 int armada100_fec_register(unsigned long base_addr); 89 int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, 90 unsigned long dma_addr); 91 int xilinx_emaclite_of_init(const void *blob); 92 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, 93 int txpp, int rxpp); 94 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, 95 unsigned long ctrl_addr); 96 int zynq_gem_of_init(const void *blob); 97 int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, 98 int phy_addr, u32 emio); 99 /* 100 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface 101 * exported by a public hader file, we need a global definition at this point. 102 */ 103 #if defined(CONFIG_XILINX_LL_TEMAC) 104 #define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */ 105 #define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */ 106 #define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */ 107 #endif 108 109 /* Boards with PCI network controllers can call this from their board_eth_init() 110 * function to initialize whatever's on board. 111 * Return value is total # of devices found */ 112 113 static inline int pci_eth_init(bd_t *bis) 114 { 115 int num = 0; 116 117 #ifdef CONFIG_PCI 118 119 #ifdef CONFIG_EEPRO100 120 num += eepro100_initialize(bis); 121 #endif 122 #ifdef CONFIG_TULIP 123 num += dc21x4x_initialize(bis); 124 #endif 125 #ifdef CONFIG_E1000 126 num += e1000_initialize(bis); 127 #endif 128 #ifdef CONFIG_PCH_GBE 129 num += pch_gbe_register(bis); 130 #endif 131 #ifdef CONFIG_PCNET 132 num += pcnet_initialize(bis); 133 #endif 134 #ifdef CONFIG_NATSEMI 135 num += natsemi_initialize(bis); 136 #endif 137 #ifdef CONFIG_NS8382X 138 num += ns8382x_initialize(bis); 139 #endif 140 #if defined(CONFIG_RTL8139) 141 num += rtl8139_initialize(bis); 142 #endif 143 #if defined(CONFIG_RTL8169) 144 num += rtl8169_initialize(bis); 145 #endif 146 #if defined(CONFIG_ULI526X) 147 num += uli526x_initialize(bis); 148 #endif 149 150 #endif /* CONFIG_PCI */ 151 return num; 152 } 153 154 /* 155 * Boards with mv88e61xx switch can use this by defining 156 * CONFIG_MV88E61XX_SWITCH in respective board configheader file 157 * the stuct and enums here are used to specify switch configuration params 158 */ 159 #if defined(CONFIG_MV88E61XX_SWITCH) 160 161 /* constants for any 88E61xx switch */ 162 #define MV88E61XX_MAX_PORTS_NUM 6 163 164 enum mv88e61xx_cfg_mdip { 165 MV88E61XX_MDIP_NOCHANGE, 166 MV88E61XX_MDIP_REVERSE 167 }; 168 169 enum mv88e61xx_cfg_ledinit { 170 MV88E61XX_LED_INIT_DIS, 171 MV88E61XX_LED_INIT_EN 172 }; 173 174 enum mv88e61xx_cfg_rgmiid { 175 MV88E61XX_RGMII_DELAY_DIS, 176 MV88E61XX_RGMII_DELAY_EN 177 }; 178 179 enum mv88e61xx_cfg_prtstt { 180 MV88E61XX_PORTSTT_DISABLED, 181 MV88E61XX_PORTSTT_BLOCKING, 182 MV88E61XX_PORTSTT_LEARNING, 183 MV88E61XX_PORTSTT_FORWARDING 184 }; 185 186 struct mv88e61xx_config { 187 char *name; 188 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM]; 189 enum mv88e61xx_cfg_rgmiid rgmii_delay; 190 enum mv88e61xx_cfg_prtstt portstate; 191 enum mv88e61xx_cfg_ledinit led_init; 192 enum mv88e61xx_cfg_mdip mdip; 193 u32 ports_enabled; 194 u8 cpuport; 195 }; 196 197 /* 198 * Common mappings for Internal VLANs 199 * These mappings consider that all ports are useable; the driver 200 * will mask inexistent/unused ports. 201 */ 202 203 /* Switch mode : routes any port to any port */ 204 #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F } 205 206 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */ 207 #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F } 208 209 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); 210 #endif /* CONFIG_MV88E61XX_SWITCH */ 211 212 struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id); 213 #ifdef CONFIG_PHYLIB 214 struct phy_device; 215 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, 216 struct mii_dev *bus, struct phy_device *phydev); 217 #else 218 /* 219 * Allow FEC to fine-tune MII configuration on boards which require this. 220 */ 221 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); 222 #endif 223 224 #endif /* _NETDEV_H_ */ 225