1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2015-2016 Freescale Semiconductor, Inc. 4 * Copyright 2017 NXP 5 */ 6 7 #ifndef __PFE_ETH_H__ 8 #define __PFE_ETH_H__ 9 10 #include <linux/sizes.h> 11 #include <asm/io.h> 12 #include <miiphy.h> 13 #include <malloc.h> 14 #include "pfe_driver.h" 15 16 #define BMU2_DDR_BASEADDR 0 17 #define BMU2_BUF_COUNT (3 * SZ_1K) 18 #define BMU2_DDR_SIZE (DDR_BUF_SIZE * BMU2_BUF_COUNT) 19 20 #define HIF_RX_PKT_DDR_BASEADDR (BMU2_DDR_BASEADDR + BMU2_DDR_SIZE) 21 #define HIF_RX_PKT_DDR_SIZE (HIF_RX_DESC_NT * DDR_BUF_SIZE) 22 #define HIF_TX_PKT_DDR_BASEADDR (HIF_RX_PKT_DDR_BASEADDR + HIF_RX_PKT_DDR_SIZE) 23 #define HIF_TX_PKT_DDR_SIZE (HIF_TX_DESC_NT * DDR_BUF_SIZE) 24 25 #define HIF_DESC_BASEADDR (HIF_TX_PKT_DDR_BASEADDR + HIF_TX_PKT_DDR_SIZE) 26 #define HIF_RX_DESC_SIZE (16 * HIF_RX_DESC_NT) 27 #define HIF_TX_DESC_SIZE (16 * HIF_TX_DESC_NT) 28 29 #define UTIL_CODE_BASEADDR 0x780000 30 #define UTIL_CODE_SIZE (128 * SZ_1K) 31 32 #define UTIL_DDR_DATA_BASEADDR (UTIL_CODE_BASEADDR + UTIL_CODE_SIZE) 33 #define UTIL_DDR_DATA_SIZE (64 * SZ_1K) 34 35 #define CLASS_DDR_DATA_BASEADDR (UTIL_DDR_DATA_BASEADDR + UTIL_DDR_DATA_SIZE) 36 #define CLASS_DDR_DATA_SIZE (32 * SZ_1K) 37 38 #define TMU_DDR_DATA_BASEADDR (CLASS_DDR_DATA_BASEADDR + CLASS_DDR_DATA_SIZE) 39 #define TMU_DDR_DATA_SIZE (32 * SZ_1K) 40 41 #define TMU_LLM_BASEADDR (TMU_DDR_DATA_BASEADDR + TMU_DDR_DATA_SIZE) 42 #define TMU_LLM_QUEUE_LEN (16 * 256) 43 /* Must be power of two and at least 16 * 8 = 128 bytes */ 44 #define TMU_LLM_SIZE (4 * 16 * TMU_LLM_QUEUE_LEN) 45 /* (4 TMU's x 16 queues x queue_len) */ 46 47 #define ROUTE_TABLE_BASEADDR 0x800000 48 #define ROUTE_TABLE_HASH_BITS_MAX 15 /* 32K entries */ 49 #define ROUTE_TABLE_HASH_BITS 8 /* 256 entries */ 50 #define ROUTE_TABLE_SIZE (BIT(ROUTE_TABLE_HASH_BITS_MAX) \ 51 * CLASS_ROUTE_SIZE) 52 53 #define PFE_TOTAL_DATA_SIZE (ROUTE_TABLE_BASEADDR + ROUTE_TABLE_SIZE) 54 55 #if PFE_TOTAL_DATA_SIZE > (12 * SZ_1M) 56 #error DDR mapping above 12MiB 57 #endif 58 59 /* LMEM Mapping */ 60 #define BMU1_LMEM_BASEADDR 0 61 #define BMU1_BUF_COUNT 256 62 #define BMU1_LMEM_SIZE (LMEM_BUF_SIZE * BMU1_BUF_COUNT) 63 64 struct gemac_s { 65 void *gemac_base; 66 void *egpi_base; 67 68 /* GEMAC config */ 69 int gemac_mode; 70 int gemac_speed; 71 int gemac_duplex; 72 int flags; 73 /* phy iface */ 74 int phy_address; 75 int phy_mode; 76 struct mii_dev *bus; 77 78 }; 79 80 struct pfe_mdio_info { 81 void *reg_base; 82 char *name; 83 }; 84 85 struct pfe_eth_dev { 86 int gemac_port; 87 struct gemac_s *gem; 88 struct pfe_ddr_address pfe_addr; 89 struct udevice *dev; 90 #ifdef CONFIG_PHYLIB 91 struct phy_device *phydev; 92 #endif 93 }; 94 95 int pfe_remove(struct pfe_ddr_address *pfe_addr); 96 struct mii_dev *pfe_mdio_init(struct pfe_mdio_info *mdio_info); 97 void pfe_set_mdio(int dev_id, struct mii_dev *bus); 98 void pfe_set_phy_address_mode(int dev_id, int phy_id, int phy_mode); 99 int gemac_initialize(bd_t *bis, int dev_id, char *devname); 100 int pfe_init(struct pfe_ddr_address *pfe_addr); 101 int pfe_eth_board_init(struct udevice *dev); 102 103 #endif /* __PFE_ETH_H__ */ 104