1*cf4c3448SCalvin Johnson /* 2*cf4c3448SCalvin Johnson * Copyright 2015-2016 Freescale Semiconductor, Inc. 3*cf4c3448SCalvin Johnson * Copyright 2017 NXP 4*cf4c3448SCalvin Johnson * 5*cf4c3448SCalvin Johnson * SPDX-License-Identifier: GPL-2.0+ 6*cf4c3448SCalvin Johnson */ 7*cf4c3448SCalvin Johnson 8*cf4c3448SCalvin Johnson #ifndef __PFE_ETH_H__ 9*cf4c3448SCalvin Johnson #define __PFE_ETH_H__ 10*cf4c3448SCalvin Johnson 11*cf4c3448SCalvin Johnson #include <linux/sizes.h> 12*cf4c3448SCalvin Johnson #include <asm/io.h> 13*cf4c3448SCalvin Johnson #include <miiphy.h> 14*cf4c3448SCalvin Johnson #include <malloc.h> 15*cf4c3448SCalvin Johnson #include "pfe_driver.h" 16*cf4c3448SCalvin Johnson 17*cf4c3448SCalvin Johnson #define BMU2_DDR_BASEADDR 0 18*cf4c3448SCalvin Johnson #define BMU2_BUF_COUNT (3 * SZ_1K) 19*cf4c3448SCalvin Johnson #define BMU2_DDR_SIZE (DDR_BUF_SIZE * BMU2_BUF_COUNT) 20*cf4c3448SCalvin Johnson 21*cf4c3448SCalvin Johnson #define HIF_RX_PKT_DDR_BASEADDR (BMU2_DDR_BASEADDR + BMU2_DDR_SIZE) 22*cf4c3448SCalvin Johnson #define HIF_RX_PKT_DDR_SIZE (HIF_RX_DESC_NT * DDR_BUF_SIZE) 23*cf4c3448SCalvin Johnson #define HIF_TX_PKT_DDR_BASEADDR (HIF_RX_PKT_DDR_BASEADDR + HIF_RX_PKT_DDR_SIZE) 24*cf4c3448SCalvin Johnson #define HIF_TX_PKT_DDR_SIZE (HIF_TX_DESC_NT * DDR_BUF_SIZE) 25*cf4c3448SCalvin Johnson 26*cf4c3448SCalvin Johnson #define HIF_DESC_BASEADDR (HIF_TX_PKT_DDR_BASEADDR + HIF_TX_PKT_DDR_SIZE) 27*cf4c3448SCalvin Johnson #define HIF_RX_DESC_SIZE (16 * HIF_RX_DESC_NT) 28*cf4c3448SCalvin Johnson #define HIF_TX_DESC_SIZE (16 * HIF_TX_DESC_NT) 29*cf4c3448SCalvin Johnson 30*cf4c3448SCalvin Johnson #define UTIL_CODE_BASEADDR 0x780000 31*cf4c3448SCalvin Johnson #define UTIL_CODE_SIZE (128 * SZ_1K) 32*cf4c3448SCalvin Johnson 33*cf4c3448SCalvin Johnson #define UTIL_DDR_DATA_BASEADDR (UTIL_CODE_BASEADDR + UTIL_CODE_SIZE) 34*cf4c3448SCalvin Johnson #define UTIL_DDR_DATA_SIZE (64 * SZ_1K) 35*cf4c3448SCalvin Johnson 36*cf4c3448SCalvin Johnson #define CLASS_DDR_DATA_BASEADDR (UTIL_DDR_DATA_BASEADDR + UTIL_DDR_DATA_SIZE) 37*cf4c3448SCalvin Johnson #define CLASS_DDR_DATA_SIZE (32 * SZ_1K) 38*cf4c3448SCalvin Johnson 39*cf4c3448SCalvin Johnson #define TMU_DDR_DATA_BASEADDR (CLASS_DDR_DATA_BASEADDR + CLASS_DDR_DATA_SIZE) 40*cf4c3448SCalvin Johnson #define TMU_DDR_DATA_SIZE (32 * SZ_1K) 41*cf4c3448SCalvin Johnson 42*cf4c3448SCalvin Johnson #define TMU_LLM_BASEADDR (TMU_DDR_DATA_BASEADDR + TMU_DDR_DATA_SIZE) 43*cf4c3448SCalvin Johnson #define TMU_LLM_QUEUE_LEN (16 * 256) 44*cf4c3448SCalvin Johnson /* Must be power of two and at least 16 * 8 = 128 bytes */ 45*cf4c3448SCalvin Johnson #define TMU_LLM_SIZE (4 * 16 * TMU_LLM_QUEUE_LEN) 46*cf4c3448SCalvin Johnson /* (4 TMU's x 16 queues x queue_len) */ 47*cf4c3448SCalvin Johnson 48*cf4c3448SCalvin Johnson #define ROUTE_TABLE_BASEADDR 0x800000 49*cf4c3448SCalvin Johnson #define ROUTE_TABLE_HASH_BITS_MAX 15 /* 32K entries */ 50*cf4c3448SCalvin Johnson #define ROUTE_TABLE_HASH_BITS 8 /* 256 entries */ 51*cf4c3448SCalvin Johnson #define ROUTE_TABLE_SIZE (BIT(ROUTE_TABLE_HASH_BITS_MAX) \ 52*cf4c3448SCalvin Johnson * CLASS_ROUTE_SIZE) 53*cf4c3448SCalvin Johnson 54*cf4c3448SCalvin Johnson #define PFE_TOTAL_DATA_SIZE (ROUTE_TABLE_BASEADDR + ROUTE_TABLE_SIZE) 55*cf4c3448SCalvin Johnson 56*cf4c3448SCalvin Johnson #if PFE_TOTAL_DATA_SIZE > (12 * SZ_1M) 57*cf4c3448SCalvin Johnson #error DDR mapping above 12MiB 58*cf4c3448SCalvin Johnson #endif 59*cf4c3448SCalvin Johnson 60*cf4c3448SCalvin Johnson /* LMEM Mapping */ 61*cf4c3448SCalvin Johnson #define BMU1_LMEM_BASEADDR 0 62*cf4c3448SCalvin Johnson #define BMU1_BUF_COUNT 256 63*cf4c3448SCalvin Johnson #define BMU1_LMEM_SIZE (LMEM_BUF_SIZE * BMU1_BUF_COUNT) 64*cf4c3448SCalvin Johnson 65*cf4c3448SCalvin Johnson struct gemac_s { 66*cf4c3448SCalvin Johnson void *gemac_base; 67*cf4c3448SCalvin Johnson void *egpi_base; 68*cf4c3448SCalvin Johnson 69*cf4c3448SCalvin Johnson /* GEMAC config */ 70*cf4c3448SCalvin Johnson int gemac_mode; 71*cf4c3448SCalvin Johnson int gemac_speed; 72*cf4c3448SCalvin Johnson int gemac_duplex; 73*cf4c3448SCalvin Johnson int flags; 74*cf4c3448SCalvin Johnson /* phy iface */ 75*cf4c3448SCalvin Johnson int phy_address; 76*cf4c3448SCalvin Johnson int phy_mode; 77*cf4c3448SCalvin Johnson struct mii_dev *bus; 78*cf4c3448SCalvin Johnson 79*cf4c3448SCalvin Johnson }; 80*cf4c3448SCalvin Johnson 81*cf4c3448SCalvin Johnson struct pfe_mdio_info { 82*cf4c3448SCalvin Johnson void *reg_base; 83*cf4c3448SCalvin Johnson char *name; 84*cf4c3448SCalvin Johnson }; 85*cf4c3448SCalvin Johnson 86*cf4c3448SCalvin Johnson struct pfe_eth_dev { 87*cf4c3448SCalvin Johnson int gemac_port; 88*cf4c3448SCalvin Johnson struct gemac_s *gem; 89*cf4c3448SCalvin Johnson struct pfe_ddr_address pfe_addr; 90*cf4c3448SCalvin Johnson struct udevice *dev; 91*cf4c3448SCalvin Johnson #ifdef CONFIG_PHYLIB 92*cf4c3448SCalvin Johnson struct phy_device *phydev; 93*cf4c3448SCalvin Johnson #endif 94*cf4c3448SCalvin Johnson }; 95*cf4c3448SCalvin Johnson 96*cf4c3448SCalvin Johnson int pfe_remove(struct pfe_ddr_address *pfe_addr); 97*cf4c3448SCalvin Johnson struct mii_dev *pfe_mdio_init(struct pfe_mdio_info *mdio_info); 98*cf4c3448SCalvin Johnson void pfe_set_mdio(int dev_id, struct mii_dev *bus); 99*cf4c3448SCalvin Johnson void pfe_set_phy_address_mode(int dev_id, int phy_id, int phy_mode); 100*cf4c3448SCalvin Johnson int gemac_initialize(bd_t *bis, int dev_id, char *devname); 101*cf4c3448SCalvin Johnson int pfe_init(struct pfe_ddr_address *pfe_addr); 102*cf4c3448SCalvin Johnson int pfe_eth_board_init(struct udevice *dev); 103*cf4c3448SCalvin Johnson 104*cf4c3448SCalvin Johnson #endif /* __PFE_ETH_H__ */ 105