1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2cf4c3448SCalvin Johnson /* 3cf4c3448SCalvin Johnson * Copyright 2015-2016 Freescale Semiconductor, Inc. 4cf4c3448SCalvin Johnson * Copyright 2017 NXP 5cf4c3448SCalvin Johnson */ 6cf4c3448SCalvin Johnson 7cf4c3448SCalvin Johnson #ifndef __PFE_ETH_H__ 8cf4c3448SCalvin Johnson #define __PFE_ETH_H__ 9cf4c3448SCalvin Johnson 10cf4c3448SCalvin Johnson #include <linux/sizes.h> 11cf4c3448SCalvin Johnson #include <asm/io.h> 12cf4c3448SCalvin Johnson #include <miiphy.h> 13cf4c3448SCalvin Johnson #include <malloc.h> 14cf4c3448SCalvin Johnson #include "pfe_driver.h" 15cf4c3448SCalvin Johnson 16cf4c3448SCalvin Johnson #define BMU2_DDR_BASEADDR 0 17cf4c3448SCalvin Johnson #define BMU2_BUF_COUNT (3 * SZ_1K) 18cf4c3448SCalvin Johnson #define BMU2_DDR_SIZE (DDR_BUF_SIZE * BMU2_BUF_COUNT) 19cf4c3448SCalvin Johnson 20cf4c3448SCalvin Johnson #define HIF_RX_PKT_DDR_BASEADDR (BMU2_DDR_BASEADDR + BMU2_DDR_SIZE) 21cf4c3448SCalvin Johnson #define HIF_RX_PKT_DDR_SIZE (HIF_RX_DESC_NT * DDR_BUF_SIZE) 22cf4c3448SCalvin Johnson #define HIF_TX_PKT_DDR_BASEADDR (HIF_RX_PKT_DDR_BASEADDR + HIF_RX_PKT_DDR_SIZE) 23cf4c3448SCalvin Johnson #define HIF_TX_PKT_DDR_SIZE (HIF_TX_DESC_NT * DDR_BUF_SIZE) 24cf4c3448SCalvin Johnson 25cf4c3448SCalvin Johnson #define HIF_DESC_BASEADDR (HIF_TX_PKT_DDR_BASEADDR + HIF_TX_PKT_DDR_SIZE) 26cf4c3448SCalvin Johnson #define HIF_RX_DESC_SIZE (16 * HIF_RX_DESC_NT) 27cf4c3448SCalvin Johnson #define HIF_TX_DESC_SIZE (16 * HIF_TX_DESC_NT) 28cf4c3448SCalvin Johnson 29cf4c3448SCalvin Johnson #define UTIL_CODE_BASEADDR 0x780000 30cf4c3448SCalvin Johnson #define UTIL_CODE_SIZE (128 * SZ_1K) 31cf4c3448SCalvin Johnson 32cf4c3448SCalvin Johnson #define UTIL_DDR_DATA_BASEADDR (UTIL_CODE_BASEADDR + UTIL_CODE_SIZE) 33cf4c3448SCalvin Johnson #define UTIL_DDR_DATA_SIZE (64 * SZ_1K) 34cf4c3448SCalvin Johnson 35cf4c3448SCalvin Johnson #define CLASS_DDR_DATA_BASEADDR (UTIL_DDR_DATA_BASEADDR + UTIL_DDR_DATA_SIZE) 36cf4c3448SCalvin Johnson #define CLASS_DDR_DATA_SIZE (32 * SZ_1K) 37cf4c3448SCalvin Johnson 38cf4c3448SCalvin Johnson #define TMU_DDR_DATA_BASEADDR (CLASS_DDR_DATA_BASEADDR + CLASS_DDR_DATA_SIZE) 39cf4c3448SCalvin Johnson #define TMU_DDR_DATA_SIZE (32 * SZ_1K) 40cf4c3448SCalvin Johnson 41cf4c3448SCalvin Johnson #define TMU_LLM_BASEADDR (TMU_DDR_DATA_BASEADDR + TMU_DDR_DATA_SIZE) 42cf4c3448SCalvin Johnson #define TMU_LLM_QUEUE_LEN (16 * 256) 43cf4c3448SCalvin Johnson /* Must be power of two and at least 16 * 8 = 128 bytes */ 44cf4c3448SCalvin Johnson #define TMU_LLM_SIZE (4 * 16 * TMU_LLM_QUEUE_LEN) 45cf4c3448SCalvin Johnson /* (4 TMU's x 16 queues x queue_len) */ 46cf4c3448SCalvin Johnson 47cf4c3448SCalvin Johnson #define ROUTE_TABLE_BASEADDR 0x800000 48cf4c3448SCalvin Johnson #define ROUTE_TABLE_HASH_BITS_MAX 15 /* 32K entries */ 49cf4c3448SCalvin Johnson #define ROUTE_TABLE_HASH_BITS 8 /* 256 entries */ 50cf4c3448SCalvin Johnson #define ROUTE_TABLE_SIZE (BIT(ROUTE_TABLE_HASH_BITS_MAX) \ 51cf4c3448SCalvin Johnson * CLASS_ROUTE_SIZE) 52cf4c3448SCalvin Johnson 53cf4c3448SCalvin Johnson #define PFE_TOTAL_DATA_SIZE (ROUTE_TABLE_BASEADDR + ROUTE_TABLE_SIZE) 54cf4c3448SCalvin Johnson 55cf4c3448SCalvin Johnson #if PFE_TOTAL_DATA_SIZE > (12 * SZ_1M) 56cf4c3448SCalvin Johnson #error DDR mapping above 12MiB 57cf4c3448SCalvin Johnson #endif 58cf4c3448SCalvin Johnson 59cf4c3448SCalvin Johnson /* LMEM Mapping */ 60cf4c3448SCalvin Johnson #define BMU1_LMEM_BASEADDR 0 61cf4c3448SCalvin Johnson #define BMU1_BUF_COUNT 256 62cf4c3448SCalvin Johnson #define BMU1_LMEM_SIZE (LMEM_BUF_SIZE * BMU1_BUF_COUNT) 63cf4c3448SCalvin Johnson 64cf4c3448SCalvin Johnson struct gemac_s { 65cf4c3448SCalvin Johnson void *gemac_base; 66cf4c3448SCalvin Johnson void *egpi_base; 67cf4c3448SCalvin Johnson 68cf4c3448SCalvin Johnson /* GEMAC config */ 69cf4c3448SCalvin Johnson int gemac_mode; 70cf4c3448SCalvin Johnson int gemac_speed; 71cf4c3448SCalvin Johnson int gemac_duplex; 72cf4c3448SCalvin Johnson int flags; 73cf4c3448SCalvin Johnson /* phy iface */ 74cf4c3448SCalvin Johnson int phy_address; 75cf4c3448SCalvin Johnson int phy_mode; 76cf4c3448SCalvin Johnson struct mii_dev *bus; 77cf4c3448SCalvin Johnson 78cf4c3448SCalvin Johnson }; 79cf4c3448SCalvin Johnson 80cf4c3448SCalvin Johnson struct pfe_mdio_info { 81cf4c3448SCalvin Johnson void *reg_base; 82cf4c3448SCalvin Johnson char *name; 83cf4c3448SCalvin Johnson }; 84cf4c3448SCalvin Johnson 85cf4c3448SCalvin Johnson struct pfe_eth_dev { 86cf4c3448SCalvin Johnson int gemac_port; 87cf4c3448SCalvin Johnson struct gemac_s *gem; 88cf4c3448SCalvin Johnson struct pfe_ddr_address pfe_addr; 89cf4c3448SCalvin Johnson struct udevice *dev; 90cf4c3448SCalvin Johnson #ifdef CONFIG_PHYLIB 91cf4c3448SCalvin Johnson struct phy_device *phydev; 92cf4c3448SCalvin Johnson #endif 93cf4c3448SCalvin Johnson }; 94cf4c3448SCalvin Johnson 95cf4c3448SCalvin Johnson int pfe_remove(struct pfe_ddr_address *pfe_addr); 96cf4c3448SCalvin Johnson struct mii_dev *pfe_mdio_init(struct pfe_mdio_info *mdio_info); 97cf4c3448SCalvin Johnson void pfe_set_mdio(int dev_id, struct mii_dev *bus); 98cf4c3448SCalvin Johnson void pfe_set_phy_address_mode(int dev_id, int phy_id, int phy_mode); 99cf4c3448SCalvin Johnson int gemac_initialize(bd_t *bis, int dev_id, char *devname); 100cf4c3448SCalvin Johnson int pfe_init(struct pfe_ddr_address *pfe_addr); 101cf4c3448SCalvin Johnson int pfe_eth_board_init(struct udevice *dev); 102cf4c3448SCalvin Johnson 103cf4c3448SCalvin Johnson #endif /* __PFE_ETH_H__ */ 104