1 /* 2 * Copyright 2015-2016 Freescale Semiconductor, Inc. 3 * Copyright 2017 NXP 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _HIF_NOCPY_H_ 9 #define _HIF_NOCPY_H_ 10 11 #define HIF_NOCPY_VERSION (HIF_NOCPY_BASE_ADDR + 0x00) 12 #define HIF_NOCPY_TX_CTRL (HIF_NOCPY_BASE_ADDR + 0x04) 13 #define HIF_NOCPY_TX_CURR_BD_ADDR (HIF_NOCPY_BASE_ADDR + 0x08) 14 #define HIF_NOCPY_TX_ALLOC (HIF_NOCPY_BASE_ADDR + 0x0c) 15 #define HIF_NOCPY_TX_BDP_ADDR (HIF_NOCPY_BASE_ADDR + 0x10) 16 #define HIF_NOCPY_TX_STATUS (HIF_NOCPY_BASE_ADDR + 0x14) 17 #define HIF_NOCPY_RX_CTRL (HIF_NOCPY_BASE_ADDR + 0x20) 18 #define HIF_NOCPY_RX_BDP_ADDR (HIF_NOCPY_BASE_ADDR + 0x24) 19 #define HIF_NOCPY_RX_STATUS (HIF_NOCPY_BASE_ADDR + 0x30) 20 #define HIF_NOCPY_INT_SRC (HIF_NOCPY_BASE_ADDR + 0x34) 21 #define HIF_NOCPY_INT_ENABLE (HIF_NOCPY_BASE_ADDR + 0x38) 22 #define HIF_NOCPY_POLL_CTRL (HIF_NOCPY_BASE_ADDR + 0x3c) 23 #define HIF_NOCPY_RX_CURR_BD_ADDR (HIF_NOCPY_BASE_ADDR + 0x40) 24 #define HIF_NOCPY_RX_ALLOC (HIF_NOCPY_BASE_ADDR + 0x44) 25 #define HIF_NOCPY_TX_DMA_STATUS (HIF_NOCPY_BASE_ADDR + 0x48) 26 #define HIF_NOCPY_RX_DMA_STATUS (HIF_NOCPY_BASE_ADDR + 0x4c) 27 #define HIF_NOCPY_RX_INQ0_PKTPTR (HIF_NOCPY_BASE_ADDR + 0x50) 28 #define HIF_NOCPY_RX_INQ1_PKTPTR (HIF_NOCPY_BASE_ADDR + 0x54) 29 #define HIF_NOCPY_TX_PORT_NO (HIF_NOCPY_BASE_ADDR + 0x60) 30 #define HIF_NOCPY_LMEM_ALLOC_ADDR (HIF_NOCPY_BASE_ADDR + 0x64) 31 #define HIF_NOCPY_CLASS_ADDR (HIF_NOCPY_BASE_ADDR + 0x68) 32 #define HIF_NOCPY_TMU_PORT0_ADDR (HIF_NOCPY_BASE_ADDR + 0x70) 33 #define HIF_NOCPY_TMU_PORT1_ADDR (HIF_NOCPY_BASE_ADDR + 0x74) 34 #define HIF_NOCPY_TMU_PORT2_ADDR (HIF_NOCPY_BASE_ADDR + 0x7c) 35 #define HIF_NOCPY_TMU_PORT3_ADDR (HIF_NOCPY_BASE_ADDR + 0x80) 36 #define HIF_NOCPY_TMU_PORT4_ADDR (HIF_NOCPY_BASE_ADDR + 0x84) 37 #define HIF_NOCPY_INT_COAL (HIF_NOCPY_BASE_ADDR + 0x90) 38 #define HIF_NOCPY_AXI_CTRL (HIF_NOCPY_BASE_ADDR + 0x94) 39 40 #endif /* _HIF_NOCPY_H_ */ 41