1*cf4c3448SCalvin Johnson /*
2*cf4c3448SCalvin Johnson  * Copyright 2015-2016 Freescale Semiconductor, Inc.
3*cf4c3448SCalvin Johnson  * Copyright 2017 NXP
4*cf4c3448SCalvin Johnson  *
5*cf4c3448SCalvin Johnson  * SPDX-License-Identifier:	GPL-2.0+
6*cf4c3448SCalvin Johnson  */
7*cf4c3448SCalvin Johnson 
8*cf4c3448SCalvin Johnson #ifndef _HIF_NOCPY_H_
9*cf4c3448SCalvin Johnson #define _HIF_NOCPY_H_
10*cf4c3448SCalvin Johnson 
11*cf4c3448SCalvin Johnson #define HIF_NOCPY_VERSION		(HIF_NOCPY_BASE_ADDR + 0x00)
12*cf4c3448SCalvin Johnson #define HIF_NOCPY_TX_CTRL		(HIF_NOCPY_BASE_ADDR + 0x04)
13*cf4c3448SCalvin Johnson #define HIF_NOCPY_TX_CURR_BD_ADDR	(HIF_NOCPY_BASE_ADDR + 0x08)
14*cf4c3448SCalvin Johnson #define HIF_NOCPY_TX_ALLOC		(HIF_NOCPY_BASE_ADDR + 0x0c)
15*cf4c3448SCalvin Johnson #define HIF_NOCPY_TX_BDP_ADDR		(HIF_NOCPY_BASE_ADDR + 0x10)
16*cf4c3448SCalvin Johnson #define HIF_NOCPY_TX_STATUS		(HIF_NOCPY_BASE_ADDR + 0x14)
17*cf4c3448SCalvin Johnson #define HIF_NOCPY_RX_CTRL		(HIF_NOCPY_BASE_ADDR + 0x20)
18*cf4c3448SCalvin Johnson #define HIF_NOCPY_RX_BDP_ADDR		(HIF_NOCPY_BASE_ADDR + 0x24)
19*cf4c3448SCalvin Johnson #define HIF_NOCPY_RX_STATUS		(HIF_NOCPY_BASE_ADDR + 0x30)
20*cf4c3448SCalvin Johnson #define HIF_NOCPY_INT_SRC		(HIF_NOCPY_BASE_ADDR + 0x34)
21*cf4c3448SCalvin Johnson #define HIF_NOCPY_INT_ENABLE		(HIF_NOCPY_BASE_ADDR + 0x38)
22*cf4c3448SCalvin Johnson #define HIF_NOCPY_POLL_CTRL		(HIF_NOCPY_BASE_ADDR + 0x3c)
23*cf4c3448SCalvin Johnson #define HIF_NOCPY_RX_CURR_BD_ADDR	(HIF_NOCPY_BASE_ADDR + 0x40)
24*cf4c3448SCalvin Johnson #define HIF_NOCPY_RX_ALLOC		(HIF_NOCPY_BASE_ADDR + 0x44)
25*cf4c3448SCalvin Johnson #define HIF_NOCPY_TX_DMA_STATUS		(HIF_NOCPY_BASE_ADDR + 0x48)
26*cf4c3448SCalvin Johnson #define HIF_NOCPY_RX_DMA_STATUS		(HIF_NOCPY_BASE_ADDR + 0x4c)
27*cf4c3448SCalvin Johnson #define HIF_NOCPY_RX_INQ0_PKTPTR	(HIF_NOCPY_BASE_ADDR + 0x50)
28*cf4c3448SCalvin Johnson #define HIF_NOCPY_RX_INQ1_PKTPTR	(HIF_NOCPY_BASE_ADDR + 0x54)
29*cf4c3448SCalvin Johnson #define HIF_NOCPY_TX_PORT_NO		(HIF_NOCPY_BASE_ADDR + 0x60)
30*cf4c3448SCalvin Johnson #define HIF_NOCPY_LMEM_ALLOC_ADDR	(HIF_NOCPY_BASE_ADDR + 0x64)
31*cf4c3448SCalvin Johnson #define HIF_NOCPY_CLASS_ADDR		(HIF_NOCPY_BASE_ADDR + 0x68)
32*cf4c3448SCalvin Johnson #define HIF_NOCPY_TMU_PORT0_ADDR	(HIF_NOCPY_BASE_ADDR + 0x70)
33*cf4c3448SCalvin Johnson #define HIF_NOCPY_TMU_PORT1_ADDR	(HIF_NOCPY_BASE_ADDR + 0x74)
34*cf4c3448SCalvin Johnson #define HIF_NOCPY_TMU_PORT2_ADDR	(HIF_NOCPY_BASE_ADDR + 0x7c)
35*cf4c3448SCalvin Johnson #define HIF_NOCPY_TMU_PORT3_ADDR	(HIF_NOCPY_BASE_ADDR + 0x80)
36*cf4c3448SCalvin Johnson #define HIF_NOCPY_TMU_PORT4_ADDR	(HIF_NOCPY_BASE_ADDR + 0x84)
37*cf4c3448SCalvin Johnson #define HIF_NOCPY_INT_COAL		(HIF_NOCPY_BASE_ADDR + 0x90)
38*cf4c3448SCalvin Johnson #define HIF_NOCPY_AXI_CTRL		(HIF_NOCPY_BASE_ADDR + 0x94)
39*cf4c3448SCalvin Johnson 
40*cf4c3448SCalvin Johnson #endif /* _HIF_NOCPY_H_ */
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