xref: /openbmc/u-boot/include/mv88e6352.h (revision ee7bb5be)
1 /*
2  * (C) Copyright 2012
3  * Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __MV886352_H
9 #define __MV886352_H
10 
11 #include <common.h>
12 
13 /* PHY registers */
14 #define PHY(itf)	(itf)
15 
16 #define PHY_CTRL	0x00
17 #define PHY_100_MBPS	0x2000
18 #define PHY_1_GBPS	0x0040
19 #define AUTONEG_EN	0x1000
20 #define AUTONEG_RST	0x0200
21 #define FULL_DUPLEX	0x0100
22 #define PHY_PWR_DOWN	0x0800
23 
24 #define PHY_STATUS	0x01
25 #define AN1000FIX	0x0001
26 
27 #define PHY_SPEC_CTRL	0x10
28 #define SPEC_PWR_DOWN	0x0004
29 #define AUTO_MDIX_EN	0x0060
30 
31 #define PHY_1000_CTRL	0x9
32 
33 #define NO_ADV		0x0000
34 #define ADV_1000_FDPX	0x0200
35 #define ADV_1000_HDPX	0x0100
36 
37 #define PHY_PAGE	0x16
38 
39 #define AN1000FIX_PAGE	0x00fc
40 
41 /* PORT or MAC registers */
42 #define PORT(itf)	(itf+0x10)
43 
44 #define PORT_STATUS	0x00
45 #define NO_PHY_DETECT	0x0000
46 
47 #define PORT_PHY	0x01
48 #define RX_RGMII_TIM	0x8000
49 #define TX_RGMII_TIM	0x4000
50 #define FLOW_CTRL_EN	0x0080
51 #define FLOW_CTRL_FOR	0x0040
52 #define LINK_VAL	0x0020
53 #define LINK_FOR	0x0010
54 #define FULL_DPX	0x0008
55 #define FULL_DPX_FOR	0x0004
56 #define NO_SPEED_FOR	0x0003
57 #define SPEED_1000_FOR	0x0002
58 #define SPEED_100_FOR	0x0001
59 #define SPEED_10_FOR	0x0000
60 
61 #define PORT_CTRL	0x04
62 #define FORWARDING	0x0003
63 #define EGRS_FLD_ALL	0x000c
64 #define PORT_DIS	0x0000
65 
66 struct mv88e_sw_reg {
67 	u8 port;
68 	u8 reg;
69 	u16 value;
70 };
71 
72 int mv88e_sw_reset(const char *devname, u8 phy_addr);
73 int mv88e_sw_program(const char *devname, u8 phy_addr,
74 	struct mv88e_sw_reg *regs, int regs_nb);
75 
76 #endif
77