1 /* 2 * (C) Copyright 2012 3 * Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 21 * MA 02110-1301 USA 22 */ 23 24 #ifndef __MV886352_H 25 #define __MV886352_H 26 27 #include <common.h> 28 29 /* PHY registers */ 30 #define PHY(itf) (itf) 31 32 #define PHY_CTRL 0x00 33 #define PHY_100_MBPS 0x2000 34 #define PHY_1_GBPS 0x0040 35 #define AUTONEG_EN 0x1000 36 #define AUTONEG_RST 0x0200 37 #define FULL_DUPLEX 0x0100 38 #define PHY_PWR_DOWN 0x0800 39 40 #define PHY_STATUS 0x01 41 #define AN1000FIX 0x0001 42 43 #define PHY_SPEC_CTRL 0x10 44 #define SPEC_PWR_DOWN 0x0004 45 #define AUTO_MDIX_EN 0x0060 46 47 #define PHY_1000_CTRL 0x9 48 49 #define NO_ADV 0x0000 50 #define ADV_1000_FDPX 0x0200 51 #define ADV_1000_HDPX 0x0100 52 53 #define PHY_PAGE 0x16 54 55 #define AN1000FIX_PAGE 0x00fc 56 57 /* PORT or MAC registers */ 58 #define PORT(itf) (itf+0x10) 59 60 #define PORT_STATUS 0x00 61 #define NO_PHY_DETECT 0x0000 62 63 #define PORT_PHY 0x01 64 #define RX_RGMII_TIM 0x8000 65 #define TX_RGMII_TIM 0x4000 66 #define FLOW_CTRL_EN 0x0080 67 #define FLOW_CTRL_FOR 0x0040 68 #define LINK_VAL 0x0020 69 #define LINK_FOR 0x0010 70 #define FULL_DPX 0x0008 71 #define FULL_DPX_FOR 0x0004 72 #define NO_SPEED_FOR 0x0003 73 #define SPEED_1000_FOR 0x0002 74 #define SPEED_100_FOR 0x0001 75 #define SPEED_10_FOR 0x0000 76 77 #define PORT_CTRL 0x04 78 #define FORWARDING 0x0003 79 #define EGRS_FLD_ALL 0x000c 80 #define PORT_DIS 0x0000 81 82 struct mv88e_sw_reg { 83 u8 port; 84 u8 reg; 85 u16 value; 86 }; 87 88 int mv88e_sw_reset(const char *devname, u8 phy_addr); 89 int mv88e_sw_program(const char *devname, u8 phy_addr, 90 struct mv88e_sw_reg *regs, int regs_nb); 91 92 #endif 93