1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2b737337aSValentin Longchamp /* 3b737337aSValentin Longchamp * (C) Copyright 2012 4b737337aSValentin Longchamp * Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com 5b737337aSValentin Longchamp */ 6b737337aSValentin Longchamp 7b737337aSValentin Longchamp #ifndef __MV886352_H 8b737337aSValentin Longchamp #define __MV886352_H 9b737337aSValentin Longchamp 10b737337aSValentin Longchamp #include <common.h> 11b737337aSValentin Longchamp 12b737337aSValentin Longchamp /* PHY registers */ 13b737337aSValentin Longchamp #define PHY(itf) (itf) 14b737337aSValentin Longchamp 15b737337aSValentin Longchamp #define PHY_CTRL 0x00 16b737337aSValentin Longchamp #define PHY_100_MBPS 0x2000 17b737337aSValentin Longchamp #define PHY_1_GBPS 0x0040 18b737337aSValentin Longchamp #define AUTONEG_EN 0x1000 19b737337aSValentin Longchamp #define AUTONEG_RST 0x0200 20b737337aSValentin Longchamp #define FULL_DUPLEX 0x0100 21b737337aSValentin Longchamp #define PHY_PWR_DOWN 0x0800 22b737337aSValentin Longchamp 23b737337aSValentin Longchamp #define PHY_STATUS 0x01 24b737337aSValentin Longchamp #define AN1000FIX 0x0001 25b737337aSValentin Longchamp 26b737337aSValentin Longchamp #define PHY_SPEC_CTRL 0x10 27b737337aSValentin Longchamp #define SPEC_PWR_DOWN 0x0004 28b737337aSValentin Longchamp #define AUTO_MDIX_EN 0x0060 29b737337aSValentin Longchamp 30b737337aSValentin Longchamp #define PHY_1000_CTRL 0x9 31b737337aSValentin Longchamp 32b737337aSValentin Longchamp #define NO_ADV 0x0000 33b737337aSValentin Longchamp #define ADV_1000_FDPX 0x0200 34b737337aSValentin Longchamp #define ADV_1000_HDPX 0x0100 35b737337aSValentin Longchamp 36b737337aSValentin Longchamp #define PHY_PAGE 0x16 37b737337aSValentin Longchamp 38b737337aSValentin Longchamp #define AN1000FIX_PAGE 0x00fc 39b737337aSValentin Longchamp 40b737337aSValentin Longchamp /* PORT or MAC registers */ 41b737337aSValentin Longchamp #define PORT(itf) (itf+0x10) 42b737337aSValentin Longchamp 43b737337aSValentin Longchamp #define PORT_STATUS 0x00 44b737337aSValentin Longchamp #define NO_PHY_DETECT 0x0000 45b737337aSValentin Longchamp 46b737337aSValentin Longchamp #define PORT_PHY 0x01 47b737337aSValentin Longchamp #define RX_RGMII_TIM 0x8000 48b737337aSValentin Longchamp #define TX_RGMII_TIM 0x4000 49b737337aSValentin Longchamp #define FLOW_CTRL_EN 0x0080 50b737337aSValentin Longchamp #define FLOW_CTRL_FOR 0x0040 51b737337aSValentin Longchamp #define LINK_VAL 0x0020 52b737337aSValentin Longchamp #define LINK_FOR 0x0010 53b737337aSValentin Longchamp #define FULL_DPX 0x0008 54b737337aSValentin Longchamp #define FULL_DPX_FOR 0x0004 55b737337aSValentin Longchamp #define NO_SPEED_FOR 0x0003 56b737337aSValentin Longchamp #define SPEED_1000_FOR 0x0002 57b737337aSValentin Longchamp #define SPEED_100_FOR 0x0001 58b737337aSValentin Longchamp #define SPEED_10_FOR 0x0000 59b737337aSValentin Longchamp 60b737337aSValentin Longchamp #define PORT_CTRL 0x04 61b737337aSValentin Longchamp #define FORWARDING 0x0003 62b737337aSValentin Longchamp #define EGRS_FLD_ALL 0x000c 63b737337aSValentin Longchamp #define PORT_DIS 0x0000 64b737337aSValentin Longchamp 65b737337aSValentin Longchamp struct mv88e_sw_reg { 66b737337aSValentin Longchamp u8 port; 67b737337aSValentin Longchamp u8 reg; 68b737337aSValentin Longchamp u16 value; 69b737337aSValentin Longchamp }; 70b737337aSValentin Longchamp 71b737337aSValentin Longchamp int mv88e_sw_reset(const char *devname, u8 phy_addr); 72b737337aSValentin Longchamp int mv88e_sw_program(const char *devname, u8 phy_addr, 73b737337aSValentin Longchamp struct mv88e_sw_reg *regs, int regs_nb); 74b737337aSValentin Longchamp 75b737337aSValentin Longchamp #endif 76