1 /* 2 * Copyright 2008,2010 Freescale Semiconductor, Inc 3 * Andy Fleming 4 * 5 * Based (loosely) on the Linux code 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef _MMC_H_ 27 #define _MMC_H_ 28 29 #include <linux/list.h> 30 #include <linux/compiler.h> 31 32 #define SD_VERSION_SD 0x20000 33 #define SD_VERSION_3 (SD_VERSION_SD | 0x300) 34 #define SD_VERSION_2 (SD_VERSION_SD | 0x200) 35 #define SD_VERSION_1_0 (SD_VERSION_SD | 0x100) 36 #define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a) 37 #define MMC_VERSION_MMC 0x10000 38 #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) 39 #define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102) 40 #define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104) 41 #define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202) 42 #define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300) 43 #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400) 44 #define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401) 45 #define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402) 46 #define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403) 47 #define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429) 48 #define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405) 49 50 #define MMC_MODE_HS 0x001 51 #define MMC_MODE_HS_52MHz 0x010 52 #define MMC_MODE_4BIT 0x100 53 #define MMC_MODE_8BIT 0x200 54 #define MMC_MODE_SPI 0x400 55 #define MMC_MODE_HC 0x800 56 57 #define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT) 58 #define MMC_MODE_WIDTH_BITS_SHIFT 8 59 60 #define SD_DATA_4BIT 0x00040000 61 62 #define IS_SD(x) (x->version & SD_VERSION_SD) 63 64 #define MMC_DATA_READ 1 65 #define MMC_DATA_WRITE 2 66 67 #define NO_CARD_ERR -16 /* No SD/MMC card inserted */ 68 #define UNUSABLE_ERR -17 /* Unusable Card */ 69 #define COMM_ERR -18 /* Communications Error */ 70 #define TIMEOUT -19 71 #define IN_PROGRESS -20 /* operation is in progress */ 72 73 #define MMC_CMD_GO_IDLE_STATE 0 74 #define MMC_CMD_SEND_OP_COND 1 75 #define MMC_CMD_ALL_SEND_CID 2 76 #define MMC_CMD_SET_RELATIVE_ADDR 3 77 #define MMC_CMD_SET_DSR 4 78 #define MMC_CMD_SWITCH 6 79 #define MMC_CMD_SELECT_CARD 7 80 #define MMC_CMD_SEND_EXT_CSD 8 81 #define MMC_CMD_SEND_CSD 9 82 #define MMC_CMD_SEND_CID 10 83 #define MMC_CMD_STOP_TRANSMISSION 12 84 #define MMC_CMD_SEND_STATUS 13 85 #define MMC_CMD_SET_BLOCKLEN 16 86 #define MMC_CMD_READ_SINGLE_BLOCK 17 87 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 88 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 89 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 90 #define MMC_CMD_ERASE_GROUP_START 35 91 #define MMC_CMD_ERASE_GROUP_END 36 92 #define MMC_CMD_ERASE 38 93 #define MMC_CMD_APP_CMD 55 94 #define MMC_CMD_SPI_READ_OCR 58 95 #define MMC_CMD_SPI_CRC_ON_OFF 59 96 #define MMC_CMD_RES_MAN 62 97 98 #define MMC_CMD62_ARG1 0xefac62ec 99 #define MMC_CMD62_ARG2 0xcbaea7 100 101 102 #define SD_CMD_SEND_RELATIVE_ADDR 3 103 #define SD_CMD_SWITCH_FUNC 6 104 #define SD_CMD_SEND_IF_COND 8 105 106 #define SD_CMD_APP_SET_BUS_WIDTH 6 107 #define SD_CMD_ERASE_WR_BLK_START 32 108 #define SD_CMD_ERASE_WR_BLK_END 33 109 #define SD_CMD_APP_SEND_OP_COND 41 110 #define SD_CMD_APP_SEND_SCR 51 111 112 /* SCR definitions in different words */ 113 #define SD_HIGHSPEED_BUSY 0x00020000 114 #define SD_HIGHSPEED_SUPPORTED 0x00020000 115 116 #define MMC_HS_TIMING 0x00000100 117 #define MMC_HS_52MHZ 0x2 118 119 #define OCR_BUSY 0x80000000 120 #define OCR_HCS 0x40000000 121 #define OCR_VOLTAGE_MASK 0x007FFF80 122 #define OCR_ACCESS_MODE 0x60000000 123 124 #define SECURE_ERASE 0x80000000 125 126 #define MMC_STATUS_MASK (~0x0206BF7F) 127 #define MMC_STATUS_RDY_FOR_DATA (1 << 8) 128 #define MMC_STATUS_CURR_STATE (0xf << 9) 129 #define MMC_STATUS_ERROR (1 << 19) 130 131 #define MMC_STATE_PRG (7 << 9) 132 133 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 134 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 135 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 136 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 137 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 138 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 139 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 140 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 141 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 142 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 143 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 144 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 145 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 146 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 147 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 148 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 149 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 150 151 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ 152 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte 153 addressed by index which are 154 1 in value field */ 155 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte 156 addressed by index, which are 157 1 in value field */ 158 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ 159 160 #define SD_SWITCH_CHECK 0 161 #define SD_SWITCH_SWITCH 1 162 163 /* 164 * EXT_CSD fields 165 */ 166 #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ 167 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ 168 #define EXT_CSD_RPMB_MULT 168 /* RO */ 169 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ 170 #define EXT_CSD_BOOT_BUS_WIDTH 177 171 #define EXT_CSD_PART_CONF 179 /* R/W */ 172 #define EXT_CSD_BUS_WIDTH 183 /* R/W */ 173 #define EXT_CSD_HS_TIMING 185 /* R/W */ 174 #define EXT_CSD_REV 192 /* RO */ 175 #define EXT_CSD_CARD_TYPE 196 /* RO */ 176 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 177 #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ 178 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ 179 #define EXT_CSD_BOOT_MULT 226 /* RO */ 180 181 /* 182 * EXT_CSD field definitions 183 */ 184 185 #define EXT_CSD_CMD_SET_NORMAL (1 << 0) 186 #define EXT_CSD_CMD_SET_SECURE (1 << 1) 187 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) 188 189 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ 190 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ 191 192 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ 193 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ 194 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ 195 196 #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) 197 #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) 198 #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0) 199 #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0) 200 201 #define EXT_CSD_BOOT_ACK(x) (x << 6) 202 #define EXT_CSD_BOOT_PART_NUM(x) (x << 3) 203 #define EXT_CSD_PARTITION_ACCESS(x) (x << 0) 204 205 206 #define R1_ILLEGAL_COMMAND (1 << 22) 207 #define R1_APP_CMD (1 << 5) 208 209 #define MMC_RSP_PRESENT (1 << 0) 210 #define MMC_RSP_136 (1 << 1) /* 136 bit response */ 211 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ 212 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ 213 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ 214 215 #define MMC_RSP_NONE (0) 216 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 217 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ 218 MMC_RSP_BUSY) 219 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) 220 #define MMC_RSP_R3 (MMC_RSP_PRESENT) 221 #define MMC_RSP_R4 (MMC_RSP_PRESENT) 222 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 223 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 224 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 225 226 #define MMCPART_NOAVAILABLE (0xff) 227 #define PART_ACCESS_MASK (0x7) 228 #define PART_SUPPORT (0x1) 229 230 /* Maximum block size for MMC */ 231 #define MMC_MAX_BLOCK_LEN 512 232 233 /* The number of MMC physical partitions. These consist of: 234 * boot partitions (2), general purpose partitions (4) in MMC v4.4. 235 */ 236 #define MMC_NUM_BOOT_PARTITION 2 237 238 struct mmc_cid { 239 unsigned long psn; 240 unsigned short oid; 241 unsigned char mid; 242 unsigned char prv; 243 unsigned char mdt; 244 char pnm[7]; 245 }; 246 247 struct mmc_cmd { 248 ushort cmdidx; 249 uint resp_type; 250 uint cmdarg; 251 uint response[4]; 252 }; 253 254 struct mmc_data { 255 union { 256 char *dest; 257 const char *src; /* src buffers don't get written to */ 258 }; 259 uint flags; 260 uint blocks; 261 uint blocksize; 262 }; 263 264 struct mmc { 265 struct list_head link; 266 char name[32]; 267 void *priv; 268 uint voltages; 269 uint version; 270 uint has_init; 271 uint f_min; 272 uint f_max; 273 int high_capacity; 274 uint bus_width; 275 uint clock; 276 uint card_caps; 277 uint host_caps; 278 uint ocr; 279 uint scr[2]; 280 uint csd[4]; 281 uint cid[4]; 282 ushort rca; 283 char part_config; 284 char part_num; 285 uint tran_speed; 286 uint read_bl_len; 287 uint write_bl_len; 288 uint erase_grp_size; 289 u64 capacity; 290 u64 capacity_user; 291 u64 capacity_boot; 292 u64 capacity_rpmb; 293 u64 capacity_gp[4]; 294 block_dev_desc_t block_dev; 295 int (*send_cmd)(struct mmc *mmc, 296 struct mmc_cmd *cmd, struct mmc_data *data); 297 void (*set_ios)(struct mmc *mmc); 298 int (*init)(struct mmc *mmc); 299 int (*getcd)(struct mmc *mmc); 300 int (*getwp)(struct mmc *mmc); 301 uint b_max; 302 char op_cond_pending; /* 1 if we are waiting on an op_cond command */ 303 char init_in_progress; /* 1 if we have done mmc_start_init() */ 304 char preinit; /* start init as early as possible */ 305 uint op_cond_response; /* the response byte from the last op_cond */ 306 }; 307 308 int mmc_register(struct mmc *mmc); 309 int mmc_initialize(bd_t *bis); 310 int mmc_init(struct mmc *mmc); 311 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); 312 void mmc_set_clock(struct mmc *mmc, uint clock); 313 struct mmc *find_mmc_device(int dev_num); 314 int mmc_set_dev(int dev_num); 315 void print_mmc_devices(char separator); 316 int get_mmc_num(void); 317 int board_mmc_getcd(struct mmc *mmc); 318 int mmc_switch_part(int dev_num, unsigned int part_num); 319 int mmc_getcd(struct mmc *mmc); 320 int mmc_getwp(struct mmc *mmc); 321 void spl_mmc_load(void) __noreturn; 322 /* Function to change the size of boot partition and rpmb partitions */ 323 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, 324 unsigned long rpmbsize); 325 /* Function to send commands to open/close the specified boot partition */ 326 int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access); 327 328 /** 329 * Start device initialization and return immediately; it does not block on 330 * polling OCR (operation condition register) status. Then you should call 331 * mmc_init, which would block on polling OCR status and complete the device 332 * initializatin. 333 * 334 * @param mmc Pointer to a MMC device struct 335 * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error. 336 */ 337 int mmc_start_init(struct mmc *mmc); 338 339 /** 340 * Set preinit flag of mmc device. 341 * 342 * This will cause the device to be pre-inited during mmc_initialize(), 343 * which may save boot time if the device is not accessed until later. 344 * Some eMMC devices take 200-300ms to init, but unfortunately they 345 * must be sent a series of commands to even get them to start preparing 346 * for operation. 347 * 348 * @param mmc Pointer to a MMC device struct 349 * @param preinit preinit flag value 350 */ 351 void mmc_set_preinit(struct mmc *mmc, int preinit); 352 353 #ifdef CONFIG_GENERIC_MMC 354 #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) 355 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); 356 #else 357 int mmc_legacy_init(int verbose); 358 #endif 359 360 #endif /* _MMC_H_ */ 361