1 /* 2 * Copyright 2008,2010 Freescale Semiconductor, Inc 3 * Andy Fleming 4 * 5 * Based (loosely) on the Linux code 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef _MMC_H_ 27 #define _MMC_H_ 28 29 #include <linux/list.h> 30 #include <linux/compiler.h> 31 32 #define SD_VERSION_SD 0x20000 33 #define SD_VERSION_2 (SD_VERSION_SD | 0x20) 34 #define SD_VERSION_1_0 (SD_VERSION_SD | 0x10) 35 #define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a) 36 #define MMC_VERSION_MMC 0x10000 37 #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) 38 #define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12) 39 #define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14) 40 #define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22) 41 #define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30) 42 #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) 43 44 #define MMC_MODE_HS 0x001 45 #define MMC_MODE_HS_52MHz 0x010 46 #define MMC_MODE_4BIT 0x100 47 #define MMC_MODE_8BIT 0x200 48 #define MMC_MODE_SPI 0x400 49 #define MMC_MODE_HC 0x800 50 51 #define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT) 52 #define MMC_MODE_WIDTH_BITS_SHIFT 8 53 54 #define SD_DATA_4BIT 0x00040000 55 56 #define IS_SD(x) (x->version & SD_VERSION_SD) 57 58 #define MMC_DATA_READ 1 59 #define MMC_DATA_WRITE 2 60 61 #define NO_CARD_ERR -16 /* No SD/MMC card inserted */ 62 #define UNUSABLE_ERR -17 /* Unusable Card */ 63 #define COMM_ERR -18 /* Communications Error */ 64 #define TIMEOUT -19 65 66 #define MMC_CMD_GO_IDLE_STATE 0 67 #define MMC_CMD_SEND_OP_COND 1 68 #define MMC_CMD_ALL_SEND_CID 2 69 #define MMC_CMD_SET_RELATIVE_ADDR 3 70 #define MMC_CMD_SET_DSR 4 71 #define MMC_CMD_SWITCH 6 72 #define MMC_CMD_SELECT_CARD 7 73 #define MMC_CMD_SEND_EXT_CSD 8 74 #define MMC_CMD_SEND_CSD 9 75 #define MMC_CMD_SEND_CID 10 76 #define MMC_CMD_STOP_TRANSMISSION 12 77 #define MMC_CMD_SEND_STATUS 13 78 #define MMC_CMD_SET_BLOCKLEN 16 79 #define MMC_CMD_READ_SINGLE_BLOCK 17 80 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 81 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 82 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 83 #define MMC_CMD_ERASE_GROUP_START 35 84 #define MMC_CMD_ERASE_GROUP_END 36 85 #define MMC_CMD_ERASE 38 86 #define MMC_CMD_APP_CMD 55 87 #define MMC_CMD_SPI_READ_OCR 58 88 #define MMC_CMD_SPI_CRC_ON_OFF 59 89 90 #define SD_CMD_SEND_RELATIVE_ADDR 3 91 #define SD_CMD_SWITCH_FUNC 6 92 #define SD_CMD_SEND_IF_COND 8 93 94 #define SD_CMD_APP_SET_BUS_WIDTH 6 95 #define SD_CMD_ERASE_WR_BLK_START 32 96 #define SD_CMD_ERASE_WR_BLK_END 33 97 #define SD_CMD_APP_SEND_OP_COND 41 98 #define SD_CMD_APP_SEND_SCR 51 99 100 /* SCR definitions in different words */ 101 #define SD_HIGHSPEED_BUSY 0x00020000 102 #define SD_HIGHSPEED_SUPPORTED 0x00020000 103 104 #define MMC_HS_TIMING 0x00000100 105 #define MMC_HS_52MHZ 0x2 106 107 #define OCR_BUSY 0x80000000 108 #define OCR_HCS 0x40000000 109 #define OCR_VOLTAGE_MASK 0x007FFF80 110 #define OCR_ACCESS_MODE 0x60000000 111 112 #define SECURE_ERASE 0x80000000 113 114 #define MMC_STATUS_MASK (~0x0206BF7F) 115 #define MMC_STATUS_RDY_FOR_DATA (1 << 8) 116 #define MMC_STATUS_CURR_STATE (0xf << 9) 117 #define MMC_STATUS_ERROR (1 << 19) 118 119 #define MMC_STATE_PRG (7 << 9) 120 121 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 122 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 123 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 124 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 125 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 126 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 127 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 128 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 129 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 130 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 131 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 132 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 133 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 134 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 135 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 136 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 137 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 138 139 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ 140 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte 141 addressed by index which are 142 1 in value field */ 143 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte 144 addressed by index, which are 145 1 in value field */ 146 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ 147 148 #define SD_SWITCH_CHECK 0 149 #define SD_SWITCH_SWITCH 1 150 151 /* 152 * EXT_CSD fields 153 */ 154 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ 155 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ 156 #define EXT_CSD_PART_CONF 179 /* R/W */ 157 #define EXT_CSD_BUS_WIDTH 183 /* R/W */ 158 #define EXT_CSD_HS_TIMING 185 /* R/W */ 159 #define EXT_CSD_REV 192 /* RO */ 160 #define EXT_CSD_CARD_TYPE 196 /* RO */ 161 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 162 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ 163 #define EXT_CSD_BOOT_MULT 226 /* RO */ 164 165 /* 166 * EXT_CSD field definitions 167 */ 168 169 #define EXT_CSD_CMD_SET_NORMAL (1 << 0) 170 #define EXT_CSD_CMD_SET_SECURE (1 << 1) 171 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) 172 173 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ 174 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ 175 176 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ 177 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ 178 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ 179 180 #define R1_ILLEGAL_COMMAND (1 << 22) 181 #define R1_APP_CMD (1 << 5) 182 183 #define MMC_RSP_PRESENT (1 << 0) 184 #define MMC_RSP_136 (1 << 1) /* 136 bit response */ 185 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ 186 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ 187 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ 188 189 #define MMC_RSP_NONE (0) 190 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 191 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ 192 MMC_RSP_BUSY) 193 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) 194 #define MMC_RSP_R3 (MMC_RSP_PRESENT) 195 #define MMC_RSP_R4 (MMC_RSP_PRESENT) 196 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 197 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 198 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 199 200 #define MMCPART_NOAVAILABLE (0xff) 201 #define PART_ACCESS_MASK (0x7) 202 #define PART_SUPPORT (0x1) 203 204 struct mmc_cid { 205 unsigned long psn; 206 unsigned short oid; 207 unsigned char mid; 208 unsigned char prv; 209 unsigned char mdt; 210 char pnm[7]; 211 }; 212 213 struct mmc_cmd { 214 ushort cmdidx; 215 uint resp_type; 216 uint cmdarg; 217 uint response[4]; 218 }; 219 220 struct mmc_data { 221 union { 222 char *dest; 223 const char *src; /* src buffers don't get written to */ 224 }; 225 uint flags; 226 uint blocks; 227 uint blocksize; 228 }; 229 230 struct mmc { 231 struct list_head link; 232 char name[32]; 233 void *priv; 234 uint voltages; 235 uint version; 236 uint has_init; 237 uint f_min; 238 uint f_max; 239 int high_capacity; 240 uint bus_width; 241 uint clock; 242 uint card_caps; 243 uint host_caps; 244 uint ocr; 245 uint scr[2]; 246 uint csd[4]; 247 uint cid[4]; 248 ushort rca; 249 char part_config; 250 char part_num; 251 uint tran_speed; 252 uint read_bl_len; 253 uint write_bl_len; 254 uint erase_grp_size; 255 u64 capacity; 256 block_dev_desc_t block_dev; 257 int (*send_cmd)(struct mmc *mmc, 258 struct mmc_cmd *cmd, struct mmc_data *data); 259 void (*set_ios)(struct mmc *mmc); 260 int (*init)(struct mmc *mmc); 261 int (*getcd)(struct mmc *mmc); 262 uint b_max; 263 }; 264 265 int mmc_register(struct mmc *mmc); 266 int mmc_initialize(bd_t *bis); 267 int mmc_init(struct mmc *mmc); 268 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); 269 void mmc_set_clock(struct mmc *mmc, uint clock); 270 struct mmc *find_mmc_device(int dev_num); 271 int mmc_set_dev(int dev_num); 272 void print_mmc_devices(char separator); 273 int get_mmc_num(void); 274 int board_mmc_getcd(struct mmc *mmc); 275 int mmc_switch_part(int dev_num, unsigned int part_num); 276 int mmc_getcd(struct mmc *mmc); 277 void spl_mmc_load(void) __noreturn; 278 279 #ifdef CONFIG_GENERIC_MMC 280 #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) 281 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); 282 #else 283 int mmc_legacy_init(int verbose); 284 #endif 285 286 #endif /* _MMC_H_ */ 287