1 /* 2 * Copyright 2008,2010 Freescale Semiconductor, Inc 3 * Andy Fleming 4 * 5 * Based (loosely) on the Linux code 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef _MMC_H_ 27 #define _MMC_H_ 28 29 #include <linux/list.h> 30 #include <linux/compiler.h> 31 32 #define SD_VERSION_SD 0x20000 33 #define SD_VERSION_3 (SD_VERSION_SD | 0x300) 34 #define SD_VERSION_2 (SD_VERSION_SD | 0x200) 35 #define SD_VERSION_1_0 (SD_VERSION_SD | 0x100) 36 #define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a) 37 #define MMC_VERSION_MMC 0x10000 38 #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) 39 #define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102) 40 #define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104) 41 #define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202) 42 #define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300) 43 #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400) 44 #define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401) 45 #define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402) 46 #define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403) 47 #define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429) 48 #define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405) 49 50 #define MMC_MODE_HS 0x001 51 #define MMC_MODE_HS_52MHz 0x010 52 #define MMC_MODE_4BIT 0x100 53 #define MMC_MODE_8BIT 0x200 54 #define MMC_MODE_SPI 0x400 55 #define MMC_MODE_HC 0x800 56 57 #define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT) 58 #define MMC_MODE_WIDTH_BITS_SHIFT 8 59 60 #define SD_DATA_4BIT 0x00040000 61 62 #define IS_SD(x) (x->version & SD_VERSION_SD) 63 64 #define MMC_DATA_READ 1 65 #define MMC_DATA_WRITE 2 66 67 #define NO_CARD_ERR -16 /* No SD/MMC card inserted */ 68 #define UNUSABLE_ERR -17 /* Unusable Card */ 69 #define COMM_ERR -18 /* Communications Error */ 70 #define TIMEOUT -19 71 72 #define MMC_CMD_GO_IDLE_STATE 0 73 #define MMC_CMD_SEND_OP_COND 1 74 #define MMC_CMD_ALL_SEND_CID 2 75 #define MMC_CMD_SET_RELATIVE_ADDR 3 76 #define MMC_CMD_SET_DSR 4 77 #define MMC_CMD_SWITCH 6 78 #define MMC_CMD_SELECT_CARD 7 79 #define MMC_CMD_SEND_EXT_CSD 8 80 #define MMC_CMD_SEND_CSD 9 81 #define MMC_CMD_SEND_CID 10 82 #define MMC_CMD_STOP_TRANSMISSION 12 83 #define MMC_CMD_SEND_STATUS 13 84 #define MMC_CMD_SET_BLOCKLEN 16 85 #define MMC_CMD_READ_SINGLE_BLOCK 17 86 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 87 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 88 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 89 #define MMC_CMD_ERASE_GROUP_START 35 90 #define MMC_CMD_ERASE_GROUP_END 36 91 #define MMC_CMD_ERASE 38 92 #define MMC_CMD_APP_CMD 55 93 #define MMC_CMD_SPI_READ_OCR 58 94 #define MMC_CMD_SPI_CRC_ON_OFF 59 95 96 #define SD_CMD_SEND_RELATIVE_ADDR 3 97 #define SD_CMD_SWITCH_FUNC 6 98 #define SD_CMD_SEND_IF_COND 8 99 100 #define SD_CMD_APP_SET_BUS_WIDTH 6 101 #define SD_CMD_ERASE_WR_BLK_START 32 102 #define SD_CMD_ERASE_WR_BLK_END 33 103 #define SD_CMD_APP_SEND_OP_COND 41 104 #define SD_CMD_APP_SEND_SCR 51 105 106 /* SCR definitions in different words */ 107 #define SD_HIGHSPEED_BUSY 0x00020000 108 #define SD_HIGHSPEED_SUPPORTED 0x00020000 109 110 #define MMC_HS_TIMING 0x00000100 111 #define MMC_HS_52MHZ 0x2 112 113 #define OCR_BUSY 0x80000000 114 #define OCR_HCS 0x40000000 115 #define OCR_VOLTAGE_MASK 0x007FFF80 116 #define OCR_ACCESS_MODE 0x60000000 117 118 #define SECURE_ERASE 0x80000000 119 120 #define MMC_STATUS_MASK (~0x0206BF7F) 121 #define MMC_STATUS_RDY_FOR_DATA (1 << 8) 122 #define MMC_STATUS_CURR_STATE (0xf << 9) 123 #define MMC_STATUS_ERROR (1 << 19) 124 125 #define MMC_STATE_PRG (7 << 9) 126 127 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 128 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 129 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 130 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 131 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 132 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 133 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 134 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 135 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 136 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 137 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 138 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 139 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 140 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 141 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 142 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 143 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 144 145 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ 146 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte 147 addressed by index which are 148 1 in value field */ 149 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte 150 addressed by index, which are 151 1 in value field */ 152 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ 153 154 #define SD_SWITCH_CHECK 0 155 #define SD_SWITCH_SWITCH 1 156 157 /* 158 * EXT_CSD fields 159 */ 160 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ 161 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ 162 #define EXT_CSD_PART_CONF 179 /* R/W */ 163 #define EXT_CSD_BUS_WIDTH 183 /* R/W */ 164 #define EXT_CSD_HS_TIMING 185 /* R/W */ 165 #define EXT_CSD_REV 192 /* RO */ 166 #define EXT_CSD_CARD_TYPE 196 /* RO */ 167 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 168 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ 169 #define EXT_CSD_BOOT_MULT 226 /* RO */ 170 171 /* 172 * EXT_CSD field definitions 173 */ 174 175 #define EXT_CSD_CMD_SET_NORMAL (1 << 0) 176 #define EXT_CSD_CMD_SET_SECURE (1 << 1) 177 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) 178 179 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ 180 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ 181 182 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ 183 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ 184 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ 185 186 #define R1_ILLEGAL_COMMAND (1 << 22) 187 #define R1_APP_CMD (1 << 5) 188 189 #define MMC_RSP_PRESENT (1 << 0) 190 #define MMC_RSP_136 (1 << 1) /* 136 bit response */ 191 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ 192 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ 193 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ 194 195 #define MMC_RSP_NONE (0) 196 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 197 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ 198 MMC_RSP_BUSY) 199 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) 200 #define MMC_RSP_R3 (MMC_RSP_PRESENT) 201 #define MMC_RSP_R4 (MMC_RSP_PRESENT) 202 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 203 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 204 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 205 206 #define MMCPART_NOAVAILABLE (0xff) 207 #define PART_ACCESS_MASK (0x7) 208 #define PART_SUPPORT (0x1) 209 210 /* Maximum block size for MMC */ 211 #define MMC_MAX_BLOCK_LEN 512 212 213 struct mmc_cid { 214 unsigned long psn; 215 unsigned short oid; 216 unsigned char mid; 217 unsigned char prv; 218 unsigned char mdt; 219 char pnm[7]; 220 }; 221 222 struct mmc_cmd { 223 ushort cmdidx; 224 uint resp_type; 225 uint cmdarg; 226 uint response[4]; 227 }; 228 229 struct mmc_data { 230 union { 231 char *dest; 232 const char *src; /* src buffers don't get written to */ 233 }; 234 uint flags; 235 uint blocks; 236 uint blocksize; 237 }; 238 239 struct mmc { 240 struct list_head link; 241 char name[32]; 242 void *priv; 243 uint voltages; 244 uint version; 245 uint has_init; 246 uint f_min; 247 uint f_max; 248 int high_capacity; 249 uint bus_width; 250 uint clock; 251 uint card_caps; 252 uint host_caps; 253 uint ocr; 254 uint scr[2]; 255 uint csd[4]; 256 uint cid[4]; 257 ushort rca; 258 char part_config; 259 char part_num; 260 uint tran_speed; 261 uint read_bl_len; 262 uint write_bl_len; 263 uint erase_grp_size; 264 u64 capacity; 265 block_dev_desc_t block_dev; 266 int (*send_cmd)(struct mmc *mmc, 267 struct mmc_cmd *cmd, struct mmc_data *data); 268 void (*set_ios)(struct mmc *mmc); 269 int (*init)(struct mmc *mmc); 270 int (*getcd)(struct mmc *mmc); 271 int (*getwp)(struct mmc *mmc); 272 uint b_max; 273 }; 274 275 int mmc_register(struct mmc *mmc); 276 int mmc_initialize(bd_t *bis); 277 int mmc_init(struct mmc *mmc); 278 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); 279 void mmc_set_clock(struct mmc *mmc, uint clock); 280 struct mmc *find_mmc_device(int dev_num); 281 int mmc_set_dev(int dev_num); 282 void print_mmc_devices(char separator); 283 int get_mmc_num(void); 284 int board_mmc_getcd(struct mmc *mmc); 285 int mmc_switch_part(int dev_num, unsigned int part_num); 286 int mmc_getcd(struct mmc *mmc); 287 int mmc_getwp(struct mmc *mmc); 288 void spl_mmc_load(void) __noreturn; 289 290 #ifdef CONFIG_GENERIC_MMC 291 #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI) 292 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); 293 #else 294 int mmc_legacy_init(int verbose); 295 #endif 296 297 #endif /* _MMC_H_ */ 298