1 /* 2 * Copyright 2008,2010 Freescale Semiconductor, Inc 3 * Andy Fleming 4 * 5 * Based (loosely) on the Linux code 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef _MMC_H_ 11 #define _MMC_H_ 12 13 #include <linux/list.h> 14 #include <linux/sizes.h> 15 #include <linux/compiler.h> 16 #include <part.h> 17 18 /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ 19 #define SD_VERSION_SD (1U << 31) 20 #define MMC_VERSION_MMC (1U << 30) 21 22 #define MAKE_SDMMC_VERSION(a, b, c) \ 23 ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c)) 24 #define MAKE_SD_VERSION(a, b, c) \ 25 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c)) 26 #define MAKE_MMC_VERSION(a, b, c) \ 27 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c)) 28 29 #define EXTRACT_SDMMC_MAJOR_VERSION(x) \ 30 (((u32)(x) >> 16) & 0xff) 31 #define EXTRACT_SDMMC_MINOR_VERSION(x) \ 32 (((u32)(x) >> 8) & 0xff) 33 #define EXTRACT_SDMMC_CHANGE_VERSION(x) \ 34 ((u32)(x) & 0xff) 35 36 #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0) 37 #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0) 38 #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0) 39 #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0) 40 41 #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0) 42 #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0) 43 #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0) 44 #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0) 45 #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0) 46 #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0) 47 #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0) 48 #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0) 49 #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0) 50 #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1) 51 #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0) 52 #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0) 53 #define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0) 54 55 #define MMC_MODE_HS (1 << 0) 56 #define MMC_MODE_HS_52MHz (1 << 1) 57 #define MMC_MODE_4BIT (1 << 2) 58 #define MMC_MODE_8BIT (1 << 3) 59 #define MMC_MODE_SPI (1 << 4) 60 #define MMC_MODE_DDR_52MHz (1 << 5) 61 62 #define SD_DATA_4BIT 0x00040000 63 64 #define IS_SD(x) ((x)->version & SD_VERSION_SD) 65 #define IS_MMC(x) ((x)->version & MMC_VERSION_MMC) 66 67 #define MMC_DATA_READ 1 68 #define MMC_DATA_WRITE 2 69 70 #define MMC_CMD_GO_IDLE_STATE 0 71 #define MMC_CMD_SEND_OP_COND 1 72 #define MMC_CMD_ALL_SEND_CID 2 73 #define MMC_CMD_SET_RELATIVE_ADDR 3 74 #define MMC_CMD_SET_DSR 4 75 #define MMC_CMD_SWITCH 6 76 #define MMC_CMD_SELECT_CARD 7 77 #define MMC_CMD_SEND_EXT_CSD 8 78 #define MMC_CMD_SEND_CSD 9 79 #define MMC_CMD_SEND_CID 10 80 #define MMC_CMD_STOP_TRANSMISSION 12 81 #define MMC_CMD_SEND_STATUS 13 82 #define MMC_CMD_SET_BLOCKLEN 16 83 #define MMC_CMD_READ_SINGLE_BLOCK 17 84 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 85 #define MMC_CMD_SET_BLOCK_COUNT 23 86 #define MMC_CMD_WRITE_SINGLE_BLOCK 24 87 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 88 #define MMC_CMD_ERASE_GROUP_START 35 89 #define MMC_CMD_ERASE_GROUP_END 36 90 #define MMC_CMD_ERASE 38 91 #define MMC_CMD_APP_CMD 55 92 #define MMC_CMD_SPI_READ_OCR 58 93 #define MMC_CMD_SPI_CRC_ON_OFF 59 94 #define MMC_CMD_RES_MAN 62 95 96 #define MMC_CMD62_ARG1 0xefac62ec 97 #define MMC_CMD62_ARG2 0xcbaea7 98 99 100 #define SD_CMD_SEND_RELATIVE_ADDR 3 101 #define SD_CMD_SWITCH_FUNC 6 102 #define SD_CMD_SEND_IF_COND 8 103 #define SD_CMD_SWITCH_UHS18V 11 104 105 #define SD_CMD_APP_SET_BUS_WIDTH 6 106 #define SD_CMD_APP_SD_STATUS 13 107 #define SD_CMD_ERASE_WR_BLK_START 32 108 #define SD_CMD_ERASE_WR_BLK_END 33 109 #define SD_CMD_APP_SEND_OP_COND 41 110 #define SD_CMD_APP_SEND_SCR 51 111 112 /* SCR definitions in different words */ 113 #define SD_HIGHSPEED_BUSY 0x00020000 114 #define SD_HIGHSPEED_SUPPORTED 0x00020000 115 116 #define OCR_BUSY 0x80000000 117 #define OCR_HCS 0x40000000 118 #define OCR_VOLTAGE_MASK 0x007FFF80 119 #define OCR_ACCESS_MODE 0x60000000 120 121 #define MMC_ERASE_ARG 0x00000000 122 #define MMC_SECURE_ERASE_ARG 0x80000000 123 #define MMC_TRIM_ARG 0x00000001 124 #define MMC_DISCARD_ARG 0x00000003 125 #define MMC_SECURE_TRIM1_ARG 0x80000001 126 #define MMC_SECURE_TRIM2_ARG 0x80008000 127 128 #define MMC_STATUS_MASK (~0x0206BF7F) 129 #define MMC_STATUS_SWITCH_ERROR (1 << 7) 130 #define MMC_STATUS_RDY_FOR_DATA (1 << 8) 131 #define MMC_STATUS_CURR_STATE (0xf << 9) 132 #define MMC_STATUS_ERROR (1 << 19) 133 134 #define MMC_STATE_PRG (7 << 9) 135 136 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 137 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 138 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 139 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 140 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 141 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 142 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 143 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 144 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 145 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 146 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 147 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 148 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 149 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 150 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 151 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 152 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 153 154 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ 155 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte 156 addressed by index which are 157 1 in value field */ 158 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte 159 addressed by index, which are 160 1 in value field */ 161 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ 162 163 #define SD_SWITCH_CHECK 0 164 #define SD_SWITCH_SWITCH 1 165 166 /* 167 * EXT_CSD fields 168 */ 169 #define EXT_CSD_ENH_START_ADDR 136 /* R/W */ 170 #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */ 171 #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ 172 #define EXT_CSD_PARTITION_SETTING 155 /* R/W */ 173 #define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */ 174 #define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */ 175 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ 176 #define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ 177 #define EXT_CSD_WR_REL_PARAM 166 /* R */ 178 #define EXT_CSD_WR_REL_SET 167 /* R/W */ 179 #define EXT_CSD_RPMB_MULT 168 /* RO */ 180 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ 181 #define EXT_CSD_BOOT_BUS_WIDTH 177 182 #define EXT_CSD_PART_CONF 179 /* R/W */ 183 #define EXT_CSD_BUS_WIDTH 183 /* R/W */ 184 #define EXT_CSD_HS_TIMING 185 /* R/W */ 185 #define EXT_CSD_REV 192 /* RO */ 186 #define EXT_CSD_CARD_TYPE 196 /* RO */ 187 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ 188 #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ 189 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ 190 #define EXT_CSD_BOOT_MULT 226 /* RO */ 191 192 /* 193 * EXT_CSD field definitions 194 */ 195 196 #define EXT_CSD_CMD_SET_NORMAL (1 << 0) 197 #define EXT_CSD_CMD_SET_SECURE (1 << 1) 198 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) 199 200 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ 201 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ 202 #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) 203 #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) 204 #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ 205 | EXT_CSD_CARD_TYPE_DDR_1_2V) 206 207 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ 208 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ 209 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ 210 #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ 211 #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ 212 213 #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) 214 #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) 215 #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0) 216 #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0) 217 218 #define EXT_CSD_BOOT_ACK(x) (x << 6) 219 #define EXT_CSD_BOOT_PART_NUM(x) (x << 3) 220 #define EXT_CSD_PARTITION_ACCESS(x) (x << 0) 221 222 #define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3) 223 #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2) 224 #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x) 225 226 #define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0) 227 228 #define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */ 229 #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */ 230 231 #define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */ 232 233 #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */ 234 #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */ 235 236 #define R1_ILLEGAL_COMMAND (1 << 22) 237 #define R1_APP_CMD (1 << 5) 238 239 #define MMC_RSP_PRESENT (1 << 0) 240 #define MMC_RSP_136 (1 << 1) /* 136 bit response */ 241 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ 242 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ 243 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ 244 245 #define MMC_RSP_NONE (0) 246 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 247 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ 248 MMC_RSP_BUSY) 249 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) 250 #define MMC_RSP_R3 (MMC_RSP_PRESENT) 251 #define MMC_RSP_R4 (MMC_RSP_PRESENT) 252 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 253 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 254 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) 255 256 #define MMCPART_NOAVAILABLE (0xff) 257 #define PART_ACCESS_MASK (0x7) 258 #define PART_SUPPORT (0x1) 259 #define ENHNCD_SUPPORT (0x2) 260 #define PART_ENH_ATTRIB (0x1f) 261 262 /* Maximum block size for MMC */ 263 #define MMC_MAX_BLOCK_LEN 512 264 265 /* The number of MMC physical partitions. These consist of: 266 * boot partitions (2), general purpose partitions (4) in MMC v4.4. 267 */ 268 #define MMC_NUM_BOOT_PARTITION 2 269 #define MMC_PART_RPMB 3 /* RPMB partition number */ 270 271 /* Driver model support */ 272 273 /** 274 * struct mmc_uclass_priv - Holds information about a device used by the uclass 275 */ 276 struct mmc_uclass_priv { 277 struct mmc *mmc; 278 }; 279 280 /** 281 * mmc_get_mmc_dev() - get the MMC struct pointer for a device 282 * 283 * Provided that the device is already probed and ready for use, this value 284 * will be available. 285 * 286 * @dev: Device 287 * @return associated mmc struct pointer if available, else NULL 288 */ 289 struct mmc *mmc_get_mmc_dev(struct udevice *dev); 290 291 /* End of driver model support */ 292 293 struct mmc_cid { 294 unsigned long psn; 295 unsigned short oid; 296 unsigned char mid; 297 unsigned char prv; 298 unsigned char mdt; 299 char pnm[7]; 300 }; 301 302 struct mmc_cmd { 303 ushort cmdidx; 304 uint resp_type; 305 uint cmdarg; 306 uint response[4]; 307 }; 308 309 struct mmc_data { 310 union { 311 char *dest; 312 const char *src; /* src buffers don't get written to */ 313 }; 314 uint flags; 315 uint blocks; 316 uint blocksize; 317 }; 318 319 /* forward decl. */ 320 struct mmc; 321 322 #ifdef CONFIG_DM_MMC_OPS 323 struct dm_mmc_ops { 324 /** 325 * send_cmd() - Send a command to the MMC device 326 * 327 * @dev: Device to receive the command 328 * @cmd: Command to send 329 * @data: Additional data to send/receive 330 * @return 0 if OK, -ve on error 331 */ 332 int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd, 333 struct mmc_data *data); 334 335 /** 336 * set_ios() - Set the I/O speed/width for an MMC device 337 * 338 * @dev: Device to update 339 * @return 0 if OK, -ve on error 340 */ 341 int (*set_ios)(struct udevice *dev); 342 343 /** 344 * get_cd() - See whether a card is present 345 * 346 * @dev: Device to check 347 * @return 0 if not present, 1 if present, -ve on error 348 */ 349 int (*get_cd)(struct udevice *dev); 350 351 /** 352 * get_wp() - See whether a card has write-protect enabled 353 * 354 * @dev: Device to check 355 * @return 0 if write-enabled, 1 if write-protected, -ve on error 356 */ 357 int (*get_wp)(struct udevice *dev); 358 }; 359 360 #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops) 361 362 int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, 363 struct mmc_data *data); 364 int dm_mmc_set_ios(struct udevice *dev); 365 int dm_mmc_get_cd(struct udevice *dev); 366 int dm_mmc_get_wp(struct udevice *dev); 367 368 /* Transition functions for compatibility */ 369 int mmc_set_ios(struct mmc *mmc); 370 int mmc_getcd(struct mmc *mmc); 371 int mmc_getwp(struct mmc *mmc); 372 373 #else 374 struct mmc_ops { 375 int (*send_cmd)(struct mmc *mmc, 376 struct mmc_cmd *cmd, struct mmc_data *data); 377 void (*set_ios)(struct mmc *mmc); 378 int (*init)(struct mmc *mmc); 379 int (*getcd)(struct mmc *mmc); 380 int (*getwp)(struct mmc *mmc); 381 }; 382 #endif 383 384 struct mmc_config { 385 const char *name; 386 #ifndef CONFIG_DM_MMC_OPS 387 const struct mmc_ops *ops; 388 #endif 389 uint host_caps; 390 uint voltages; 391 uint f_min; 392 uint f_max; 393 uint b_max; 394 unsigned char part_type; 395 }; 396 397 struct sd_ssr { 398 unsigned int au; /* In sectors */ 399 unsigned int erase_timeout; /* In milliseconds */ 400 unsigned int erase_offset; /* In milliseconds */ 401 }; 402 403 /* 404 * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device 405 * with mmc_get_mmc_dev(). 406 * 407 * TODO struct mmc should be in mmc_private but it's hard to fix right now 408 */ 409 struct mmc { 410 #ifndef CONFIG_BLK 411 struct list_head link; 412 #endif 413 const struct mmc_config *cfg; /* provided configuration */ 414 uint version; 415 void *priv; 416 uint has_init; 417 int high_capacity; 418 uint bus_width; 419 uint clock; 420 uint card_caps; 421 uint ocr; 422 uint dsr; 423 uint dsr_imp; 424 uint scr[2]; 425 uint csd[4]; 426 uint cid[4]; 427 ushort rca; 428 u8 part_support; 429 u8 part_attr; 430 u8 wr_rel_set; 431 char part_config; 432 uint tran_speed; 433 uint read_bl_len; 434 uint write_bl_len; 435 uint erase_grp_size; /* in 512-byte sectors */ 436 uint hc_wp_grp_size; /* in 512-byte sectors */ 437 struct sd_ssr ssr; /* SD status register */ 438 u64 capacity; 439 u64 capacity_user; 440 u64 capacity_boot; 441 u64 capacity_rpmb; 442 u64 capacity_gp[4]; 443 u64 enh_user_start; 444 u64 enh_user_size; 445 #ifndef CONFIG_BLK 446 struct blk_desc block_dev; 447 #endif 448 char op_cond_pending; /* 1 if we are waiting on an op_cond command */ 449 char init_in_progress; /* 1 if we have done mmc_start_init() */ 450 char preinit; /* start init as early as possible */ 451 int ddr_mode; 452 #ifdef CONFIG_DM_MMC 453 struct udevice *dev; /* Device for this MMC controller */ 454 #endif 455 }; 456 457 struct mmc_hwpart_conf { 458 struct { 459 uint enh_start; /* in 512-byte sectors */ 460 uint enh_size; /* in 512-byte sectors, if 0 no enh area */ 461 unsigned wr_rel_change : 1; 462 unsigned wr_rel_set : 1; 463 } user; 464 struct { 465 uint size; /* in 512-byte sectors */ 466 unsigned enhanced : 1; 467 unsigned wr_rel_change : 1; 468 unsigned wr_rel_set : 1; 469 } gp_part[4]; 470 }; 471 472 enum mmc_hwpart_conf_mode { 473 MMC_HWPART_CONF_CHECK, 474 MMC_HWPART_CONF_SET, 475 MMC_HWPART_CONF_COMPLETE, 476 }; 477 478 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv); 479 480 /** 481 * mmc_bind() - Set up a new MMC device ready for probing 482 * 483 * A child block device is bound with the IF_TYPE_MMC interface type. This 484 * allows the device to be used with CONFIG_BLK 485 * 486 * @dev: MMC device to set up 487 * @mmc: MMC struct 488 * @cfg: MMC configuration 489 * @return 0 if OK, -ve on error 490 */ 491 int mmc_bind(struct udevice *dev, struct mmc *mmc, 492 const struct mmc_config *cfg); 493 void mmc_destroy(struct mmc *mmc); 494 495 /** 496 * mmc_unbind() - Unbind a MMC device's child block device 497 * 498 * @dev: MMC device 499 * @return 0 if OK, -ve on error 500 */ 501 int mmc_unbind(struct udevice *dev); 502 int mmc_initialize(bd_t *bis); 503 int mmc_init(struct mmc *mmc); 504 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); 505 void mmc_set_clock(struct mmc *mmc, uint clock); 506 struct mmc *find_mmc_device(int dev_num); 507 int mmc_set_dev(int dev_num); 508 void print_mmc_devices(char separator); 509 510 /** 511 * get_mmc_num() - get the total MMC device number 512 * 513 * @return 0 if there is no MMC device, else the number of devices 514 */ 515 int get_mmc_num(void); 516 int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf, 517 enum mmc_hwpart_conf_mode mode); 518 519 #ifndef CONFIG_DM_MMC_OPS 520 int mmc_getcd(struct mmc *mmc); 521 int board_mmc_getcd(struct mmc *mmc); 522 int mmc_getwp(struct mmc *mmc); 523 int board_mmc_getwp(struct mmc *mmc); 524 #endif 525 526 int mmc_set_dsr(struct mmc *mmc, u16 val); 527 /* Function to change the size of boot partition and rpmb partitions */ 528 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, 529 unsigned long rpmbsize); 530 /* Function to modify the PARTITION_CONFIG field of EXT_CSD */ 531 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access); 532 /* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */ 533 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode); 534 /* Function to modify the RST_n_FUNCTION field of EXT_CSD */ 535 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable); 536 /* Functions to read / write the RPMB partition */ 537 int mmc_rpmb_set_key(struct mmc *mmc, void *key); 538 int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter); 539 int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk, 540 unsigned short cnt, unsigned char *key); 541 int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk, 542 unsigned short cnt, unsigned char *key); 543 /** 544 * Start device initialization and return immediately; it does not block on 545 * polling OCR (operation condition register) status. Then you should call 546 * mmc_init, which would block on polling OCR status and complete the device 547 * initializatin. 548 * 549 * @param mmc Pointer to a MMC device struct 550 * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error. 551 */ 552 int mmc_start_init(struct mmc *mmc); 553 554 /** 555 * Set preinit flag of mmc device. 556 * 557 * This will cause the device to be pre-inited during mmc_initialize(), 558 * which may save boot time if the device is not accessed until later. 559 * Some eMMC devices take 200-300ms to init, but unfortunately they 560 * must be sent a series of commands to even get them to start preparing 561 * for operation. 562 * 563 * @param mmc Pointer to a MMC device struct 564 * @param preinit preinit flag value 565 */ 566 void mmc_set_preinit(struct mmc *mmc, int preinit); 567 568 #ifdef CONFIG_MMC_SPI 569 #define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI) 570 #else 571 #define mmc_host_is_spi(mmc) 0 572 #endif 573 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); 574 575 void board_mmc_power_init(void); 576 int board_mmc_init(bd_t *bis); 577 int cpu_mmc_init(bd_t *bis); 578 int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); 579 int mmc_get_env_dev(void); 580 581 struct pci_device_id; 582 583 /** 584 * pci_mmc_init() - set up PCI MMC devices 585 * 586 * This finds all the matching PCI IDs and sets them up as MMC devices. 587 * 588 * @name: Name to use for devices 589 * @mmc_supported: PCI IDs to search for, terminated by {0, 0} 590 */ 591 int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported); 592 593 /* Set block count limit because of 16 bit register limit on some hardware*/ 594 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT 595 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 596 #endif 597 598 /** 599 * mmc_get_blk_desc() - Get the block descriptor for an MMC device 600 * 601 * @mmc: MMC device 602 * @return block device if found, else NULL 603 */ 604 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc); 605 606 #endif /* _MMC_H_ */ 607