xref: /openbmc/u-boot/include/mmc.h (revision 068abf0c)
1 /*
2  * Copyright 2008,2010 Freescale Semiconductor, Inc
3  * Andy Fleming
4  *
5  * Based (loosely) on the Linux code
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #ifndef _MMC_H_
27 #define _MMC_H_
28 
29 #include <linux/list.h>
30 
31 #define SD_VERSION_SD	0x20000
32 #define SD_VERSION_2	(SD_VERSION_SD | 0x20)
33 #define SD_VERSION_1_0	(SD_VERSION_SD | 0x10)
34 #define SD_VERSION_1_10	(SD_VERSION_SD | 0x1a)
35 #define MMC_VERSION_MMC		0x10000
36 #define MMC_VERSION_UNKNOWN	(MMC_VERSION_MMC)
37 #define MMC_VERSION_1_2		(MMC_VERSION_MMC | 0x12)
38 #define MMC_VERSION_1_4		(MMC_VERSION_MMC | 0x14)
39 #define MMC_VERSION_2_2		(MMC_VERSION_MMC | 0x22)
40 #define MMC_VERSION_3		(MMC_VERSION_MMC | 0x30)
41 #define MMC_VERSION_4		(MMC_VERSION_MMC | 0x40)
42 
43 #define MMC_MODE_HS		0x001
44 #define MMC_MODE_HS_52MHz	0x010
45 #define MMC_MODE_4BIT		0x100
46 #define MMC_MODE_8BIT		0x200
47 #define MMC_MODE_SPI		0x400
48 #define MMC_MODE_HC		0x800
49 
50 #define SD_DATA_4BIT	0x00040000
51 
52 #define IS_SD(x) (x->version & SD_VERSION_SD)
53 
54 #define MMC_DATA_READ		1
55 #define MMC_DATA_WRITE		2
56 
57 #define NO_CARD_ERR		-16 /* No SD/MMC card inserted */
58 #define UNUSABLE_ERR		-17 /* Unusable Card */
59 #define COMM_ERR		-18 /* Communications Error */
60 #define TIMEOUT			-19
61 
62 #define MMC_CMD_GO_IDLE_STATE		0
63 #define MMC_CMD_SEND_OP_COND		1
64 #define MMC_CMD_ALL_SEND_CID		2
65 #define MMC_CMD_SET_RELATIVE_ADDR	3
66 #define MMC_CMD_SET_DSR			4
67 #define MMC_CMD_SWITCH			6
68 #define MMC_CMD_SELECT_CARD		7
69 #define MMC_CMD_SEND_EXT_CSD		8
70 #define MMC_CMD_SEND_CSD		9
71 #define MMC_CMD_SEND_CID		10
72 #define MMC_CMD_STOP_TRANSMISSION	12
73 #define MMC_CMD_SEND_STATUS		13
74 #define MMC_CMD_SET_BLOCKLEN		16
75 #define MMC_CMD_READ_SINGLE_BLOCK	17
76 #define MMC_CMD_READ_MULTIPLE_BLOCK	18
77 #define MMC_CMD_WRITE_SINGLE_BLOCK	24
78 #define MMC_CMD_WRITE_MULTIPLE_BLOCK	25
79 #define MMC_CMD_ERASE_GROUP_START	35
80 #define MMC_CMD_ERASE_GROUP_END		36
81 #define MMC_CMD_ERASE			38
82 #define MMC_CMD_APP_CMD			55
83 #define MMC_CMD_SPI_READ_OCR		58
84 #define MMC_CMD_SPI_CRC_ON_OFF		59
85 
86 #define SD_CMD_SEND_RELATIVE_ADDR	3
87 #define SD_CMD_SWITCH_FUNC		6
88 #define SD_CMD_SEND_IF_COND		8
89 
90 #define SD_CMD_APP_SET_BUS_WIDTH	6
91 #define SD_CMD_ERASE_WR_BLK_START	32
92 #define SD_CMD_ERASE_WR_BLK_END		33
93 #define SD_CMD_APP_SEND_OP_COND		41
94 #define SD_CMD_APP_SEND_SCR		51
95 
96 /* SCR definitions in different words */
97 #define SD_HIGHSPEED_BUSY	0x00020000
98 #define SD_HIGHSPEED_SUPPORTED	0x00020000
99 
100 #define MMC_HS_TIMING		0x00000100
101 #define MMC_HS_52MHZ		0x2
102 
103 #define OCR_BUSY		0x80000000
104 #define OCR_HCS			0x40000000
105 #define OCR_VOLTAGE_MASK	0x007FFF80
106 #define OCR_ACCESS_MODE		0x60000000
107 
108 #define SECURE_ERASE		0x80000000
109 
110 #define MMC_STATUS_MASK		(~0x0206BF7F)
111 #define MMC_STATUS_RDY_FOR_DATA (1 << 8)
112 #define MMC_STATUS_CURR_STATE	(0xf << 9)
113 #define MMC_STATUS_ERROR	(1 << 19)
114 
115 #define MMC_STATE_PRG		(7 << 9)
116 
117 #define MMC_VDD_165_195		0x00000080	/* VDD voltage 1.65 - 1.95 */
118 #define MMC_VDD_20_21		0x00000100	/* VDD voltage 2.0 ~ 2.1 */
119 #define MMC_VDD_21_22		0x00000200	/* VDD voltage 2.1 ~ 2.2 */
120 #define MMC_VDD_22_23		0x00000400	/* VDD voltage 2.2 ~ 2.3 */
121 #define MMC_VDD_23_24		0x00000800	/* VDD voltage 2.3 ~ 2.4 */
122 #define MMC_VDD_24_25		0x00001000	/* VDD voltage 2.4 ~ 2.5 */
123 #define MMC_VDD_25_26		0x00002000	/* VDD voltage 2.5 ~ 2.6 */
124 #define MMC_VDD_26_27		0x00004000	/* VDD voltage 2.6 ~ 2.7 */
125 #define MMC_VDD_27_28		0x00008000	/* VDD voltage 2.7 ~ 2.8 */
126 #define MMC_VDD_28_29		0x00010000	/* VDD voltage 2.8 ~ 2.9 */
127 #define MMC_VDD_29_30		0x00020000	/* VDD voltage 2.9 ~ 3.0 */
128 #define MMC_VDD_30_31		0x00040000	/* VDD voltage 3.0 ~ 3.1 */
129 #define MMC_VDD_31_32		0x00080000	/* VDD voltage 3.1 ~ 3.2 */
130 #define MMC_VDD_32_33		0x00100000	/* VDD voltage 3.2 ~ 3.3 */
131 #define MMC_VDD_33_34		0x00200000	/* VDD voltage 3.3 ~ 3.4 */
132 #define MMC_VDD_34_35		0x00400000	/* VDD voltage 3.4 ~ 3.5 */
133 #define MMC_VDD_35_36		0x00800000	/* VDD voltage 3.5 ~ 3.6 */
134 
135 #define MMC_SWITCH_MODE_CMD_SET		0x00 /* Change the command set */
136 #define MMC_SWITCH_MODE_SET_BITS	0x01 /* Set bits in EXT_CSD byte
137 						addressed by index which are
138 						1 in value field */
139 #define MMC_SWITCH_MODE_CLEAR_BITS	0x02 /* Clear bits in EXT_CSD byte
140 						addressed by index, which are
141 						1 in value field */
142 #define MMC_SWITCH_MODE_WRITE_BYTE	0x03 /* Set target byte to value */
143 
144 #define SD_SWITCH_CHECK		0
145 #define SD_SWITCH_SWITCH	1
146 
147 /*
148  * EXT_CSD fields
149  */
150 #define EXT_CSD_PARTITIONING_SUPPORT	160	/* RO */
151 #define EXT_CSD_ERASE_GROUP_DEF		175	/* R/W */
152 #define EXT_CSD_PART_CONF		179	/* R/W */
153 #define EXT_CSD_BUS_WIDTH		183	/* R/W */
154 #define EXT_CSD_HS_TIMING		185	/* R/W */
155 #define EXT_CSD_REV			192	/* RO */
156 #define EXT_CSD_CARD_TYPE		196	/* RO */
157 #define EXT_CSD_SEC_CNT			212	/* RO, 4 bytes */
158 #define EXT_CSD_HC_ERASE_GRP_SIZE	224	/* RO */
159 
160 /*
161  * EXT_CSD field definitions
162  */
163 
164 #define EXT_CSD_CMD_SET_NORMAL		(1 << 0)
165 #define EXT_CSD_CMD_SET_SECURE		(1 << 1)
166 #define EXT_CSD_CMD_SET_CPSECURE	(1 << 2)
167 
168 #define EXT_CSD_CARD_TYPE_26	(1 << 0)	/* Card can run at 26MHz */
169 #define EXT_CSD_CARD_TYPE_52	(1 << 1)	/* Card can run at 52MHz */
170 
171 #define EXT_CSD_BUS_WIDTH_1	0	/* Card is in 1 bit mode */
172 #define EXT_CSD_BUS_WIDTH_4	1	/* Card is in 4 bit mode */
173 #define EXT_CSD_BUS_WIDTH_8	2	/* Card is in 8 bit mode */
174 
175 #define R1_ILLEGAL_COMMAND		(1 << 22)
176 #define R1_APP_CMD			(1 << 5)
177 
178 #define MMC_RSP_PRESENT (1 << 0)
179 #define MMC_RSP_136	(1 << 1)		/* 136 bit response */
180 #define MMC_RSP_CRC	(1 << 2)		/* expect valid crc */
181 #define MMC_RSP_BUSY	(1 << 3)		/* card may send busy */
182 #define MMC_RSP_OPCODE	(1 << 4)		/* response contains opcode */
183 
184 #define MMC_RSP_NONE	(0)
185 #define MMC_RSP_R1	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
186 #define MMC_RSP_R1b	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
187 			MMC_RSP_BUSY)
188 #define MMC_RSP_R2	(MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
189 #define MMC_RSP_R3	(MMC_RSP_PRESENT)
190 #define MMC_RSP_R4	(MMC_RSP_PRESENT)
191 #define MMC_RSP_R5	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
192 #define MMC_RSP_R6	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
193 #define MMC_RSP_R7	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
194 
195 #define MMCPART_NOAVAILABLE	(0xff)
196 #define PART_ACCESS_MASK	(0x7)
197 #define PART_SUPPORT		(0x1)
198 
199 struct mmc_cid {
200 	unsigned long psn;
201 	unsigned short oid;
202 	unsigned char mid;
203 	unsigned char prv;
204 	unsigned char mdt;
205 	char pnm[7];
206 };
207 
208 /*
209  * WARNING!
210  *
211  * This structure is used by atmel_mci.c only.
212  * It works for the AVR32 architecture but NOT
213  * for ARM/AT91 architectures.
214  * Its use is highly depreciated.
215  * After the atmel_mci.c driver for AVR32 has
216  * been replaced this structure will be removed.
217  */
218 struct mmc_csd
219 {
220 	u8	csd_structure:2,
221 		spec_vers:4,
222 		rsvd1:2;
223 	u8	taac;
224 	u8	nsac;
225 	u8	tran_speed;
226 	u16	ccc:12,
227 		read_bl_len:4;
228 	u64	read_bl_partial:1,
229 		write_blk_misalign:1,
230 		read_blk_misalign:1,
231 		dsr_imp:1,
232 		rsvd2:2,
233 		c_size:12,
234 		vdd_r_curr_min:3,
235 		vdd_r_curr_max:3,
236 		vdd_w_curr_min:3,
237 		vdd_w_curr_max:3,
238 		c_size_mult:3,
239 		sector_size:5,
240 		erase_grp_size:5,
241 		wp_grp_size:5,
242 		wp_grp_enable:1,
243 		default_ecc:2,
244 		r2w_factor:3,
245 		write_bl_len:4,
246 		write_bl_partial:1,
247 		rsvd3:5;
248 	u8	file_format_grp:1,
249 		copy:1,
250 		perm_write_protect:1,
251 		tmp_write_protect:1,
252 		file_format:2,
253 		ecc:2;
254 	u8	crc:7;
255 	u8	one:1;
256 };
257 
258 struct mmc_cmd {
259 	ushort cmdidx;
260 	uint resp_type;
261 	uint cmdarg;
262 	uint response[4];
263 	uint flags;
264 };
265 
266 struct mmc_data {
267 	union {
268 		char *dest;
269 		const char *src; /* src buffers don't get written to */
270 	};
271 	uint flags;
272 	uint blocks;
273 	uint blocksize;
274 };
275 
276 struct mmc {
277 	struct list_head link;
278 	char name[32];
279 	void *priv;
280 	uint voltages;
281 	uint version;
282 	uint has_init;
283 	uint f_min;
284 	uint f_max;
285 	int high_capacity;
286 	uint bus_width;
287 	uint clock;
288 	uint card_caps;
289 	uint host_caps;
290 	uint ocr;
291 	uint scr[2];
292 	uint csd[4];
293 	uint cid[4];
294 	ushort rca;
295 	char part_config;
296 	char part_num;
297 	uint tran_speed;
298 	uint read_bl_len;
299 	uint write_bl_len;
300 	uint erase_grp_size;
301 	u64 capacity;
302 	block_dev_desc_t block_dev;
303 	int (*send_cmd)(struct mmc *mmc,
304 			struct mmc_cmd *cmd, struct mmc_data *data);
305 	void (*set_ios)(struct mmc *mmc);
306 	int (*init)(struct mmc *mmc);
307 	int (*getcd)(struct mmc *mmc);
308 	uint b_max;
309 };
310 
311 int mmc_register(struct mmc *mmc);
312 int mmc_initialize(bd_t *bis);
313 int mmc_init(struct mmc *mmc);
314 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
315 void mmc_set_clock(struct mmc *mmc, uint clock);
316 struct mmc *find_mmc_device(int dev_num);
317 int mmc_set_dev(int dev_num);
318 void print_mmc_devices(char separator);
319 int get_mmc_num(void);
320 int board_mmc_getcd(struct mmc *mmc);
321 int mmc_switch_part(int dev_num, unsigned int part_num);
322 int mmc_getcd(struct mmc *mmc);
323 
324 #ifdef CONFIG_GENERIC_MMC
325 #define mmc_host_is_spi(mmc)	((mmc)->host_caps & MMC_MODE_SPI)
326 struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
327 #else
328 int mmc_legacy_init(int verbose);
329 #endif
330 
331 #endif /* _MMC_H_ */
332