xref: /openbmc/u-boot/include/miiphy.h (revision efc05ae1)
1 /*----------------------------------------------------------------------------+
2 |   This source code is dual-licensed.  You may use it under the terms of the
3 |   GNU General Public License version 2, or under the license below.
4 |
5 |	This source code has been made available to you by IBM on an AS-IS
6 |	basis.	Anyone receiving this source is licensed under IBM
7 |	copyrights to use it in any way he or she deems fit, including
8 |	copying it, modifying it, compiling it, and redistributing it either
9 |	with or without modifications.	No license under IBM patents or
10 |	patent applications is to be implied by the copyright license.
11 |
12 |	Any user of this software should understand that IBM cannot provide
13 |	technical support for this software and will not be responsible for
14 |	any consequences resulting from the use of this software.
15 |
16 |	Any person who transfers this source code or any derivative work
17 |	must include the IBM copyright notice, this paragraph, and the
18 |	preceding two paragraphs in the transferred software.
19 |
20 |	COPYRIGHT   I B M   CORPORATION 1999
21 |	LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
22 |
23 |   Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
24 +----------------------------------------------------------------------------*/
25 /*----------------------------------------------------------------------------+
26 |
27 |  File Name:	miiphy.h
28 |
29 |  Function:	Include file defining PHY registers.
30 |
31 |  Author:	Mark Wisner
32 |
33 +----------------------------------------------------------------------------*/
34 #ifndef _miiphy_h_
35 #define _miiphy_h_
36 
37 #include <linux/mii.h>
38 #include <net.h>
39 
40 int miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
41 		 unsigned short *value);
42 int miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
43 		  unsigned short value);
44 int miiphy_info (const char *devname, unsigned char addr, unsigned int *oui,
45 		 unsigned char *model, unsigned char *rev);
46 int miiphy_reset (const char *devname, unsigned char addr);
47 int miiphy_speed (const char *devname, unsigned char addr);
48 int miiphy_duplex (const char *devname, unsigned char addr);
49 int miiphy_is_1000base_x (const char *devname, unsigned char addr);
50 #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
51 int miiphy_link (const char *devname, unsigned char addr);
52 #endif
53 
54 void miiphy_init (void);
55 
56 void miiphy_register (const char *devname,
57 		      int (*read) (const char *devname, unsigned char addr,
58 				   unsigned char reg, unsigned short *value),
59 		      int (*write) (const char *devname, unsigned char addr,
60 				    unsigned char reg, unsigned short value));
61 
62 int miiphy_set_current_dev (const char *devname);
63 const char *miiphy_get_current_dev (void);
64 
65 void miiphy_listdev (void);
66 
67 #ifdef CONFIG_BITBANGMII
68 
69 #define BB_MII_DEVNAME	"bb_miiphy"
70 
71 struct bb_miiphy_bus {
72 	char name[NAMESIZE];
73 	int (*init)(struct bb_miiphy_bus *bus);
74 	int (*mdio_active)(struct bb_miiphy_bus *bus);
75 	int (*mdio_tristate)(struct bb_miiphy_bus *bus);
76 	int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
77 	int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
78 	int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
79 	int (*delay)(struct bb_miiphy_bus *bus);
80 #ifdef CONFIG_BITBANGMII_MULTI
81 	void *priv;
82 #endif
83 };
84 
85 extern struct bb_miiphy_bus bb_miiphy_buses[];
86 extern int bb_miiphy_buses_num;
87 
88 void bb_miiphy_init (void);
89 int bb_miiphy_read (const char *devname, unsigned char addr,
90 		    unsigned char reg, unsigned short *value);
91 int bb_miiphy_write (const char *devname, unsigned char addr,
92 		     unsigned char reg, unsigned short value);
93 #endif
94 
95 /* phy seed setup */
96 #define AUTO			99
97 #define _1000BASET		1000
98 #define _100BASET		100
99 #define _10BASET		10
100 #define HALF			22
101 #define FULL			44
102 
103 /* phy register offsets */
104 #define MII_MIPSCR		0x11
105 
106 /* MII_LPA */
107 #define PHY_ANLPAR_PSB_802_3	0x0001
108 #define PHY_ANLPAR_PSB_802_9	0x0002
109 
110 /* MII_CTRL1000 masks */
111 #define PHY_1000BTCR_1000FD	0x0200
112 #define PHY_1000BTCR_1000HD	0x0100
113 
114 /* MII_STAT1000 masks */
115 #define PHY_1000BTSR_MSCF	0x8000
116 #define PHY_1000BTSR_MSCR	0x4000
117 #define PHY_1000BTSR_LRS	0x2000
118 #define PHY_1000BTSR_RRS	0x1000
119 #define PHY_1000BTSR_1000FD	0x0800
120 #define PHY_1000BTSR_1000HD	0x0400
121 
122 /* phy EXSR */
123 #define ESTATUS_1000XF		0x8000
124 #define ESTATUS_1000XH		0x4000
125 
126 #endif
127