1 /*----------------------------------------------------------------------------+ 2 | 3 | This source code has been made available to you by IBM on an AS-IS 4 | basis. Anyone receiving this source is licensed under IBM 5 | copyrights to use it in any way he or she deems fit, including 6 | copying it, modifying it, compiling it, and redistributing it either 7 | with or without modifications. No license under IBM patents or 8 | patent applications is to be implied by the copyright license. 9 | 10 | Any user of this software should understand that IBM cannot provide 11 | technical support for this software and will not be responsible for 12 | any consequences resulting from the use of this software. 13 | 14 | Any person who transfers this source code or any derivative work 15 | must include the IBM copyright notice, this paragraph, and the 16 | preceding two paragraphs in the transferred software. 17 | 18 | COPYRIGHT I B M CORPORATION 1999 19 | LICENSED MATERIAL - PROGRAM PROPERTY OF I B M 20 +----------------------------------------------------------------------------*/ 21 /*----------------------------------------------------------------------------+ 22 | 23 | File Name: miiphy.h 24 | 25 | Function: Include file defining PHY registers. 26 | 27 | Author: Mark Wisner 28 | 29 | Change Activity- 30 | 31 | Date Description of Change BY 32 | --------- --------------------- --- 33 | 04-May-99 Created MKW 34 | 07-Jul-99 Added full duplex support MKW 35 | 08-Sep-01 Tweaks gvb 36 | 37 +----------------------------------------------------------------------------*/ 38 #ifndef _miiphy_h_ 39 #define _miiphy_h_ 40 41 42 int miiphy_read(unsigned char addr, unsigned char reg, unsigned short * value); 43 int miiphy_write(unsigned char addr, unsigned char reg, unsigned short value); 44 int miiphy_info(unsigned char addr, unsigned int *oui, unsigned char *model, 45 unsigned char *rev); 46 int miiphy_reset(unsigned char addr); 47 int miiphy_speed(unsigned char addr); 48 int miiphy_duplex(unsigned char addr); 49 #ifdef CFG_FAULT_ECHO_LINK_DOWN 50 int miiphy_link(unsigned char addr); 51 #endif 52 53 54 /* phy seed setup */ 55 #define AUTO 99 56 #define _1000BASET 1000 57 #define _100BASET 100 58 #define _10BASET 10 59 #define HALF 22 60 #define FULL 44 61 62 /* phy register offsets */ 63 #define PHY_BMCR 0x00 64 #define PHY_BMSR 0x01 65 #define PHY_PHYIDR1 0x02 66 #define PHY_PHYIDR2 0x03 67 #define PHY_ANAR 0x04 68 #define PHY_ANLPAR 0x05 69 #define PHY_ANER 0x06 70 #define PHY_ANNPTR 0x07 71 #define PHY_ANLPNP 0x08 72 #define PHY_1000BTCR 0x09 73 #define PHY_1000BTSR 0x0A 74 #define PHY_PHYSTS 0x10 75 #define PHY_MIPSCR 0x11 76 #define PHY_MIPGSR 0x12 77 #define PHY_DCR 0x13 78 #define PHY_FCSCR 0x14 79 #define PHY_RECR 0x15 80 #define PHY_PCSR 0x16 81 #define PHY_LBR 0x17 82 #define PHY_10BTSCR 0x18 83 #define PHY_PHYCTRL 0x19 84 85 /* PHY BMCR */ 86 #define PHY_BMCR_RESET 0x8000 87 #define PHY_BMCR_LOOP 0x4000 88 #define PHY_BMCR_100MB 0x2000 89 #define PHY_BMCR_AUTON 0x1000 90 #define PHY_BMCR_POWD 0x0800 91 #define PHY_BMCR_ISO 0x0400 92 #define PHY_BMCR_RST_NEG 0x0200 93 #define PHY_BMCR_DPLX 0x0100 94 #define PHY_BMCR_COL_TST 0x0080 95 96 #define PHY_BMCR_SPEED_MASK 0x2040 97 #define PHY_BMCR_1000_MBPS 0x0040 98 #define PHY_BMCR_100_MBPS 0x2000 99 #define PHY_BMCR_10_MBPS 0x0000 100 101 /* phy BMSR */ 102 #define PHY_BMSR_100T4 0x8000 103 #define PHY_BMSR_100TXF 0x4000 104 #define PHY_BMSR_100TXH 0x2000 105 #define PHY_BMSR_10TF 0x1000 106 #define PHY_BMSR_10TH 0x0800 107 #define PHY_BMSR_PRE_SUP 0x0040 108 #define PHY_BMSR_AUTN_COMP 0x0020 109 #define PHY_BMSR_RF 0x0010 110 #define PHY_BMSR_AUTN_ABLE 0x0008 111 #define PHY_BMSR_LS 0x0004 112 #define PHY_BMSR_JD 0x0002 113 #define PHY_BMSR_EXT 0x0001 114 115 /*phy ANLPAR */ 116 #define PHY_ANLPAR_NP 0x8000 117 #define PHY_ANLPAR_ACK 0x4000 118 #define PHY_ANLPAR_RF 0x2000 119 #define PHY_ANLPAR_T4 0x0200 120 #define PHY_ANLPAR_TXFD 0x0100 121 #define PHY_ANLPAR_TX 0x0080 122 #define PHY_ANLPAR_10FD 0x0040 123 #define PHY_ANLPAR_10 0x0020 124 #define PHY_ANLPAR_100 0x0380 /* we can run at 100 */ 125 126 #define PHY_ANLPAR_PSB_MASK 0x001f 127 #define PHY_ANLPAR_PSB_802_3 0x0001 128 #define PHY_ANLPAR_PSB_802_9 0x0002 129 130 /* PHY_1000BTSR */ 131 #define PHY_1000BTSR_MSCF 0x8000 132 #define PHY_1000BTSR_MSCR 0x4000 133 #define PHY_1000BTSR_LRS 0x2000 134 #define PHY_1000BTSR_RRS 0x1000 135 #define PHY_1000BTSR_1000FD 0x0800 136 #define PHY_1000BTSR_1000HD 0x0400 137 138 #endif 139