14549e789STom Rini /* SPDX-License-Identifier: GPL-2.0 OR IBM-pibs */ 246263f2dSWolfgang Denk /* 346263f2dSWolfgang Denk * Additions (C) Copyright 2009 Industrie Dial Face S.p.A. 446263f2dSWolfgang Denk */ 5214ec6bbSwdenk /*----------------------------------------------------------------------------+ 6214ec6bbSwdenk | 7214ec6bbSwdenk | File Name: miiphy.h 8214ec6bbSwdenk | 9214ec6bbSwdenk | Function: Include file defining PHY registers. 10214ec6bbSwdenk | 11214ec6bbSwdenk | Author: Mark Wisner 12214ec6bbSwdenk | 13214ec6bbSwdenk +----------------------------------------------------------------------------*/ 14214ec6bbSwdenk #ifndef _miiphy_h_ 15214ec6bbSwdenk #define _miiphy_h_ 16214ec6bbSwdenk 175f184715SAndy Fleming #include <common.h> 188ef583a0SMike Frysinger #include <linux/mii.h> 195f184715SAndy Fleming #include <linux/list.h> 2063ff004cSMarian Balakowicz #include <net.h> 215f184715SAndy Fleming #include <phy.h> 225f184715SAndy Fleming 23f915c931SWolfgang Denk int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, 2463ff004cSMarian Balakowicz unsigned short *value); 25f915c931SWolfgang Denk int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, 2663ff004cSMarian Balakowicz unsigned short value); 275700bb63SMike Frysinger int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, 2863ff004cSMarian Balakowicz unsigned char *model, unsigned char *rev); 295700bb63SMike Frysinger int miiphy_reset(const char *devname, unsigned char addr); 305700bb63SMike Frysinger int miiphy_speed(const char *devname, unsigned char addr); 315700bb63SMike Frysinger int miiphy_duplex(const char *devname, unsigned char addr); 325700bb63SMike Frysinger int miiphy_is_1000base_x(const char *devname, unsigned char addr); 336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 345700bb63SMike Frysinger int miiphy_link(const char *devname, unsigned char addr); 35fc3e2165Swdenk #endif 36214ec6bbSwdenk 37d9785c14SMarian Balakowicz void miiphy_init(void); 38d9785c14SMarian Balakowicz 395700bb63SMike Frysinger int miiphy_set_current_dev(const char *devname); 405700bb63SMike Frysinger const char *miiphy_get_current_dev(void); 415f184715SAndy Fleming struct mii_dev *mdio_get_current_dev(void); 42*9215bb1fSPankaj Bansal struct list_head *mdio_get_list_head(void); 435f184715SAndy Fleming struct mii_dev *miiphy_get_dev_by_name(const char *devname); 445f184715SAndy Fleming struct phy_device *mdio_phydev_for_ethname(const char *devname); 4563ff004cSMarian Balakowicz 4663ff004cSMarian Balakowicz void miiphy_listdev(void); 4763ff004cSMarian Balakowicz 485f184715SAndy Fleming struct mii_dev *mdio_alloc(void); 49cb6baca7SBin Meng void mdio_free(struct mii_dev *bus); 505f184715SAndy Fleming int mdio_register(struct mii_dev *bus); 5179e2a6a0SMichal Simek 5279e2a6a0SMichal Simek /** 5379e2a6a0SMichal Simek * mdio_register_seq - Register mdio bus with sequence number 5479e2a6a0SMichal Simek * @bus: mii device structure 5579e2a6a0SMichal Simek * @seq: sequence number 5679e2a6a0SMichal Simek * 5779e2a6a0SMichal Simek * Return: 0 if success, negative value if error 5879e2a6a0SMichal Simek */ 5979e2a6a0SMichal Simek int mdio_register_seq(struct mii_dev *bus, int seq); 60cb6baca7SBin Meng int mdio_unregister(struct mii_dev *bus); 615f184715SAndy Fleming void mdio_list_devices(void); 625f184715SAndy Fleming 634ba31ab3SLuigi 'Comio' Mantellini #ifdef CONFIG_BITBANGMII 6463ff004cSMarian Balakowicz 654ba31ab3SLuigi 'Comio' Mantellini #define BB_MII_DEVNAME "bb_miiphy" 664ba31ab3SLuigi 'Comio' Mantellini 674ba31ab3SLuigi 'Comio' Mantellini struct bb_miiphy_bus { 68f6add132SMike Frysinger char name[16]; 694ba31ab3SLuigi 'Comio' Mantellini int (*init)(struct bb_miiphy_bus *bus); 704ba31ab3SLuigi 'Comio' Mantellini int (*mdio_active)(struct bb_miiphy_bus *bus); 714ba31ab3SLuigi 'Comio' Mantellini int (*mdio_tristate)(struct bb_miiphy_bus *bus); 724ba31ab3SLuigi 'Comio' Mantellini int (*set_mdio)(struct bb_miiphy_bus *bus, int v); 734ba31ab3SLuigi 'Comio' Mantellini int (*get_mdio)(struct bb_miiphy_bus *bus, int *v); 744ba31ab3SLuigi 'Comio' Mantellini int (*set_mdc)(struct bb_miiphy_bus *bus, int v); 754ba31ab3SLuigi 'Comio' Mantellini int (*delay)(struct bb_miiphy_bus *bus); 764ba31ab3SLuigi 'Comio' Mantellini #ifdef CONFIG_BITBANGMII_MULTI 774ba31ab3SLuigi 'Comio' Mantellini void *priv; 784ba31ab3SLuigi 'Comio' Mantellini #endif 794ba31ab3SLuigi 'Comio' Mantellini }; 804ba31ab3SLuigi 'Comio' Mantellini 814ba31ab3SLuigi 'Comio' Mantellini extern struct bb_miiphy_bus bb_miiphy_buses[]; 824ba31ab3SLuigi 'Comio' Mantellini extern int bb_miiphy_buses_num; 834ba31ab3SLuigi 'Comio' Mantellini 844ba31ab3SLuigi 'Comio' Mantellini void bb_miiphy_init(void); 85dfcc496eSJoe Hershberger int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg); 86dfcc496eSJoe Hershberger int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, 87dfcc496eSJoe Hershberger u16 value); 884ba31ab3SLuigi 'Comio' Mantellini #endif 89214ec6bbSwdenk 90214ec6bbSwdenk /* phy seed setup */ 91214ec6bbSwdenk #define AUTO 99 92855a496fSwdenk #define _1000BASET 1000 93214ec6bbSwdenk #define _100BASET 100 94214ec6bbSwdenk #define _10BASET 10 95214ec6bbSwdenk #define HALF 22 96214ec6bbSwdenk #define FULL 44 97214ec6bbSwdenk 98214ec6bbSwdenk /* phy register offsets */ 998ef583a0SMike Frysinger #define MII_MIPSCR 0x11 100214ec6bbSwdenk 1018ef583a0SMike Frysinger /* MII_LPA */ 102b9711de1Swdenk #define PHY_ANLPAR_PSB_802_3 0x0001 103b9711de1Swdenk #define PHY_ANLPAR_PSB_802_9 0x0002 104b9711de1Swdenk 1058ef583a0SMike Frysinger /* MII_CTRL1000 masks */ 10671bc6e64SLarry Johnson #define PHY_1000BTCR_1000FD 0x0200 10771bc6e64SLarry Johnson #define PHY_1000BTCR_1000HD 0x0100 10871bc6e64SLarry Johnson 1098ef583a0SMike Frysinger /* MII_STAT1000 masks */ 110855a496fSwdenk #define PHY_1000BTSR_MSCF 0x8000 111855a496fSwdenk #define PHY_1000BTSR_MSCR 0x4000 112855a496fSwdenk #define PHY_1000BTSR_LRS 0x2000 113855a496fSwdenk #define PHY_1000BTSR_RRS 0x1000 114855a496fSwdenk #define PHY_1000BTSR_1000FD 0x0800 115855a496fSwdenk #define PHY_1000BTSR_1000HD 0x0400 116855a496fSwdenk 11771bc6e64SLarry Johnson /* phy EXSR */ 1188ef583a0SMike Frysinger #define ESTATUS_1000XF 0x8000 1198ef583a0SMike Frysinger #define ESTATUS_1000XH 0x4000 12071bc6e64SLarry Johnson 121214ec6bbSwdenk #endif 122