1 /* 2 * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de> 3 * 4 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 * 24 */ 25 26 #ifndef __ASM_ARCH_MC9SDZ60_H 27 #define __ASM_ARCH_MC9SDZ60_H 28 29 /** 30 * Register addresses for the MC9SDZ60 31 * 32 * @note: these match those in the kernel drivers/mxc/mcu_pmic/mc9s08dz60.h 33 * but not include/linux/mfd/mc9s08dz60/pmic.h 34 * 35 */ 36 enum mc9sdz60_reg { 37 MC9SDZ60_REG_VERSION = 0x00, 38 /* reserved 0x01 */ 39 MC9SDZ60_REG_SECS = 0x02, 40 MC9SDZ60_REG_MINS = 0x03, 41 MC9SDZ60_REG_HRS = 0x04, 42 MC9SDZ60_REG_DAY = 0x05, 43 MC9SDZ60_REG_DATE = 0x06, 44 MC9SDZ60_REG_MONTH = 0x07, 45 MC9SDZ60_REG_YEAR = 0x08, 46 MC9SDZ60_REG_ALARM_SECS = 0x09, 47 MC9SDZ60_REG_ALARM_MINS = 0x0a, 48 MC9SDZ60_REG_ALARM_HRS = 0x0b, 49 /* reserved 0x0c */ 50 /* reserved 0x0d */ 51 MC9SDZ60_REG_TS_CONTROL = 0x0e, 52 MC9SDZ60_REG_X_LOW = 0x0f, 53 MC9SDZ60_REG_Y_LOW = 0x10, 54 MC9SDZ60_REG_XY_HIGH = 0x11, 55 MC9SDZ60_REG_X_LEFT_LOW = 0x12, 56 MC9SDZ60_REG_X_LEFT_HIGH = 0x13, 57 MC9SDZ60_REG_X_RIGHT = 0x14, 58 MC9SDZ60_REG_Y_TOP_LOW = 0x15, 59 MC9SDZ60_REG_Y_TOP_HIGH = 0x16, 60 MC9SDZ60_REG_Y_BOTTOM = 0x17, 61 /* reserved 0x18 */ 62 /* reserved 0x19 */ 63 MC9SDZ60_REG_RESET_1 = 0x1a, 64 MC9SDZ60_REG_RESET_2 = 0x1b, 65 MC9SDZ60_REG_POWER_CTL = 0x1c, 66 MC9SDZ60_REG_DELAY_CONFIG = 0x1d, 67 /* reserved 0x1e */ 68 /* reserved 0x1f */ 69 MC9SDZ60_REG_GPIO_1 = 0x20, 70 MC9SDZ60_REG_GPIO_2 = 0x21, 71 MC9SDZ60_REG_KPD_1 = 0x22, 72 MC9SDZ60_REG_KPD_2 = 0x23, 73 MC9SDZ60_REG_KPD_CONTROL = 0x24, 74 MC9SDZ60_REG_INT_ENABLE_1 = 0x25, 75 MC9SDZ60_REG_INT_ENABLE_2 = 0x26, 76 MC9SDZ60_REG_INT_FLAG_1 = 0x27, 77 MC9SDZ60_REG_INT_FLAG_2 = 0x28, 78 MC9SDZ60_REG_DES_FLAG = 0x29, 79 }; 80 81 extern u8 mc9sdz60_reg_read(enum mc9sdz60_reg reg); 82 extern void mc9sdz60_reg_write(enum mc9sdz60_reg reg, u8 val); 83 84 #endif /* __ASM_ARCH_MC9SDZ60_H */ 85