1 /* 2 * linux/include/linux/mtd/nand.h 3 * 4 * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> 5 * Steven J. Hill <sjhill@cotw.com> 6 * Thomas Gleixner <gleixner@autronix.de> 7 * 8 * $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * Info: 15 * Contains standard defines and IDs for NAND flash devices 16 * 17 * Changelog: 18 * 01-31-2000 DMW Created 19 * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers 20 * so it can be used by other NAND flash device 21 * drivers. I also changed the copyright since none 22 * of the original contents of this file are specific 23 * to DoC devices. David can whack me with a baseball 24 * bat later if I did something naughty. 25 * 10-11-2000 SJH Added private NAND flash structure for driver 26 * 10-24-2000 SJH Added prototype for 'nand_scan' function 27 * 10-29-2001 TG changed nand_chip structure to support 28 * hardwarespecific function for accessing control lines 29 * 02-21-2002 TG added support for different read/write adress and 30 * ready/busy line access function 31 * 02-26-2002 TG added chip_delay to nand_chip structure to optimize 32 * command delay times for different chips 33 * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate 34 * defines in jffs2/wbuf.c 35 */ 36 #ifndef __LINUX_MTD_NAND_H 37 #define __LINUX_MTD_NAND_H 38 39 /* 40 * Standard NAND flash commands 41 */ 42 #define NAND_CMD_READ0 0 43 #define NAND_CMD_READ1 1 44 #define NAND_CMD_PAGEPROG 0x10 45 #define NAND_CMD_READOOB 0x50 46 #define NAND_CMD_ERASE1 0x60 47 #define NAND_CMD_STATUS 0x70 48 #define NAND_CMD_SEQIN 0x80 49 #define NAND_CMD_READID 0x90 50 #define NAND_CMD_ERASE2 0xd0 51 #define NAND_CMD_RESET 0xff 52 53 /* 54 * Enumeration for NAND flash chip state 55 */ 56 typedef enum { 57 FL_READY, 58 FL_READING, 59 FL_WRITING, 60 FL_ERASING, 61 FL_SYNCING 62 } nand_state_t; 63 64 65 /* 66 * NAND Private Flash Chip Data 67 * 68 * Structure overview: 69 * 70 * IO_ADDR - address to access the 8 I/O lines of the flash device 71 * 72 * hwcontrol - hardwarespecific function for accesing control-lines 73 * 74 * dev_ready - hardwarespecific function for accesing device ready/busy line 75 * 76 * chip_lock - spinlock used to protect access to this structure 77 * 78 * wq - wait queue to sleep on if a NAND operation is in progress 79 * 80 * state - give the current state of the NAND device 81 * 82 * page_shift - number of address bits in a page (column address bits) 83 * 84 * data_buf - data buffer passed to/from MTD user modules 85 * 86 * data_cache - data cache for redundant page access and shadow for 87 * ECC failure 88 * 89 * ecc_code_buf - used only for holding calculated or read ECCs for 90 * a page read or written when ECC is in use 91 * 92 * reserved - padding to make structure fall on word boundary if 93 * when ECC is in use 94 */ 95 struct Nand { 96 char floor, chip; 97 unsigned long curadr; 98 unsigned char curmode; 99 /* Also some erase/write/pipeline info when we get that far */ 100 }; 101 102 struct nand_chip { 103 int page_shift; 104 u_char *data_buf; 105 u_char *data_cache; 106 int cache_page; 107 u_char ecc_code_buf[6]; 108 u_char reserved[2]; 109 char ChipID; /* Type of DiskOnChip */ 110 struct Nand *chips; 111 int chipshift; 112 char* chips_name; 113 unsigned long erasesize; 114 unsigned long mfr; /* Flash IDs - only one type of flash per device */ 115 unsigned long id; 116 char* name; 117 int numchips; 118 char page256; 119 char pageadrlen; 120 unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */ 121 unsigned long totlen; 122 uint oobblock; /* Size of OOB blocks (e.g. 512) */ 123 uint oobsize; /* Amount of OOB data per block (e.g. 16) */ 124 uint eccsize; 125 }; 126 127 /* 128 * NAND Flash Manufacturer ID Codes 129 */ 130 #define NAND_MFR_TOSHIBA 0x98 131 #define NAND_MFR_SAMSUNG 0xec 132 133 /* 134 * NAND Flash Device ID Structure 135 * 136 * Structure overview: 137 * 138 * name - Complete name of device 139 * 140 * manufacture_id - manufacturer ID code of device. 141 * 142 * model_id - model ID code of device. 143 * 144 * chipshift - total number of address bits for the device which 145 * is used to calculate address offsets and the total 146 * number of bytes the device is capable of. 147 * 148 * page256 - denotes if flash device has 256 byte pages or not. 149 * 150 * pageadrlen - number of bytes minus one needed to hold the 151 * complete address into the flash array. Keep in 152 * mind that when a read or write is done to a 153 * specific address, the address is input serially 154 * 8 bits at a time. This structure member is used 155 * by the read/write routines as a loop index for 156 * shifting the address out 8 bits at a time. 157 * 158 * erasesize - size of an erase block in the flash device. 159 */ 160 struct nand_flash_dev { 161 char * name; 162 int manufacture_id; 163 int model_id; 164 int chipshift; 165 char page256; 166 char pageadrlen; 167 unsigned long erasesize; 168 }; 169 170 /* 171 * Constants for oob configuration 172 */ 173 #define NAND_NOOB_ECCPOS0 0 174 #define NAND_NOOB_ECCPOS1 1 175 #define NAND_NOOB_ECCPOS2 2 176 #define NAND_NOOB_ECCPOS3 3 177 #define NAND_NOOB_ECCPOS4 6 178 #define NAND_NOOB_ECCPOS5 7 179 #define NAND_NOOB_BADBPOS -1 180 #define NAND_NOOB_ECCVPOS -1 181 182 #define NAND_JFFS2_OOB_ECCPOS0 0 183 #define NAND_JFFS2_OOB_ECCPOS1 1 184 #define NAND_JFFS2_OOB_ECCPOS2 2 185 #define NAND_JFFS2_OOB_ECCPOS3 3 186 #define NAND_JFFS2_OOB_ECCPOS4 6 187 #define NAND_JFFS2_OOB_ECCPOS5 7 188 #define NAND_JFFS2_OOB_BADBPOS 5 189 #define NAND_JFFS2_OOB_ECCVPOS 4 190 191 #define NAND_JFFS2_OOB8_FSDAPOS 6 192 #define NAND_JFFS2_OOB16_FSDAPOS 8 193 #define NAND_JFFS2_OOB8_FSDALEN 2 194 #define NAND_JFFS2_OOB16_FSDALEN 8 195 196 unsigned long nand_probe(unsigned long physadr); 197 198 #endif /* __LINUX_MTD_NAND_H */ 199