xref: /openbmc/u-boot/include/libata.h (revision e8f80a5a)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
4  * Copyright 2003-2004 Jeff Garzik
5  * Copyright (C) 2008 Freescale Semiconductor, Inc.
6  *		Dave Liu <daveliu@freescale.com>
7  *		port from libata of linux kernel
8  */
9 
10 #ifndef __LIBATA_H__
11 #define __LIBATA_H__
12 
13 #include <common.h>
14 
15 enum {
16 	/* various global constants */
17 	ATA_MAX_DEVICES		= 2,	/* per bus/port */
18 	ATA_MAX_PRD		= 256,	/* we could make these 256/256 */
19 	ATA_SECT_SIZE		= 512,
20 	ATA_MAX_SECTORS_128	= 128,
21 	ATA_MAX_SECTORS		= 256,
22 	ATA_MAX_SECTORS_LBA48	= 65535,
23 	ATA_MAX_SECTORS_TAPE	= 65535,
24 
25 	ATA_ID_WORDS		= 256,
26 	ATA_ID_SERNO		= 10,
27 	ATA_ID_FW_REV		= 23,
28 	ATA_ID_PROD		= 27,
29 	ATA_ID_OLD_PIO_MODES	= 51,
30 	ATA_ID_FIELD_VALID	= 53,
31 	ATA_ID_LBA_SECTORS	= 60,
32 	ATA_ID_MWDMA_MODES	= 63,
33 	ATA_ID_PIO_MODES	= 64,
34 	ATA_ID_EIDE_DMA_MIN	= 65,
35 	ATA_ID_EIDE_PIO		= 67,
36 	ATA_ID_EIDE_PIO_IORDY	= 68,
37 	ATA_ID_PIO4		= (1 << 1),
38 	ATA_ID_QUEUE_DEPTH	= 75,
39 	ATA_ID_SATA_CAP		= 76,
40 	ATA_ID_SATA_FEATURES	= 78,
41 	ATA_ID_SATA_FEATURES_EN	= 79,
42 	ATA_ID_MAJOR_VER	= 80,
43 	ATA_ID_MINOR_VER	= 81,
44 	ATA_ID_UDMA_MODES	= 88,
45 	ATA_ID_LBA48_SECTORS	= 100,
46 
47 	ATA_ID_SERNO_LEN	= 20,
48 	ATA_ID_FW_REV_LEN	= 8,
49 	ATA_ID_PROD_LEN		= 40,
50 
51 	ATA_PCI_CTL_OFS		= 2,
52 
53 	ATA_PIO0		= (1 << 0),
54 	ATA_PIO1		= ATA_PIO0 | (1 << 1),
55 	ATA_PIO2		= ATA_PIO1 | (1 << 2),
56 	ATA_PIO3		= ATA_PIO2 | (1 << 3),
57 	ATA_PIO4		= ATA_PIO3 | (1 << 4),
58 	ATA_PIO5		= ATA_PIO4 | (1 << 5),
59 	ATA_PIO6		= ATA_PIO5 | (1 << 6),
60 
61 	ATA_SWDMA0		= (1 << 0),
62 	ATA_SWDMA1		= ATA_SWDMA0 | (1 << 1),
63 	ATA_SWDMA2		= ATA_SWDMA1 | (1 << 2),
64 
65 	ATA_SWDMA2_ONLY		= (1 << 2),
66 
67 	ATA_MWDMA0		= (1 << 0),
68 	ATA_MWDMA1		= ATA_MWDMA0 | (1 << 1),
69 	ATA_MWDMA2		= ATA_MWDMA1 | (1 << 2),
70 
71 	ATA_MWDMA12_ONLY	= (1 << 1) | (1 << 2),
72 	ATA_MWDMA2_ONLY		= (1 << 2),
73 
74 	ATA_UDMA0		= (1 << 0),
75 	ATA_UDMA1		= ATA_UDMA0 | (1 << 1),
76 	ATA_UDMA2		= ATA_UDMA1 | (1 << 2),
77 	ATA_UDMA3		= ATA_UDMA2 | (1 << 3),
78 	ATA_UDMA4		= ATA_UDMA3 | (1 << 4),
79 	ATA_UDMA5		= ATA_UDMA4 | (1 << 5),
80 	ATA_UDMA6		= ATA_UDMA5 | (1 << 6),
81 	ATA_UDMA7		= ATA_UDMA6 | (1 << 7),
82 	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?).  */
83 
84 	ATA_UDMA_MASK_40C	= ATA_UDMA2,	/* udma0-2 */
85 
86 	/* DMA-related */
87 	ATA_PRD_SZ		= 8,
88 	ATA_PRD_TBL_SZ		= (ATA_MAX_PRD * ATA_PRD_SZ),
89 	ATA_PRD_EOT		= (1 << 31),	/* end-of-table flag */
90 
91 	ATA_DMA_TABLE_OFS	= 4,
92 	ATA_DMA_STATUS		= 2,
93 	ATA_DMA_CMD		= 0,
94 	ATA_DMA_WR		= (1 << 3),
95 	ATA_DMA_START		= (1 << 0),
96 	ATA_DMA_INTR		= (1 << 2),
97 	ATA_DMA_ERR		= (1 << 1),
98 	ATA_DMA_ACTIVE		= (1 << 0),
99 
100 	/* bits in ATA command block registers */
101 	ATA_HOB			= (1 << 7),	/* LBA48 selector */
102 	ATA_NIEN		= (1 << 1),	/* disable-irq flag */
103 	ATA_LBA			= (1 << 6),	/* LBA28 selector */
104 	ATA_DEV1		= (1 << 4),	/* Select Device 1 (slave) */
105 	ATA_DEVICE_OBS		= (1 << 7) | (1 << 5), /* obs bits in dev reg */
106 	ATA_DEVCTL_OBS		= (1 << 3),	/* obsolete bit in devctl reg */
107 	ATA_BUSY		= (1 << 7),	/* BSY status bit */
108 	ATA_DRDY		= (1 << 6),	/* device ready */
109 	ATA_DF			= (1 << 5),	/* device fault */
110 	ATA_DRQ			= (1 << 3),	/* data request i/o */
111 	ATA_ERR			= (1 << 0),	/* have an error */
112 	ATA_SRST		= (1 << 2),	/* software reset */
113 	ATA_ICRC		= (1 << 7),	/* interface CRC error */
114 	ATA_UNC			= (1 << 6),	/* uncorrectable media error */
115 	ATA_IDNF		= (1 << 4),	/* ID not found */
116 	ATA_ABORTED		= (1 << 2),	/* command aborted */
117 
118 	/* ATA command block registers */
119 	ATA_REG_DATA		= 0x00,
120 	ATA_REG_ERR		= 0x01,
121 	ATA_REG_NSECT		= 0x02,
122 	ATA_REG_LBAL		= 0x03,
123 	ATA_REG_LBAM		= 0x04,
124 	ATA_REG_LBAH		= 0x05,
125 	ATA_REG_DEVICE		= 0x06,
126 	ATA_REG_STATUS		= 0x07,
127 
128 	ATA_REG_FEATURE		= ATA_REG_ERR, /* and their aliases */
129 	ATA_REG_CMD		= ATA_REG_STATUS,
130 	ATA_REG_BYTEL		= ATA_REG_LBAM,
131 	ATA_REG_BYTEH		= ATA_REG_LBAH,
132 	ATA_REG_DEVSEL		= ATA_REG_DEVICE,
133 	ATA_REG_IRQ		= ATA_REG_NSECT,
134 
135 	/* ATA device commands */
136 	ATA_CMD_DEV_RESET	= 0x08, /* ATAPI device reset */
137 	ATA_CMD_CHK_POWER	= 0xE5, /* check power mode */
138 	ATA_CMD_STANDBY		= 0xE2, /* place in standby power mode */
139 	ATA_CMD_IDLE		= 0xE3, /* place in idle power mode */
140 	ATA_CMD_EDD		= 0x90,	/* execute device diagnostic */
141 	ATA_CMD_FLUSH		= 0xE7,
142 	ATA_CMD_FLUSH_EXT	= 0xEA,
143 	ATA_CMD_ID_ATA		= 0xEC,
144 	ATA_CMD_ID_ATAPI	= 0xA1,
145 	ATA_CMD_READ		= 0xC8,
146 	ATA_CMD_READ_EXT	= 0x25,
147 	ATA_CMD_WRITE		= 0xCA,
148 	ATA_CMD_WRITE_EXT	= 0x35,
149 	ATA_CMD_WRITE_FUA_EXT	= 0x3D,
150 	ATA_CMD_FPDMA_READ	= 0x60,
151 	ATA_CMD_FPDMA_WRITE	= 0x61,
152 	ATA_CMD_PIO_READ	= 0x20,
153 	ATA_CMD_PIO_READ_EXT	= 0x24,
154 	ATA_CMD_PIO_WRITE	= 0x30,
155 	ATA_CMD_PIO_WRITE_EXT	= 0x34,
156 	ATA_CMD_READ_MULTI	= 0xC4,
157 	ATA_CMD_READ_MULTI_EXT	= 0x29,
158 	ATA_CMD_WRITE_MULTI	= 0xC5,
159 	ATA_CMD_WRITE_MULTI_EXT	= 0x39,
160 	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
161 	ATA_CMD_SET_FEATURES	= 0xEF,
162 	ATA_CMD_SET_MULTI	= 0xC6,
163 	ATA_CMD_PACKET		= 0xA0,
164 	ATA_CMD_VERIFY		= 0x40,
165 	ATA_CMD_VERIFY_EXT	= 0x42,
166 	ATA_CMD_STANDBYNOW1	= 0xE0,
167 	ATA_CMD_IDLEIMMEDIATE	= 0xE1,
168 	ATA_CMD_SLEEP		= 0xE6,
169 	ATA_CMD_INIT_DEV_PARAMS	= 0x91,
170 	ATA_CMD_READ_NATIVE_MAX	= 0xF8,
171 	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
172 	ATA_CMD_SET_MAX		= 0xF9,
173 	ATA_CMD_SET_MAX_EXT	= 0x37,
174 	ATA_CMD_READ_LOG_EXT	= 0x2f,
175 	ATA_CMD_PMP_READ	= 0xE4,
176 	ATA_CMD_PMP_WRITE	= 0xE8,
177 	ATA_CMD_CONF_OVERLAY	= 0xB1,
178 	ATA_CMD_SEC_FREEZE_LOCK	= 0xF5,
179 
180 	/* READ_LOG_EXT pages */
181 	ATA_LOG_SATA_NCQ	= 0x10,
182 
183 	/* READ/WRITE LONG (obsolete) */
184 	ATA_CMD_READ_LONG	= 0x22,
185 	ATA_CMD_READ_LONG_ONCE	= 0x23,
186 	ATA_CMD_WRITE_LONG	= 0x32,
187 	ATA_CMD_WRITE_LONG_ONCE	= 0x33,
188 
189 	/* SETFEATURES stuff */
190 	SETFEATURES_XFER	= 0x03,
191 	XFER_UDMA_7		= 0x47,
192 	XFER_UDMA_6		= 0x46,
193 	XFER_UDMA_5		= 0x45,
194 	XFER_UDMA_4		= 0x44,
195 	XFER_UDMA_3		= 0x43,
196 	XFER_UDMA_2		= 0x42,
197 	XFER_UDMA_1		= 0x41,
198 	XFER_UDMA_0		= 0x40,
199 	XFER_MW_DMA_4		= 0x24,	/* CFA only */
200 	XFER_MW_DMA_3		= 0x23,	/* CFA only */
201 	XFER_MW_DMA_2		= 0x22,
202 	XFER_MW_DMA_1		= 0x21,
203 	XFER_MW_DMA_0		= 0x20,
204 	XFER_SW_DMA_2		= 0x12,
205 	XFER_SW_DMA_1		= 0x11,
206 	XFER_SW_DMA_0		= 0x10,
207 	XFER_PIO_6		= 0x0E,	/* CFA only */
208 	XFER_PIO_5		= 0x0D,	/* CFA only */
209 	XFER_PIO_4		= 0x0C,
210 	XFER_PIO_3		= 0x0B,
211 	XFER_PIO_2		= 0x0A,
212 	XFER_PIO_1		= 0x09,
213 	XFER_PIO_0		= 0x08,
214 	XFER_PIO_SLOW		= 0x00,
215 
216 	SETFEATURES_WC_ON	= 0x02, /* Enable write cache */
217 	SETFEATURES_WC_OFF	= 0x82, /* Disable write cache */
218 
219 	SETFEATURES_SPINUP	= 0x07, /* Spin-up drive */
220 
221 	SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
222 	SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
223 
224 	/* SETFEATURE Sector counts for SATA features */
225 	SATA_AN			= 0x05,  /* Asynchronous Notification */
226 	SATA_DIPM		= 0x03,  /* Device Initiated Power Management */
227 
228 	/* feature values for SET_MAX */
229 	ATA_SET_MAX_ADDR	= 0x00,
230 	ATA_SET_MAX_PASSWD	= 0x01,
231 	ATA_SET_MAX_LOCK	= 0x02,
232 	ATA_SET_MAX_UNLOCK	= 0x03,
233 	ATA_SET_MAX_FREEZE_LOCK	= 0x04,
234 
235 	/* feature values for DEVICE CONFIGURATION OVERLAY */
236 	ATA_DCO_RESTORE		= 0xC0,
237 	ATA_DCO_FREEZE_LOCK	= 0xC1,
238 	ATA_DCO_IDENTIFY	= 0xC2,
239 	ATA_DCO_SET		= 0xC3,
240 
241 	/* ATAPI stuff */
242 	ATAPI_PKT_DMA		= (1 << 0),
243 	ATAPI_DMADIR		= (1 << 2),	/* ATAPI data dir:
244 						   0=to device, 1=to host */
245 	ATAPI_CDB_LEN		= 16,
246 
247 	/* PMP stuff */
248 	SATA_PMP_MAX_PORTS	= 15,
249 	SATA_PMP_CTRL_PORT	= 15,
250 
251 	SATA_PMP_GSCR_DWORDS	= 128,
252 	SATA_PMP_GSCR_PROD_ID	= 0,
253 	SATA_PMP_GSCR_REV	= 1,
254 	SATA_PMP_GSCR_PORT_INFO	= 2,
255 	SATA_PMP_GSCR_ERROR	= 32,
256 	SATA_PMP_GSCR_ERROR_EN	= 33,
257 	SATA_PMP_GSCR_FEAT	= 64,
258 	SATA_PMP_GSCR_FEAT_EN	= 96,
259 
260 	SATA_PMP_PSCR_STATUS	= 0,
261 	SATA_PMP_PSCR_ERROR	= 1,
262 	SATA_PMP_PSCR_CONTROL	= 2,
263 
264 	SATA_PMP_FEAT_BIST	= (1 << 0),
265 	SATA_PMP_FEAT_PMREQ	= (1 << 1),
266 	SATA_PMP_FEAT_DYNSSC	= (1 << 2),
267 	SATA_PMP_FEAT_NOTIFY	= (1 << 3),
268 
269 	/* cable types */
270 	ATA_CBL_NONE		= 0,
271 	ATA_CBL_PATA40		= 1,
272 	ATA_CBL_PATA80		= 2,
273 	ATA_CBL_PATA40_SHORT	= 3,	/* 40 wire cable to high UDMA spec */
274 	ATA_CBL_PATA_UNK	= 4,	/* don't know, maybe 80c? */
275 	ATA_CBL_PATA_IGN	= 5,	/* don't know, ignore cable handling */
276 	ATA_CBL_SATA		= 6,
277 
278 	/* SATA Status and Control Registers */
279 	SCR_STATUS		= 0,
280 	SCR_ERROR		= 1,
281 	SCR_CONTROL		= 2,
282 	SCR_ACTIVE		= 3,
283 	SCR_NOTIFICATION	= 4,
284 
285 	/* SError bits */
286 	SERR_DATA_RECOVERED	= (1 << 0), /* recovered data error */
287 	SERR_COMM_RECOVERED	= (1 << 1), /* recovered comm failure */
288 	SERR_DATA		= (1 << 8), /* unrecovered data error */
289 	SERR_PERSISTENT		= (1 << 9), /* persistent data/comm error */
290 	SERR_PROTOCOL		= (1 << 10), /* protocol violation */
291 	SERR_INTERNAL		= (1 << 11), /* host internal error */
292 	SERR_PHYRDY_CHG		= (1 << 16), /* PHY RDY changed */
293 	SERR_PHY_INT_ERR	= (1 << 17), /* PHY internal error */
294 	SERR_COMM_WAKE		= (1 << 18), /* Comm wake */
295 	SERR_10B_8B_ERR		= (1 << 19), /* 10b to 8b decode error */
296 	SERR_DISPARITY		= (1 << 20), /* Disparity */
297 	SERR_CRC		= (1 << 21), /* CRC error */
298 	SERR_HANDSHAKE		= (1 << 22), /* Handshake error */
299 	SERR_LINK_SEQ_ERR	= (1 << 23), /* Link sequence error */
300 	SERR_TRANS_ST_ERROR	= (1 << 24), /* Transport state trans. error */
301 	SERR_UNRECOG_FIS	= (1 << 25), /* Unrecognized FIS */
302 	SERR_DEV_XCHG		= (1 << 26), /* device exchanged */
303 
304 	/* struct ata_taskfile flags */
305 	ATA_TFLAG_LBA48		= (1 << 0), /* enable 48-bit LBA and "HOB" */
306 	ATA_TFLAG_ISADDR	= (1 << 1), /* enable r/w to nsect/lba regs */
307 	ATA_TFLAG_DEVICE	= (1 << 2), /* enable r/w to device reg */
308 	ATA_TFLAG_WRITE		= (1 << 3), /* data dir: host->dev==1 (write) */
309 	ATA_TFLAG_LBA		= (1 << 4), /* enable LBA */
310 	ATA_TFLAG_FUA		= (1 << 5), /* enable FUA */
311 	ATA_TFLAG_POLLING	= (1 << 6), /* set nIEN to 1 and use polling */
312 
313 	/* protocol flags */
314 	ATA_PROT_FLAG_PIO	= (1 << 0), /* is PIO */
315 	ATA_PROT_FLAG_DMA	= (1 << 1), /* is DMA */
316 	ATA_PROT_FLAG_DATA	= ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA,
317 	ATA_PROT_FLAG_NCQ	= (1 << 2), /* is NCQ */
318 	ATA_PROT_FLAG_ATAPI	= (1 << 3), /* is ATAPI */
319 };
320 
321 enum ata_tf_protocols {
322 	/* ATA taskfile protocols */
323 	ATA_PROT_UNKNOWN,	/* unknown/invalid */
324 	ATA_PROT_NODATA,	/* no data */
325 	ATA_PROT_PIO,		/* PIO data xfer */
326 	ATA_PROT_DMA,		/* DMA */
327 	ATA_PROT_NCQ,		/* NCQ */
328 	ATAPI_PROT_NODATA,	/* packet command, no data */
329 	ATAPI_PROT_PIO,		/* packet command, PIO data xfer*/
330 	ATAPI_PROT_DMA,		/* packet command with special DMA sauce */
331 };
332 
333 enum ata_ioctls {
334 	ATA_IOC_GET_IO32	= 0x309,
335 	ATA_IOC_SET_IO32	= 0x324,
336 };
337 
338 enum ata_dev_typed {
339 	ATA_DEV_ATA,		/* ATA device */
340 	ATA_DEV_ATAPI,		/* ATAPI device */
341 	ATA_DEV_PMP,		/* Port Multiplier Port */
342 	ATA_DEV_UNKNOWN,	/* unknown */
343 };
344 
345 struct ata_taskfile {
346 	unsigned long		flags;		/* ATA_TFLAG_xxx */
347 	u8			protocol;	/* ATA_PROT_xxx */
348 
349 	u8			ctl;		/* control reg */
350 
351 	u8			hob_feature;	/* additional data */
352 	u8			hob_nsect;	/* to support LBA48 */
353 	u8			hob_lbal;
354 	u8			hob_lbam;
355 	u8			hob_lbah;
356 
357 	u8			feature;
358 	u8			nsect;
359 	u8			lbal;
360 	u8			lbam;
361 	u8			lbah;
362 
363 	u8			device;
364 
365 	u8			command;	/* IO operation */
366 };
367 
368 /*
369  * protocol tests
370  */
ata_prot_flags(u8 prot)371 static inline unsigned int ata_prot_flags(u8 prot)
372 {
373 	switch (prot) {
374 	case ATA_PROT_NODATA:
375 		return 0;
376 	case ATA_PROT_PIO:
377 		return ATA_PROT_FLAG_PIO;
378 	case ATA_PROT_DMA:
379 		return ATA_PROT_FLAG_DMA;
380 	case ATA_PROT_NCQ:
381 		return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ;
382 	case ATAPI_PROT_NODATA:
383 		return ATA_PROT_FLAG_ATAPI;
384 	case ATAPI_PROT_PIO:
385 		return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO;
386 	case ATAPI_PROT_DMA:
387 		return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA;
388 	}
389 	return 0;
390 }
391 
ata_is_atapi(u8 prot)392 static inline int ata_is_atapi(u8 prot)
393 {
394 	return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI;
395 }
396 
ata_is_nodata(u8 prot)397 static inline int ata_is_nodata(u8 prot)
398 {
399 	return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA);
400 }
401 
ata_is_pio(u8 prot)402 static inline int ata_is_pio(u8 prot)
403 {
404 	return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO;
405 }
406 
ata_is_dma(u8 prot)407 static inline int ata_is_dma(u8 prot)
408 {
409 	return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA;
410 }
411 
ata_is_ncq(u8 prot)412 static inline int ata_is_ncq(u8 prot)
413 {
414 	return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ;
415 }
416 
ata_is_data(u8 prot)417 static inline int ata_is_data(u8 prot)
418 {
419 	return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA;
420 }
421 
422 /*
423  * id tests
424  */
425 #define ata_id_is_ata(id)		(((id)[0] & (1 << 15)) == 0)
426 #define ata_id_has_lba(id)		((id)[49] & (1 << 9))
427 #define ata_id_has_dma(id)		((id)[49] & (1 << 8))
428 #define ata_id_has_ncq(id)		((id)[76] & (1 << 8))
429 #define ata_id_queue_depth(id)		(((id)[75] & 0x1f) + 1)
430 #define ata_id_removeable(id)		((id)[0] & (1 << 7))
431 #define ata_id_iordy_disable(id)	((id)[49] & (1 << 10))
432 #define ata_id_has_iordy(id)		((id)[49] & (1 << 11))
433 
434 #define ata_id_u32(id,n)	\
435 	(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
436 #define ata_id_u64(id,n)	\
437 	( ((u64) (id)[(n) + 3] << 48) | \
438 	  ((u64) (id)[(n) + 2] << 32) | \
439 	  ((u64) (id)[(n) + 1] << 16) | \
440 	  ((u64) (id)[(n) + 0]) )
441 
442 #define ata_id_cdb_intr(id)		(((id)[0] & 0x60) == 0x20)
443 
ata_id_has_fua(const u16 * id)444 static inline int ata_id_has_fua(const u16 *id)
445 {
446 	if ((id[84] & 0xC000) != 0x4000)
447 		return 0;
448 	return id[84] & (1 << 6);
449 }
450 
ata_id_has_flush(const u16 * id)451 static inline int ata_id_has_flush(const u16 *id)
452 {
453 	if ((id[83] & 0xC000) != 0x4000)
454 		return 0;
455 	return id[83] & (1 << 12);
456 }
457 
ata_id_has_flush_ext(const u16 * id)458 static inline int ata_id_has_flush_ext(const u16 *id)
459 {
460 	if ((id[83] & 0xC000) != 0x4000)
461 		return 0;
462 	return id[83] & (1 << 13);
463 }
464 
ata_id_has_lba48(const u16 * id)465 static inline int ata_id_has_lba48(const u16 *id)
466 {
467 	if ((id[83] & 0xC000) != 0x4000)
468 		return 0;
469 	if (!ata_id_u64(id, 100))
470 		return 0;
471 	return id[83] & (1 << 10);
472 }
473 
ata_id_hpa_enabled(const u16 * id)474 static inline int ata_id_hpa_enabled(const u16 *id)
475 {
476 	/* Yes children, word 83 valid bits cover word 82 data */
477 	if ((id[83] & 0xC000) != 0x4000)
478 		return 0;
479 	/* And 87 covers 85-87 */
480 	if ((id[87] & 0xC000) != 0x4000)
481 		return 0;
482 	/* Check command sets enabled as well as supported */
483 	if ((id[85] & ( 1 << 10)) == 0)
484 		return 0;
485 	return id[82] & (1 << 10);
486 }
487 
ata_id_has_wcache(const u16 * id)488 static inline int ata_id_has_wcache(const u16 *id)
489 {
490 	/* Yes children, word 83 valid bits cover word 82 data */
491 	if ((id[83] & 0xC000) != 0x4000)
492 		return 0;
493 	return id[82] & (1 << 5);
494 }
495 
ata_id_has_pm(const u16 * id)496 static inline int ata_id_has_pm(const u16 *id)
497 {
498 	if ((id[83] & 0xC000) != 0x4000)
499 		return 0;
500 	return id[82] & (1 << 3);
501 }
502 
ata_id_rahead_enabled(const u16 * id)503 static inline int ata_id_rahead_enabled(const u16 *id)
504 {
505 	if ((id[87] & 0xC000) != 0x4000)
506 		return 0;
507 	return id[85] & (1 << 6);
508 }
509 
ata_id_wcache_enabled(const u16 * id)510 static inline int ata_id_wcache_enabled(const u16 *id)
511 {
512 	if ((id[87] & 0xC000) != 0x4000)
513 		return 0;
514 	return id[85] & (1 << 5);
515 }
516 
ata_id_major_version(const u16 * id)517 static inline unsigned int ata_id_major_version(const u16 *id)
518 {
519 	unsigned int mver;
520 
521 	if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
522 		return 0;
523 
524 	for (mver = 14; mver >= 1; mver--)
525 		if (id[ATA_ID_MAJOR_VER] & (1 << mver))
526 			break;
527 	return mver;
528 }
529 
ata_id_is_sata(const u16 * id)530 static inline int ata_id_is_sata(const u16 *id)
531 {
532 	return ata_id_major_version(id) >= 5 && id[93] == 0;
533 }
534 
ata_id_has_tpm(const u16 * id)535 static inline int ata_id_has_tpm(const u16 *id)
536 {
537 	/* The TPM bits are only valid on ATA8 */
538 	if (ata_id_major_version(id) < 8)
539 		return 0;
540 	if ((id[48] & 0xC000) != 0x4000)
541 		return 0;
542 	return id[48] & (1 << 0);
543 }
544 
ata_id_has_dword_io(const u16 * id)545 static inline int ata_id_has_dword_io(const u16 *id)
546 {
547 	/* ATA 8 reuses this flag for "trusted" computing */
548 	if (ata_id_major_version(id) > 7)
549 		return 0;
550 	if (id[48] & (1 << 0))
551 		return 1;
552 	return 0;
553 }
554 
ata_id_current_chs_valid(const u16 * id)555 static inline int ata_id_current_chs_valid(const u16 *id)
556 {
557 	/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
558 	   has not been issued to the device then the values of
559 	   id[54] to id[56] are vendor specific. */
560 	return (id[53] & 0x01) && /* Current translation valid */
561 		id[54] &&  /* cylinders in current translation */
562 		id[55] &&  /* heads in current translation */
563 		id[55] <= 16 &&
564 		id[56];    /* sectors in current translation */
565 }
566 
ata_id_is_cfa(const u16 * id)567 static inline int ata_id_is_cfa(const u16 *id)
568 {
569 	u16 v = id[0];
570 	if (v == 0x848A)	/* Standard CF */
571 		return 1;
572 	/* Could be CF hiding as standard ATA */
573 	if (ata_id_major_version(id) >= 3 &&  id[82] != 0xFFFF &&
574 			(id[82] & ( 1 << 2)))
575 		return 1;
576 	return 0;
577 }
578 
ata_drive_40wire(const u16 * dev_id)579 static inline int ata_drive_40wire(const u16 *dev_id)
580 {
581 	if (ata_id_is_sata(dev_id))
582 		return 0;	/* SATA */
583 	if ((dev_id[93] & 0xE000) == 0x6000)
584 		return 0;	/* 80 wire */
585 	return 1;
586 }
587 
ata_drive_40wire_relaxed(const u16 * dev_id)588 static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
589 {
590 	if ((dev_id[93] & 0x2000) == 0x2000)
591 		return 0;	/* 80 wire */
592 	return 1;
593 }
594 
atapi_cdb_len(const u16 * dev_id)595 static inline int atapi_cdb_len(const u16 *dev_id)
596 {
597 	u16 tmp = dev_id[0] & 0x3;
598 	switch (tmp) {
599 	case 0:		return 12;
600 	case 1:		return 16;
601 	default:	return -1;
602 	}
603 }
604 
atapi_command_packet_set(const u16 * dev_id)605 static inline int atapi_command_packet_set(const u16 *dev_id)
606 {
607 	return (dev_id[0] >> 8) & 0x1f;
608 }
609 
atapi_id_dmadir(const u16 * dev_id)610 static inline int atapi_id_dmadir(const u16 *dev_id)
611 {
612 	return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
613 }
614 
is_multi_taskfile(struct ata_taskfile * tf)615 static inline int is_multi_taskfile(struct ata_taskfile *tf)
616 {
617 	return (tf->command == ATA_CMD_READ_MULTI) ||
618 	       (tf->command == ATA_CMD_WRITE_MULTI) ||
619 	       (tf->command == ATA_CMD_READ_MULTI_EXT) ||
620 	       (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
621 	       (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
622 }
623 
ata_ok(u8 status)624 static inline int ata_ok(u8 status)
625 {
626 	return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
627 			== ATA_DRDY);
628 }
629 
lba_28_ok(u64 block,u32 n_block)630 static inline int lba_28_ok(u64 block, u32 n_block)
631 {
632 	/* check the ending block number */
633 	return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
634 }
635 
lba_48_ok(u64 block,u32 n_block)636 static inline int lba_48_ok(u64 block, u32 n_block)
637 {
638 	/* check the ending block number */
639 	return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
640 }
641 
642 #define sata_pmp_gscr_vendor(gscr)	((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
643 #define sata_pmp_gscr_devid(gscr)	((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
644 #define sata_pmp_gscr_rev(gscr)		(((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
645 #define sata_pmp_gscr_ports(gscr)	((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
646 
647 u64 ata_id_n_sectors(u16 *id);
648 u32 ata_dev_classify(u32 sig);
649 void ata_id_c_string(const u16 *id, unsigned char *s,
650 			 unsigned int ofs, unsigned int len);
651 void ata_dump_id(u16 *id);
652 void ata_swap_buf_le16(u16 *buf, unsigned int buf_words);
653 
654 #endif /* __LIBATA_H__ */
655