1 /* 2 * MPC823 and PXA LCD Controller 3 * 4 * Modeled after video interface by Paolo Scaffardi 5 * 6 * 7 * (C) Copyright 2001 8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 9 * 10 * See file CREDITS for list of people who contributed to this 11 * project. 12 * 13 * This program is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License as 15 * published by the Free Software Foundation; either version 2 of 16 * the License, or (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 26 * MA 02111-1307 USA 27 */ 28 29 #ifndef _LCD_H_ 30 #define _LCD_H_ 31 32 extern char lcd_is_enabled; 33 34 extern int lcd_line_length; 35 36 extern struct vidinfo panel_info; 37 38 void lcd_ctrl_init(void *lcdbase); 39 void lcd_enable(void); 40 41 /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */ 42 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue); 43 void lcd_initcolregs(void); 44 45 int lcd_getfgcolor(void); 46 47 /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */ 48 struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, 49 void **alloc_addr); 50 int bmp_display(ulong addr, int x, int y); 51 52 /** 53 * Set whether we need to flush the dcache when changing the LCD image. This 54 * defaults to off. 55 * 56 * @param flush non-zero to flush cache after update, 0 to skip 57 */ 58 void lcd_set_flush_dcache(int flush); 59 60 #if defined CONFIG_MPC823 61 /* 62 * LCD controller stucture for MPC823 CPU 63 */ 64 typedef struct vidinfo { 65 ushort vl_col; /* Number of columns (i.e. 640) */ 66 ushort vl_row; /* Number of rows (i.e. 480) */ 67 ushort vl_width; /* Width of display area in millimeters */ 68 ushort vl_height; /* Height of display area in millimeters */ 69 70 /* LCD configuration register */ 71 u_char vl_clkp; /* Clock polarity */ 72 u_char vl_oep; /* Output Enable polarity */ 73 u_char vl_hsp; /* Horizontal Sync polarity */ 74 u_char vl_vsp; /* Vertical Sync polarity */ 75 u_char vl_dp; /* Data polarity */ 76 u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */ 77 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */ 78 u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */ 79 u_char vl_clor; /* Color, 0 = mono, 1 = color */ 80 u_char vl_tft; /* 0 = passive, 1 = TFT */ 81 82 /* Horizontal control register. Timing from data sheet */ 83 ushort vl_wbl; /* Wait between lines */ 84 85 /* Vertical control register */ 86 u_char vl_vpw; /* Vertical sync pulse width */ 87 u_char vl_lcdac; /* LCD AC timing */ 88 u_char vl_wbf; /* Wait between frames */ 89 } vidinfo_t; 90 91 #elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \ 92 defined CONFIG_CPU_MONAHANS 93 /* 94 * PXA LCD DMA descriptor 95 */ 96 struct pxafb_dma_descriptor { 97 u_long fdadr; /* Frame descriptor address register */ 98 u_long fsadr; /* Frame source address register */ 99 u_long fidr; /* Frame ID register */ 100 u_long ldcmd; /* Command register */ 101 }; 102 103 /* 104 * PXA LCD info 105 */ 106 struct pxafb_info { 107 108 /* Misc registers */ 109 u_long reg_lccr3; 110 u_long reg_lccr2; 111 u_long reg_lccr1; 112 u_long reg_lccr0; 113 u_long fdadr0; 114 u_long fdadr1; 115 116 /* DMA descriptors */ 117 struct pxafb_dma_descriptor * dmadesc_fblow; 118 struct pxafb_dma_descriptor * dmadesc_fbhigh; 119 struct pxafb_dma_descriptor * dmadesc_palette; 120 121 u_long screen; /* physical address of frame buffer */ 122 u_long palette; /* physical address of palette memory */ 123 u_int palette_size; 124 }; 125 126 /* 127 * LCD controller stucture for PXA CPU 128 */ 129 typedef struct vidinfo { 130 ushort vl_col; /* Number of columns (i.e. 640) */ 131 ushort vl_row; /* Number of rows (i.e. 480) */ 132 ushort vl_width; /* Width of display area in millimeters */ 133 ushort vl_height; /* Height of display area in millimeters */ 134 135 /* LCD configuration register */ 136 u_char vl_clkp; /* Clock polarity */ 137 u_char vl_oep; /* Output Enable polarity */ 138 u_char vl_hsp; /* Horizontal Sync polarity */ 139 u_char vl_vsp; /* Vertical Sync polarity */ 140 u_char vl_dp; /* Data polarity */ 141 u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */ 142 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */ 143 u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */ 144 u_char vl_clor; /* Color, 0 = mono, 1 = color */ 145 u_char vl_tft; /* 0 = passive, 1 = TFT */ 146 147 /* Horizontal control register. Timing from data sheet */ 148 ushort vl_hpw; /* Horz sync pulse width */ 149 u_char vl_blw; /* Wait before of line */ 150 u_char vl_elw; /* Wait end of line */ 151 152 /* Vertical control register. */ 153 u_char vl_vpw; /* Vertical sync pulse width */ 154 u_char vl_bfw; /* Wait before of frame */ 155 u_char vl_efw; /* Wait end of frame */ 156 157 /* PXA LCD controller params */ 158 struct pxafb_info pxa; 159 } vidinfo_t; 160 161 #elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD) 162 163 typedef struct vidinfo { 164 ushort vl_col; /* Number of columns (i.e. 640) */ 165 ushort vl_row; /* Number of rows (i.e. 480) */ 166 u_long vl_clk; /* pixel clock in ps */ 167 168 /* LCD configuration register */ 169 u_long vl_sync; /* Horizontal / vertical sync */ 170 u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */ 171 u_long vl_tft; /* 0 = passive, 1 = TFT */ 172 u_long vl_cont_pol_low; /* contrast polarity is low */ 173 u_long vl_clk_pol; /* clock polarity */ 174 175 /* Horizontal control register. */ 176 u_long vl_hsync_len; /* Length of horizontal sync */ 177 u_long vl_left_margin; /* Time from sync to picture */ 178 u_long vl_right_margin; /* Time from picture to sync */ 179 180 /* Vertical control register. */ 181 u_long vl_vsync_len; /* Length of vertical sync */ 182 u_long vl_upper_margin; /* Time from sync to picture */ 183 u_long vl_lower_margin; /* Time from picture to sync */ 184 185 u_long mmio; /* Memory mapped registers */ 186 } vidinfo_t; 187 188 #elif defined(CONFIG_EXYNOS_FB) 189 190 enum { 191 FIMD_RGB_INTERFACE = 1, 192 FIMD_CPU_INTERFACE = 2, 193 }; 194 195 enum exynos_fb_rgb_mode_t { 196 MODE_RGB_P = 0, 197 MODE_BGR_P = 1, 198 MODE_RGB_S = 2, 199 MODE_BGR_S = 3, 200 }; 201 202 typedef struct vidinfo { 203 ushort vl_col; /* Number of columns (i.e. 640) */ 204 ushort vl_row; /* Number of rows (i.e. 480) */ 205 ushort vl_width; /* Width of display area in millimeters */ 206 ushort vl_height; /* Height of display area in millimeters */ 207 208 /* LCD configuration register */ 209 u_char vl_freq; /* Frequency */ 210 u_char vl_clkp; /* Clock polarity */ 211 u_char vl_oep; /* Output Enable polarity */ 212 u_char vl_hsp; /* Horizontal Sync polarity */ 213 u_char vl_vsp; /* Vertical Sync polarity */ 214 u_char vl_dp; /* Data polarity */ 215 u_char vl_bpix; /* Bits per pixel */ 216 217 /* Horizontal control register. Timing from data sheet */ 218 u_char vl_hspw; /* Horz sync pulse width */ 219 u_char vl_hfpd; /* Wait before of line */ 220 u_char vl_hbpd; /* Wait end of line */ 221 222 /* Vertical control register. */ 223 u_char vl_vspw; /* Vertical sync pulse width */ 224 u_char vl_vfpd; /* Wait before of frame */ 225 u_char vl_vbpd; /* Wait end of frame */ 226 u_char vl_cmd_allow_len; /* Wait end of frame */ 227 228 unsigned int win_id; 229 unsigned int init_delay; 230 unsigned int power_on_delay; 231 unsigned int reset_delay; 232 unsigned int interface_mode; 233 unsigned int mipi_enabled; 234 unsigned int dp_enabled; 235 unsigned int cs_setup; 236 unsigned int wr_setup; 237 unsigned int wr_act; 238 unsigned int wr_hold; 239 unsigned int logo_on; 240 unsigned int logo_width; 241 unsigned int logo_height; 242 unsigned long logo_addr; 243 unsigned int rgb_mode; 244 unsigned int resolution; 245 246 /* parent clock name(MPLL, EPLL or VPLL) */ 247 unsigned int pclk_name; 248 /* ratio value for source clock from parent clock. */ 249 unsigned int sclk_div; 250 251 unsigned int dual_lcd_enabled; 252 } vidinfo_t; 253 254 void init_panel_info(vidinfo_t *vid); 255 256 #else 257 258 typedef struct vidinfo { 259 ushort vl_col; /* Number of columns (i.e. 160) */ 260 ushort vl_row; /* Number of rows (i.e. 100) */ 261 262 u_char vl_bpix; /* Bits per pixel, 0 = 1 */ 263 264 ushort *cmap; /* Pointer to the colormap */ 265 266 void *priv; /* Pointer to driver-specific data */ 267 } vidinfo_t; 268 269 #endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */ 270 271 extern vidinfo_t panel_info; 272 273 /* Video functions */ 274 275 #if defined(CONFIG_RBC823) 276 void lcd_disable(void); 277 #endif 278 279 void lcd_putc(const char c); 280 void lcd_puts(const char *s); 281 void lcd_printf(const char *fmt, ...); 282 void lcd_clear(void); 283 int lcd_display_bitmap(ulong bmp_image, int x, int y); 284 285 /** 286 * Get the width of the LCD in pixels 287 * 288 * @return width of LCD in pixels 289 */ 290 int lcd_get_pixel_width(void); 291 292 /** 293 * Get the height of the LCD in pixels 294 * 295 * @return height of LCD in pixels 296 */ 297 int lcd_get_pixel_height(void); 298 299 /** 300 * Get the number of text lines/rows on the LCD 301 * 302 * @return number of rows 303 */ 304 int lcd_get_screen_rows(void); 305 306 /** 307 * Get the number of text columns on the LCD 308 * 309 * @return number of columns 310 */ 311 int lcd_get_screen_columns(void); 312 313 /** 314 * Set the position of the text cursor 315 * 316 * @param col Column to place cursor (0 = left side) 317 * @param row Row to place cursor (0 = top line) 318 */ 319 void lcd_position_cursor(unsigned col, unsigned row); 320 321 /* Allow boards to customize the information displayed */ 322 void lcd_show_board_info(void); 323 324 /* Return the size of the LCD frame buffer, and the line length */ 325 int lcd_get_size(int *line_length); 326 327 int lcd_dt_simplefb_add_node(void *blob); 328 int lcd_dt_simplefb_enable_existing_node(void *blob); 329 330 /************************************************************************/ 331 /* ** BITMAP DISPLAY SUPPORT */ 332 /************************************************************************/ 333 #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN) 334 # include <bmp_layout.h> 335 # include <asm/byteorder.h> 336 #endif 337 338 /* 339 * Information about displays we are using. This is for configuring 340 * the LCD controller and memory allocation. Someone has to know what 341 * is connected, as we can't autodetect anything. 342 */ 343 #define CONFIG_SYS_HIGH 0 /* Pins are active high */ 344 #define CONFIG_SYS_LOW 1 /* Pins are active low */ 345 346 #define LCD_MONOCHROME 0 347 #define LCD_COLOR2 1 348 #define LCD_COLOR4 2 349 #define LCD_COLOR8 3 350 #define LCD_COLOR16 4 351 352 /*----------------------------------------------------------------------*/ 353 #if defined(CONFIG_LCD_INFO_BELOW_LOGO) 354 # define LCD_INFO_X 0 355 # define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT) 356 #elif defined(CONFIG_LCD_LOGO) 357 # define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH) 358 # define LCD_INFO_Y VIDEO_FONT_HEIGHT 359 #else 360 # define LCD_INFO_X VIDEO_FONT_WIDTH 361 # define LCD_INFO_Y VIDEO_FONT_HEIGHT 362 #endif 363 364 /* Default to 8bpp if bit depth not specified */ 365 #ifndef LCD_BPP 366 # define LCD_BPP LCD_COLOR8 367 #endif 368 #ifndef LCD_DF 369 # define LCD_DF 1 370 #endif 371 372 /* Calculate nr. of bits per pixel and nr. of colors */ 373 #define NBITS(bit_code) (1 << (bit_code)) 374 #define NCOLORS(bit_code) (1 << NBITS(bit_code)) 375 376 /************************************************************************/ 377 /* ** CONSOLE CONSTANTS */ 378 /************************************************************************/ 379 #if LCD_BPP == LCD_MONOCHROME 380 381 /* 382 * Simple black/white definitions 383 */ 384 # define CONSOLE_COLOR_BLACK 0 385 # define CONSOLE_COLOR_WHITE 1 /* Must remain last / highest */ 386 387 #elif LCD_BPP == LCD_COLOR8 388 389 /* 390 * 8bpp color definitions 391 */ 392 # define CONSOLE_COLOR_BLACK 0 393 # define CONSOLE_COLOR_RED 1 394 # define CONSOLE_COLOR_GREEN 2 395 # define CONSOLE_COLOR_YELLOW 3 396 # define CONSOLE_COLOR_BLUE 4 397 # define CONSOLE_COLOR_MAGENTA 5 398 # define CONSOLE_COLOR_CYAN 6 399 # define CONSOLE_COLOR_GREY 14 400 # define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */ 401 402 #else 403 404 /* 405 * 16bpp color definitions 406 */ 407 # define CONSOLE_COLOR_BLACK 0x0000 408 # define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */ 409 410 #endif /* color definitions */ 411 412 /************************************************************************/ 413 #ifndef PAGE_SIZE 414 # define PAGE_SIZE 4096 415 #endif 416 417 /************************************************************************/ 418 419 #endif /* _LCD_H_ */ 420