xref: /openbmc/u-boot/include/lcd.h (revision 5993053f)
1 /*
2  * MPC823 and PXA LCD Controller
3  *
4  * Modeled after video interface by Paolo Scaffardi
5  *
6  *
7  * (C) Copyright 2001
8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9  *
10  * See file CREDITS for list of people who contributed to this
11  * project.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License as
15  * published by the Free Software Foundation; either version 2 of
16  * the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26  * MA 02111-1307 USA
27  */
28 
29 #ifndef _LCD_H_
30 #define _LCD_H_
31 
32 extern char lcd_is_enabled;
33 
34 extern int lcd_line_length;
35 
36 extern struct vidinfo panel_info;
37 
38 void lcd_ctrl_init(void *lcdbase);
39 void lcd_enable(void);
40 int board_splash_screen_prepare(void);
41 
42 /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
43 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue);
44 void lcd_initcolregs(void);
45 
46 int lcd_getfgcolor(void);
47 
48 /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
49 struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
50 int bmp_display(ulong addr, int x, int y);
51 
52 /**
53  * Set whether we need to flush the dcache when changing the LCD image. This
54  * defaults to off.
55  *
56  * @param flush		non-zero to flush cache after update, 0 to skip
57  */
58 void lcd_set_flush_dcache(int flush);
59 
60 #if defined CONFIG_MPC823
61 /*
62  * LCD controller stucture for MPC823 CPU
63  */
64 typedef struct vidinfo {
65 	ushort	vl_col;		/* Number of columns (i.e. 640) */
66 	ushort	vl_row;		/* Number of rows (i.e. 480) */
67 	ushort	vl_width;	/* Width of display area in millimeters */
68 	ushort	vl_height;	/* Height of display area in millimeters */
69 
70 	/* LCD configuration register */
71 	u_char	vl_clkp;	/* Clock polarity */
72 	u_char	vl_oep;		/* Output Enable polarity */
73 	u_char	vl_hsp;		/* Horizontal Sync polarity */
74 	u_char	vl_vsp;		/* Vertical Sync polarity */
75 	u_char	vl_dp;		/* Data polarity */
76 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
77 	u_char	vl_lbw;		/* LCD Bus width, 0 = 4, 1 = 8 */
78 	u_char	vl_splt;	/* Split display, 0 = single-scan, 1 = dual-scan */
79 	u_char	vl_clor;	/* Color, 0 = mono, 1 = color */
80 	u_char	vl_tft;		/* 0 = passive, 1 = TFT */
81 
82 	/* Horizontal control register. Timing from data sheet */
83 	ushort	vl_wbl;		/* Wait between lines */
84 
85 	/* Vertical control register */
86 	u_char	vl_vpw;		/* Vertical sync pulse width */
87 	u_char	vl_lcdac;	/* LCD AC timing */
88 	u_char	vl_wbf;		/* Wait between frames */
89 } vidinfo_t;
90 
91 #elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
92 	defined CONFIG_CPU_MONAHANS
93 /*
94  * PXA LCD DMA descriptor
95  */
96 struct pxafb_dma_descriptor {
97 	u_long	fdadr;		/* Frame descriptor address register */
98 	u_long	fsadr;		/* Frame source address register */
99 	u_long	fidr;		/* Frame ID register */
100 	u_long	ldcmd;		/* Command register */
101 };
102 
103 /*
104  * PXA LCD info
105  */
106 struct pxafb_info {
107 
108 	/* Misc registers */
109 	u_long	reg_lccr3;
110 	u_long	reg_lccr2;
111 	u_long	reg_lccr1;
112 	u_long	reg_lccr0;
113 	u_long	fdadr0;
114 	u_long	fdadr1;
115 
116 	/* DMA descriptors */
117 	struct	pxafb_dma_descriptor *	dmadesc_fblow;
118 	struct	pxafb_dma_descriptor *	dmadesc_fbhigh;
119 	struct	pxafb_dma_descriptor *	dmadesc_palette;
120 
121 	u_long	screen;		/* physical address of frame buffer */
122 	u_long	palette;	/* physical address of palette memory */
123 	u_int	palette_size;
124 };
125 
126 /*
127  * LCD controller stucture for PXA CPU
128  */
129 typedef struct vidinfo {
130 	ushort	vl_col;		/* Number of columns (i.e. 640) */
131 	ushort	vl_row;		/* Number of rows (i.e. 480) */
132 	ushort	vl_width;	/* Width of display area in millimeters */
133 	ushort	vl_height;	/* Height of display area in millimeters */
134 
135 	/* LCD configuration register */
136 	u_char	vl_clkp;	/* Clock polarity */
137 	u_char	vl_oep;		/* Output Enable polarity */
138 	u_char	vl_hsp;		/* Horizontal Sync polarity */
139 	u_char	vl_vsp;		/* Vertical Sync polarity */
140 	u_char	vl_dp;		/* Data polarity */
141 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
142 	u_char	vl_lbw;		/* LCD Bus width, 0 = 4, 1 = 8 */
143 	u_char	vl_splt;	/* Split display, 0 = single-scan, 1 = dual-scan */
144 	u_char	vl_clor;	/* Color, 0 = mono, 1 = color */
145 	u_char	vl_tft;		/* 0 = passive, 1 = TFT */
146 
147 	/* Horizontal control register. Timing from data sheet */
148 	ushort	vl_hpw;		/* Horz sync pulse width */
149 	u_char	vl_blw;		/* Wait before of line */
150 	u_char	vl_elw;		/* Wait end of line */
151 
152 	/* Vertical control register. */
153 	u_char	vl_vpw;		/* Vertical sync pulse width */
154 	u_char	vl_bfw;		/* Wait before of frame */
155 	u_char	vl_efw;		/* Wait end of frame */
156 
157 	/* PXA LCD controller params */
158 	struct	pxafb_info pxa;
159 } vidinfo_t;
160 
161 #elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
162 
163 typedef struct vidinfo {
164 	ushort vl_col;		/* Number of columns (i.e. 640) */
165 	ushort vl_row;		/* Number of rows (i.e. 480) */
166 	u_long vl_clk;	/* pixel clock in ps    */
167 
168 	/* LCD configuration register */
169 	u_long vl_sync;		/* Horizontal / vertical sync */
170 	u_long vl_bpix;		/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
171 	u_long vl_tft;		/* 0 = passive, 1 = TFT */
172 	u_long vl_cont_pol_low;	/* contrast polarity is low */
173 	u_long vl_clk_pol;	/* clock polarity */
174 
175 	/* Horizontal control register. */
176 	u_long vl_hsync_len;	/* Length of horizontal sync */
177 	u_long vl_left_margin;	/* Time from sync to picture */
178 	u_long vl_right_margin;	/* Time from picture to sync */
179 
180 	/* Vertical control register. */
181 	u_long vl_vsync_len;	/* Length of vertical sync */
182 	u_long vl_upper_margin;	/* Time from sync to picture */
183 	u_long vl_lower_margin;	/* Time from picture to sync */
184 
185 	u_long	mmio;		/* Memory mapped registers */
186 } vidinfo_t;
187 
188 #elif defined(CONFIG_EXYNOS_FB)
189 
190 enum {
191 	FIMD_RGB_INTERFACE = 1,
192 	FIMD_CPU_INTERFACE = 2,
193 };
194 
195 enum exynos_fb_rgb_mode_t {
196 	MODE_RGB_P = 0,
197 	MODE_BGR_P = 1,
198 	MODE_RGB_S = 2,
199 	MODE_BGR_S = 3,
200 };
201 
202 typedef struct vidinfo {
203 	ushort vl_col;		/* Number of columns (i.e. 640) */
204 	ushort vl_row;		/* Number of rows (i.e. 480) */
205 	ushort vl_width;	/* Width of display area in millimeters */
206 	ushort vl_height;	/* Height of display area in millimeters */
207 
208 	/* LCD configuration register */
209 	u_char vl_freq;		/* Frequency */
210 	u_char vl_clkp;		/* Clock polarity */
211 	u_char vl_oep;		/* Output Enable polarity */
212 	u_char vl_hsp;		/* Horizontal Sync polarity */
213 	u_char vl_vsp;		/* Vertical Sync polarity */
214 	u_char vl_dp;		/* Data polarity */
215 	u_char vl_bpix;		/* Bits per pixel */
216 
217 	/* Horizontal control register. Timing from data sheet */
218 	u_char vl_hspw;		/* Horz sync pulse width */
219 	u_char vl_hfpd;		/* Wait before of line */
220 	u_char vl_hbpd;		/* Wait end of line */
221 
222 	/* Vertical control register. */
223 	u_char	vl_vspw;	/* Vertical sync pulse width */
224 	u_char	vl_vfpd;	/* Wait before of frame */
225 	u_char	vl_vbpd;	/* Wait end of frame */
226 	u_char  vl_cmd_allow_len; /* Wait end of frame */
227 
228 	void (*cfg_gpio)(void);
229 	void (*backlight_on)(unsigned int onoff);
230 	void (*reset_lcd)(void);
231 	void (*lcd_power_on)(void);
232 	void (*cfg_ldo)(void);
233 	void (*enable_ldo)(unsigned int onoff);
234 	void (*mipi_power)(void);
235 	void (*backlight_reset)(void);
236 
237 	unsigned int win_id;
238 	unsigned int init_delay;
239 	unsigned int power_on_delay;
240 	unsigned int reset_delay;
241 	unsigned int interface_mode;
242 	unsigned int mipi_enabled;
243 	unsigned int dp_enabled;
244 	unsigned int cs_setup;
245 	unsigned int wr_setup;
246 	unsigned int wr_act;
247 	unsigned int wr_hold;
248 	unsigned int logo_on;
249 	unsigned int logo_width;
250 	unsigned int logo_height;
251 	unsigned long logo_addr;
252 	unsigned int rgb_mode;
253 	unsigned int resolution;
254 
255 	/* parent clock name(MPLL, EPLL or VPLL) */
256 	unsigned int pclk_name;
257 	/* ratio value for source clock from parent clock. */
258 	unsigned int sclk_div;
259 
260 	unsigned int dual_lcd_enabled;
261 } vidinfo_t;
262 
263 void init_panel_info(vidinfo_t *vid);
264 
265 #else
266 
267 typedef struct vidinfo {
268 	ushort	vl_col;		/* Number of columns (i.e. 160) */
269 	ushort	vl_row;		/* Number of rows (i.e. 100) */
270 
271 	u_char	vl_bpix;	/* Bits per pixel, 0 = 1 */
272 
273 	ushort	*cmap;		/* Pointer to the colormap */
274 
275 	void	*priv;		/* Pointer to driver-specific data */
276 } vidinfo_t;
277 
278 #endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
279 
280 extern vidinfo_t panel_info;
281 
282 /* Video functions */
283 
284 #if defined(CONFIG_RBC823)
285 void	lcd_disable(void);
286 #endif
287 
288 void	lcd_putc(const char c);
289 void	lcd_puts(const char *s);
290 void	lcd_printf(const char *fmt, ...);
291 void	lcd_clear(void);
292 int	lcd_display_bitmap(ulong bmp_image, int x, int y);
293 
294 /**
295  * Get the width of the LCD in pixels
296  *
297  * @return width of LCD in pixels
298  */
299 int lcd_get_pixel_width(void);
300 
301 /**
302  * Get the height of the LCD in pixels
303  *
304  * @return height of LCD in pixels
305  */
306 int lcd_get_pixel_height(void);
307 
308 /**
309  * Get the number of text lines/rows on the LCD
310  *
311  * @return number of rows
312  */
313 int lcd_get_screen_rows(void);
314 
315 /**
316  * Get the number of text columns on the LCD
317  *
318  * @return number of columns
319  */
320 int lcd_get_screen_columns(void);
321 
322 /**
323  * Set the position of the text cursor
324  *
325  * @param col	Column to place cursor (0 = left side)
326  * @param row	Row to place cursor (0 = top line)
327  */
328 void lcd_position_cursor(unsigned col, unsigned row);
329 
330 /* Allow boards to customize the information displayed */
331 void lcd_show_board_info(void);
332 
333 /* Return the size of the LCD frame buffer, and the line length */
334 int lcd_get_size(int *line_length);
335 
336 /************************************************************************/
337 /* ** BITMAP DISPLAY SUPPORT						*/
338 /************************************************************************/
339 #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
340 # include <bmp_layout.h>
341 # include <asm/byteorder.h>
342 #endif
343 
344 /*
345  *  Information about displays we are using. This is for configuring
346  *  the LCD controller and memory allocation. Someone has to know what
347  *  is connected, as we can't autodetect anything.
348  */
349 #define CONFIG_SYS_HIGH	0	/* Pins are active high			*/
350 #define CONFIG_SYS_LOW	1	/* Pins are active low			*/
351 
352 #define LCD_MONOCHROME	0
353 #define LCD_COLOR2	1
354 #define LCD_COLOR4	2
355 #define LCD_COLOR8	3
356 #define LCD_COLOR16	4
357 
358 /*----------------------------------------------------------------------*/
359 #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
360 # define LCD_INFO_X		0
361 # define LCD_INFO_Y		(BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
362 #elif defined(CONFIG_LCD_LOGO)
363 # define LCD_INFO_X		(BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
364 # define LCD_INFO_Y		VIDEO_FONT_HEIGHT
365 #else
366 # define LCD_INFO_X		VIDEO_FONT_WIDTH
367 # define LCD_INFO_Y		VIDEO_FONT_HEIGHT
368 #endif
369 
370 /* Default to 8bpp if bit depth not specified */
371 #ifndef LCD_BPP
372 # define LCD_BPP			LCD_COLOR8
373 #endif
374 #ifndef LCD_DF
375 # define LCD_DF			1
376 #endif
377 
378 /* Calculate nr. of bits per pixel  and nr. of colors */
379 #define NBITS(bit_code)		(1 << (bit_code))
380 #define NCOLORS(bit_code)	(1 << NBITS(bit_code))
381 
382 /************************************************************************/
383 /* ** CONSOLE CONSTANTS							*/
384 /************************************************************************/
385 #if LCD_BPP == LCD_MONOCHROME
386 
387 /*
388  * Simple black/white definitions
389  */
390 # define CONSOLE_COLOR_BLACK	0
391 # define CONSOLE_COLOR_WHITE	1	/* Must remain last / highest	*/
392 
393 #elif LCD_BPP == LCD_COLOR8
394 
395 /*
396  * 8bpp color definitions
397  */
398 # define CONSOLE_COLOR_BLACK	0
399 # define CONSOLE_COLOR_RED	1
400 # define CONSOLE_COLOR_GREEN	2
401 # define CONSOLE_COLOR_YELLOW	3
402 # define CONSOLE_COLOR_BLUE	4
403 # define CONSOLE_COLOR_MAGENTA	5
404 # define CONSOLE_COLOR_CYAN	6
405 # define CONSOLE_COLOR_GREY	14
406 # define CONSOLE_COLOR_WHITE	15	/* Must remain last / highest	*/
407 
408 #else
409 
410 /*
411  * 16bpp color definitions
412  */
413 # define CONSOLE_COLOR_BLACK	0x0000
414 # define CONSOLE_COLOR_WHITE	0xffff	/* Must remain last / highest	*/
415 
416 #endif /* color definitions */
417 
418 /************************************************************************/
419 #ifndef PAGE_SIZE
420 # define PAGE_SIZE	4096
421 #endif
422 
423 /************************************************************************/
424 
425 #endif	/* _LCD_H_ */
426