1 /* 2 * (C) Copyright 2009 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _IMXIMAGE_H_ 9 #define _IMXIMAGE_H_ 10 11 #define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */ 12 #define MAX_PLUGIN_CODE_SIZE (64 * 1024) 13 #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ 14 #define APP_CODE_BARKER 0xB1 15 #define DCD_BARKER 0xB17219E9 16 17 /* 18 * NOTE: This file must be kept in sync with arch/arm/include/asm/\ 19 * mach-imx/imximage.cfg because tools/imximage.c can not 20 * cross-include headers from arch/arm/ and vice-versa. 21 */ 22 #define CMD_DATA_STR "DATA" 23 24 /* Initial Vector Table Offset */ 25 #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF 26 #define FLASH_OFFSET_STANDARD 0x400 27 #define FLASH_OFFSET_NAND FLASH_OFFSET_STANDARD 28 #define FLASH_OFFSET_SD FLASH_OFFSET_STANDARD 29 #define FLASH_OFFSET_SPI FLASH_OFFSET_STANDARD 30 #define FLASH_OFFSET_ONENAND 0x100 31 #define FLASH_OFFSET_NOR 0x1000 32 #define FLASH_OFFSET_SATA FLASH_OFFSET_STANDARD 33 #define FLASH_OFFSET_QSPI 0x1000 34 35 /* Initial Load Region Size */ 36 #define FLASH_LOADSIZE_UNDEFINED 0xFFFFFFFF 37 #define FLASH_LOADSIZE_STANDARD 0x1000 38 #define FLASH_LOADSIZE_NAND FLASH_LOADSIZE_STANDARD 39 #define FLASH_LOADSIZE_SD FLASH_LOADSIZE_STANDARD 40 #define FLASH_LOADSIZE_SPI FLASH_LOADSIZE_STANDARD 41 #define FLASH_LOADSIZE_ONENAND 0x400 42 #define FLASH_LOADSIZE_NOR 0x0 /* entire image */ 43 #define FLASH_LOADSIZE_SATA FLASH_LOADSIZE_STANDARD 44 #define FLASH_LOADSIZE_QSPI 0x0 /* entire image */ 45 46 /* Command tags and parameters */ 47 #define IVT_HEADER_TAG 0xD1 48 #define IVT_VERSION 0x40 49 #define DCD_HEADER_TAG 0xD2 50 #define DCD_VERSION 0x40 51 #define DCD_WRITE_DATA_COMMAND_TAG 0xCC 52 #define DCD_WRITE_DATA_PARAM 0x4 53 #define DCD_WRITE_CLR_BIT_PARAM 0xC 54 #define DCD_WRITE_SET_BIT_PARAM 0x1C 55 #define DCD_CHECK_DATA_COMMAND_TAG 0xCF 56 #define DCD_CHECK_BITS_SET_PARAM 0x14 57 #define DCD_CHECK_BITS_CLR_PARAM 0x04 58 59 #ifndef __ASSEMBLY__ 60 enum imximage_cmd { 61 CMD_INVALID, 62 CMD_IMAGE_VERSION, 63 CMD_BOOT_FROM, 64 CMD_BOOT_OFFSET, 65 CMD_WRITE_DATA, 66 CMD_WRITE_CLR_BIT, 67 CMD_WRITE_SET_BIT, 68 CMD_CHECK_BITS_SET, 69 CMD_CHECK_BITS_CLR, 70 CMD_CSF, 71 CMD_PLUGIN, 72 }; 73 74 enum imximage_fld_types { 75 CFG_INVALID = -1, 76 CFG_COMMAND, 77 CFG_REG_SIZE, 78 CFG_REG_ADDRESS, 79 CFG_REG_VALUE 80 }; 81 82 enum imximage_version { 83 IMXIMAGE_VER_INVALID = -1, 84 IMXIMAGE_V1 = 1, 85 IMXIMAGE_V2 86 }; 87 88 typedef struct { 89 uint32_t type; /* Type of pointer (byte, halfword, word, wait/read) */ 90 uint32_t addr; /* Address to write to */ 91 uint32_t value; /* Data to write */ 92 } dcd_type_addr_data_t; 93 94 typedef struct { 95 uint32_t barker; /* Barker for sanity check */ 96 uint32_t length; /* Device configuration length (without preamble) */ 97 } dcd_preamble_t; 98 99 typedef struct { 100 dcd_preamble_t preamble; 101 dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1]; 102 } dcd_v1_t; 103 104 typedef struct { 105 uint32_t app_code_jump_vector; 106 uint32_t app_code_barker; 107 uint32_t app_code_csf; 108 uint32_t dcd_ptr_ptr; 109 uint32_t super_root_key; 110 uint32_t dcd_ptr; 111 uint32_t app_dest_ptr; 112 } flash_header_v1_t; 113 114 typedef struct { 115 uint32_t length; /* Length of data to be read from flash */ 116 } flash_cfg_parms_t; 117 118 typedef struct { 119 flash_header_v1_t fhdr; 120 dcd_v1_t dcd_table; 121 flash_cfg_parms_t ext_header; 122 } imx_header_v1_t; 123 124 typedef struct { 125 uint32_t addr; 126 uint32_t value; 127 } dcd_addr_data_t; 128 129 typedef struct { 130 uint8_t tag; 131 uint16_t length; 132 uint8_t version; 133 } __attribute__((packed)) ivt_header_t; 134 135 typedef struct { 136 uint8_t tag; 137 uint16_t length; 138 uint8_t param; 139 } __attribute__((packed)) write_dcd_command_t; 140 141 struct dcd_v2_cmd { 142 write_dcd_command_t write_dcd_command; 143 dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2]; 144 }; 145 146 typedef struct { 147 ivt_header_t header; 148 struct dcd_v2_cmd dcd_cmd; 149 uint32_t padding[1]; /* end up on an 8-byte boundary */ 150 } dcd_v2_t; 151 152 typedef struct { 153 uint32_t start; 154 uint32_t size; 155 uint32_t plugin; 156 } boot_data_t; 157 158 typedef struct { 159 ivt_header_t header; 160 uint32_t entry; 161 uint32_t reserved1; 162 uint32_t dcd_ptr; 163 uint32_t boot_data_ptr; 164 uint32_t self; 165 uint32_t csf; 166 uint32_t reserved2; 167 } flash_header_v2_t; 168 169 typedef struct { 170 flash_header_v2_t fhdr; 171 boot_data_t boot_data; 172 union { 173 dcd_v2_t dcd_table; 174 char plugin_code[MAX_PLUGIN_CODE_SIZE]; 175 } data; 176 } imx_header_v2_t; 177 178 /* The header must be aligned to 4k on MX53 for NAND boot */ 179 struct imx_header { 180 union { 181 imx_header_v1_t hdr_v1; 182 imx_header_v2_t hdr_v2; 183 } header; 184 }; 185 186 typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, 187 char *name, int lineno, 188 int fld, uint32_t value, 189 uint32_t off); 190 191 typedef void (*set_dcd_param_t)(struct imx_header *imxhdr, uint32_t dcd_len, 192 int32_t cmd); 193 194 typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, 195 uint32_t dcd_len, 196 char *name, int lineno); 197 198 typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len, 199 uint32_t entry_point, uint32_t flash_offset); 200 201 #endif /* __ASSEMBLY__ */ 202 #endif /* _IMXIMAGE_H_ */ 203