xref: /openbmc/u-boot/include/imx8image.h (revision c83c436d)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2018 NXP
4  *
5  * Peng Fan <peng.fan@nxp.com>
6  */
7 
8 #ifndef _IMX8IMAGE_H_
9 #define _IMX8IMAGE_H_
10 
11 #include <image.h>
12 #include <inttypes.h>
13 #include "imagetool.h"
14 #include "linux/kernel.h"
15 
16 #define __packed   __attribute__((packed))
17 
18 #define IV_MAX_LEN			32
19 #define HASH_MAX_LEN			64
20 #define MAX_NUM_IMGS			6
21 #define MAX_NUM_SRK_RECORDS		4
22 
23 #define IVT_HEADER_TAG_B0		0x87
24 #define IVT_VERSION_B0			0x00
25 
26 #define IMG_FLAG_HASH_SHA256		0x000
27 #define IMG_FLAG_HASH_SHA384		0x100
28 #define IMG_FLAG_HASH_SHA512		0x200
29 
30 #define IMG_FLAG_ENCRYPTED_MASK		0x400
31 #define IMG_FLAG_ENCRYPTED_SHIFT	0x0A
32 
33 #define IMG_FLAG_BOOTFLAGS_MASK		0xFFFF0000
34 #define IMG_FLAG_BOOTFLAGS_SHIFT	0x10
35 
36 #define IMG_ARRAY_ENTRY_SIZE		128
37 #define HEADER_IMG_ARRAY_OFFSET		0x10
38 
39 #define HASH_TYPE_SHA_256		256
40 #define HASH_TYPE_SHA_384		384
41 #define HASH_TYPE_SHA_512		512
42 
43 #define IMAGE_HASH_ALGO_DEFAULT		384
44 #define IMAGE_PADDING_DEFAULT		0x1000
45 
46 #define DCD_ENTRY_ADDR_IN_SCFW		0x240
47 
48 #define CONTAINER_ALIGNMENT		0x400
49 #define CONTAINER_FLAGS_DEFAULT		0x10
50 #define CONTAINER_FUSE_DEFAULT		0x0
51 
52 #define SIGNATURE_BLOCK_HEADER_LENGTH	0x10
53 
54 #define MAX_NUM_OF_CONTAINER		2
55 
56 #define FIRST_CONTAINER_HEADER_LENGTH	0x400
57 
58 #define BOOT_IMG_META_MU_RID_SHIFT	10
59 #define BOOT_IMG_META_PART_ID_SHIFT	20
60 
61 #define IMAGE_A35_DEFAULT_META(PART)	(((PART == 0) ? \
62 					 PARTITION_ID_AP : PART) << \
63 					 BOOT_IMG_META_PART_ID_SHIFT | \
64 					 SC_R_MU_0A << \
65 					 BOOT_IMG_META_MU_RID_SHIFT | \
66 					 SC_R_A35_0)
67 
68 #define IMAGE_A53_DEFAULT_META(PART)	(((PART == 0) ? \
69 					 PARTITION_ID_AP : PART) << \
70 					 BOOT_IMG_META_PART_ID_SHIFT | \
71 					 SC_R_MU_0A << \
72 					 BOOT_IMG_META_MU_RID_SHIFT | \
73 					 SC_R_A53_0)
74 
75 #define IMAGE_A72_DEFAULT_META(PART)	(((PART == 0) ? \
76 					 PARTITION_ID_AP : PART) << \
77 					 BOOT_IMG_META_PART_ID_SHIFT | \
78 					 SC_R_MU_0A << \
79 					 BOOT_IMG_META_MU_RID_SHIFT | \
80 					 SC_R_A72_0)
81 
82 #define IMAGE_M4_0_DEFAULT_META(PART)	(((PART == 0) ? \
83 					 PARTITION_ID_M4 : PART) << \
84 					 BOOT_IMG_META_PART_ID_SHIFT | \
85 					 SC_R_M4_0_MU_1A << \
86 					 BOOT_IMG_META_MU_RID_SHIFT | \
87 					 SC_R_M4_0_PID0)
88 
89 #define IMAGE_M4_1_DEFAULT_META(PART)	(((PART == 0) ? \
90 					 PARTITION_ID_M4 : PART) << \
91 					 BOOT_IMG_META_PART_ID_SHIFT | \
92 					 SC_R_M4_1_MU_1A << \
93 					 BOOT_IMG_META_MU_RID_SHIFT | \
94 					 SC_R_M4_1_PID0)
95 
96 #define CONTAINER_IMAGE_ARRAY_START_OFFSET	0x2000
97 
98 typedef struct {
99 	uint8_t version;
100 	uint16_t length;
101 	uint8_t tag;
102 	uint16_t srk_table_offset;
103 	uint16_t cert_offset;
104 	uint16_t blob_offset;
105 	uint16_t signature_offset;
106 	uint32_t reserved;
107 } __packed sig_blk_hdr_t;
108 
109 typedef struct {
110 	uint32_t offset;
111 	uint32_t size;
112 	uint64_t dst;
113 	uint64_t entry;
114 	uint32_t hab_flags;
115 	uint32_t meta;
116 	uint8_t hash[HASH_MAX_LEN];
117 	uint8_t iv[IV_MAX_LEN];
118 } __packed boot_img_t;
119 
120 typedef struct {
121 	uint8_t version;
122 	uint16_t length;
123 	uint8_t tag;
124 	uint32_t flags;
125 	uint16_t sw_version;
126 	uint8_t fuse_version;
127 	uint8_t num_images;
128 	uint16_t sig_blk_offset;
129 	uint16_t reserved;
130 	boot_img_t img[MAX_NUM_IMGS];
131 	sig_blk_hdr_t sig_blk_hdr;
132 	uint32_t sigblk_size;
133 	uint32_t padding;
134 } __packed flash_header_v3_t;
135 
136 typedef struct {
137 	flash_header_v3_t fhdr[MAX_NUM_OF_CONTAINER];
138 }  __packed imx_header_v3_t;
139 
140 struct image_array {
141 	char *name;
142 	unsigned int core_type;
143 	unsigned int core_id;
144 	unsigned int load_addr;
145 };
146 
147 enum imx8image_cmd {
148 	CMD_INVALID,
149 	CMD_BOOT_FROM,
150 	CMD_FUSE_VERSION,
151 	CMD_SW_VERSION,
152 	CMD_MSG_BLOCK,
153 	CMD_FILEOFF,
154 	CMD_FLAG,
155 	CMD_APPEND,
156 	CMD_PARTITION,
157 	CMD_SOC_TYPE,
158 	CMD_CONTAINER,
159 	CMD_IMAGE,
160 	CMD_DATA
161 };
162 
163 enum imx8image_core_type {
164 	CFG_CORE_INVALID,
165 	CFG_SCU,
166 	CFG_M40,
167 	CFG_M41,
168 	CFG_A35,
169 	CFG_A53,
170 	CFG_A72
171 };
172 
173 enum imx8image_fld_types {
174 	CFG_INVALID = -1,
175 	CFG_COMMAND,
176 	CFG_CORE_TYPE,
177 	CFG_IMAGE_NAME,
178 	CFG_LOAD_ADDR
179 };
180 
181 typedef enum SOC_TYPE {
182 	NONE = 0,
183 	QX,
184 	QM
185 } soc_type_t;
186 
187 typedef enum option_type {
188 	NO_IMG = 0,
189 	DCD,
190 	SCFW,
191 	SECO,
192 	M40,
193 	M41,
194 	AP,
195 	OUTPUT,
196 	SCD,
197 	CSF,
198 	FLAG,
199 	DEVICE,
200 	NEW_CONTAINER,
201 	APPEND,
202 	DATA,
203 	PARTITION,
204 	FILEOFF,
205 	MSG_BLOCK
206 } option_type_t;
207 
208 typedef struct {
209 	option_type_t option;
210 	char *filename;
211 	uint64_t src;
212 	uint64_t dst;
213 	uint64_t entry;
214 	uint64_t ext;
215 } image_t;
216 
217 #define CORE_SC         1
218 #define CORE_CM4_0      2
219 #define CORE_CM4_1      3
220 #define CORE_CA53       4
221 #define CORE_CA35       4
222 #define CORE_CA72       5
223 #define CORE_SECO       6
224 
225 #define SC_R_OTP	357U
226 #define SC_R_DEBUG	354U
227 #define SC_R_ROM_0	236U
228 
229 #define MSG_DEBUG_EN	SC_R_DEBUG
230 #define MSG_FUSE	SC_R_OTP
231 #define MSG_FIELD	SC_R_ROM_0
232 
233 #define IMG_TYPE_CSF     0x01   /* CSF image type */
234 #define IMG_TYPE_SCD     0x02   /* SCD image type */
235 #define IMG_TYPE_EXEC    0x03   /* Executable image type */
236 #define IMG_TYPE_DATA    0x04   /* Data image type */
237 #define IMG_TYPE_DCD_DDR 0x05   /* DCD/DDR image type */
238 #define IMG_TYPE_SECO    0x06   /* SECO image type */
239 #define IMG_TYPE_PROV    0x07   /* Provisioning image type */
240 #define IMG_TYPE_DEK     0x08   /* DEK validation type */
241 
242 #define IMG_TYPE_SHIFT   0
243 #define IMG_TYPE_MASK    0x1f
244 #define IMG_TYPE(x)      (((x) & IMG_TYPE_MASK) >> IMG_TYPE_SHIFT)
245 
246 #define BOOT_IMG_FLAGS_CORE_MASK		0xF
247 #define BOOT_IMG_FLAGS_CORE_SHIFT		0x04
248 #define BOOT_IMG_FLAGS_CPU_RID_MASK		0x3FF0
249 #define BOOT_IMG_FLAGS_CPU_RID_SHIFT		4
250 #define BOOT_IMG_FLAGS_MU_RID_MASK		0xFFC000
251 #define BOOT_IMG_FLAGS_MU_RID_SHIFT		14
252 #define BOOT_IMG_FLAGS_PARTITION_ID_MASK	0x1F000000
253 #define BOOT_IMG_FLAGS_PARTITION_ID_SHIFT	24
254 
255 /* Resource id used in scfw */
256 #define SC_R_A35_0		508
257 #define SC_R_A53_0		1
258 #define SC_R_A72_0		6
259 #define SC_R_MU_0A		213
260 #define SC_R_M4_0_PID0		278
261 #define SC_R_M4_0_MU_1A		297
262 #define SC_R_M4_1_PID0		298
263 #define SC_R_M4_1_MU_1A		317
264 #define PARTITION_ID_M4		0
265 #define PARTITION_ID_AP		1
266 
267 #define IMG_STACK_SIZE	32
268 
269 #define append(p, s, l) do { \
270 	memcpy((p), (uint8_t *)(s), (l)); (p) += (l); \
271 	} while (0)
272 
273 #endif
274