1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * The original I2C interface was 12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 13 * AIRVENT SAM s.p.a - RIMINI(ITALY) 14 * but has been changed substantially. 15 */ 16 17 #ifndef _I2C_H_ 18 #define _I2C_H_ 19 20 /* 21 * For now there are essentially two parts to this file - driver model 22 * here at the top, and the older code below (with CONFIG_SYS_I2C being 23 * most recent). The plan is to migrate everything to driver model. 24 * The driver model structures and API are separate as they are different 25 * enough as to be incompatible for compilation purposes. 26 */ 27 28 #ifdef CONFIG_DM_I2C 29 30 enum dm_i2c_chip_flags { 31 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ 32 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ 33 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ 34 }; 35 36 /** 37 * struct dm_i2c_chip - information about an i2c chip 38 * 39 * An I2C chip is a device on the I2C bus. It sits at a particular address 40 * and normally supports 7-bit or 10-bit addressing. 41 * 42 * To obtain this structure, use dev_get_parentdata(dev) where dev is the 43 * chip to examine. 44 * 45 * @chip_addr: Chip address on bus 46 * @offset_len: Length of offset in bytes. A single byte offset can 47 * represent up to 256 bytes. A value larger than 1 may be 48 * needed for larger devices. 49 * @flags: Flags for this chip (dm_i2c_chip_flags) 50 * @emul: Emulator for this chip address (only used for emulation) 51 */ 52 struct dm_i2c_chip { 53 uint chip_addr; 54 uint offset_len; 55 uint flags; 56 #ifdef CONFIG_SANDBOX 57 struct udevice *emul; 58 #endif 59 }; 60 61 /** 62 * struct dm_i2c_bus- information about an i2c bus 63 * 64 * An I2C bus contains 0 or more chips on it, each at its own address. The 65 * bus can operate at different speeds (measured in Hz, typically 100KHz 66 * or 400KHz). 67 * 68 * To obtain this structure, use bus->uclass_priv where bus is the I2C 69 * bus udevice. 70 * 71 * @speed_hz: Bus speed in hertz (typically 100000) 72 */ 73 struct dm_i2c_bus { 74 int speed_hz; 75 }; 76 77 /** 78 * dm_i2c_read() - read bytes from an I2C chip 79 * 80 * To obtain an I2C device (called a 'chip') given the I2C bus address you 81 * can use i2c_get_chip(). To obtain a bus by bus number use 82 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). 83 * 84 * To set the address length of a devce use i2c_set_addr_len(). It 85 * defaults to 1. 86 * 87 * @dev: Chip to read from 88 * @offset: Offset within chip to start reading 89 * @buffer: Place to put data 90 * @len: Number of bytes to read 91 * 92 * @return 0 on success, -ve on failure 93 */ 94 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len); 95 96 /** 97 * dm_i2c_write() - write bytes to an I2C chip 98 * 99 * See notes for dm_i2c_read() above. 100 * 101 * @dev: Chip to write to 102 * @offset: Offset within chip to start writing 103 * @buffer: Buffer containing data to write 104 * @len: Number of bytes to write 105 * 106 * @return 0 on success, -ve on failure 107 */ 108 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, 109 int len); 110 111 /** 112 * dm_i2c_probe() - probe a particular chip address 113 * 114 * This can be useful to check for the existence of a chip on the bus. 115 * It is typically implemented by writing the chip address to the bus 116 * and checking that the chip replies with an ACK. 117 * 118 * @bus: Bus to probe 119 * @chip_addr: 7-bit address to probe (10-bit and others are not supported) 120 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) 121 * @devp: Returns the device found, or NULL if none 122 * @return 0 if a chip was found at that address, -ve if not 123 */ 124 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 125 struct udevice **devp); 126 127 /** 128 * i2c_set_bus_speed() - set the speed of a bus 129 * 130 * @bus: Bus to adjust 131 * @speed: Requested speed in Hz 132 * @return 0 if OK, -EINVAL for invalid values 133 */ 134 int i2c_set_bus_speed(struct udevice *bus, unsigned int speed); 135 136 /** 137 * i2c_get_bus_speed() - get the speed of a bus 138 * 139 * @bus: Bus to check 140 * @return speed of selected I2C bus in Hz, -ve on error 141 */ 142 int i2c_get_bus_speed(struct udevice *bus); 143 144 /** 145 * i2c_set_chip_flags() - set flags for a chip 146 * 147 * Typically addresses are 7 bits, but for 10-bit addresses you should set 148 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. 149 * 150 * @dev: Chip to adjust 151 * @flags: New flags 152 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error 153 */ 154 int i2c_set_chip_flags(struct udevice *dev, uint flags); 155 156 /** 157 * i2c_get_chip_flags() - get flags for a chip 158 * 159 * @dev: Chip to check 160 * @flagsp: Place to put flags 161 * @return 0 if OK, other -ve value on error 162 */ 163 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); 164 165 /** 166 * i2c_set_offset_len() - set the offset length for a chip 167 * 168 * The offset used to access a chip may be up to 4 bytes long. Typically it 169 * is only 1 byte, which is enough for chips with 256 bytes of memory or 170 * registers. The default value is 1, but you can call this function to 171 * change it. 172 * 173 * @offset_len: New offset length value (typically 1 or 2) 174 */ 175 176 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); 177 /** 178 * i2c_deblock() - recover a bus that is in an unknown state 179 * 180 * See the deblock() method in 'struct dm_i2c_ops' for full information 181 * 182 * @bus: Bus to recover 183 * @return 0 if OK, -ve on error 184 */ 185 int i2c_deblock(struct udevice *bus); 186 187 /* 188 * Not all of these flags are implemented in the U-Boot API 189 */ 190 enum dm_i2c_msg_flags { 191 I2C_M_TEN = 0x0010, /* ten-bit chip address */ 192 I2C_M_RD = 0x0001, /* read data, from slave to master */ 193 I2C_M_STOP = 0x8000, /* send stop after this message */ 194 I2C_M_NOSTART = 0x4000, /* no start before this message */ 195 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ 196 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ 197 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ 198 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ 199 }; 200 201 /** 202 * struct i2c_msg - an I2C message 203 * 204 * @addr: Slave address 205 * @flags: Flags (see enum dm_i2c_msg_flags) 206 * @len: Length of buffer in bytes, may be 0 for a probe 207 * @buf: Buffer to send/receive, or NULL if no data 208 */ 209 struct i2c_msg { 210 uint addr; 211 uint flags; 212 uint len; 213 u8 *buf; 214 }; 215 216 /** 217 * struct i2c_msg_list - a list of I2C messages 218 * 219 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem 220 * appropriate in U-Boot. 221 * 222 * @msg: Pointer to i2c_msg array 223 * @nmsgs: Number of elements in the array 224 */ 225 struct i2c_msg_list { 226 struct i2c_msg *msgs; 227 uint nmsgs; 228 }; 229 230 /** 231 * struct dm_i2c_ops - driver operations for I2C uclass 232 * 233 * Drivers should support these operations unless otherwise noted. These 234 * operations are intended to be used by uclass code, not directly from 235 * other code. 236 */ 237 struct dm_i2c_ops { 238 /** 239 * xfer() - transfer a list of I2C messages 240 * 241 * @bus: Bus to read from 242 * @msg: List of messages to transfer 243 * @nmsgs: Number of messages in the list 244 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, 245 * -ECOMM if the speed cannot be supported, -EPROTO if the chip 246 * flags cannot be supported, other -ve value on some other error 247 */ 248 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); 249 250 /** 251 * probe_chip() - probe for the presense of a chip address 252 * 253 * This function is optional. If omitted, the uclass will send a zero 254 * length message instead. 255 * 256 * @bus: Bus to probe 257 * @chip_addr: Chip address to probe 258 * @chip_flags: Probe flags (enum dm_i2c_chip_flags) 259 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back 260 * to default probem other -ve value on error 261 */ 262 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); 263 264 /** 265 * set_bus_speed() - set the speed of a bus (optional) 266 * 267 * The bus speed value will be updated by the uclass if this function 268 * does not return an error. This method is optional - if it is not 269 * provided then the driver can read the speed from 270 * bus->uclass_priv->speed_hz 271 * 272 * @bus: Bus to adjust 273 * @speed: Requested speed in Hz 274 * @return 0 if OK, -EINVAL for invalid values 275 */ 276 int (*set_bus_speed)(struct udevice *bus, unsigned int speed); 277 278 /** 279 * get_bus_speed() - get the speed of a bus (optional) 280 * 281 * Normally this can be provided by the uclass, but if you want your 282 * driver to check the bus speed by looking at the hardware, you can 283 * implement that here. This method is optional. This method would 284 * normally be expected to return bus->uclass_priv->speed_hz. 285 * 286 * @bus: Bus to check 287 * @return speed of selected I2C bus in Hz, -ve on error 288 */ 289 int (*get_bus_speed)(struct udevice *bus); 290 291 /** 292 * set_flags() - set the flags for a chip (optional) 293 * 294 * This is generally implemented by the uclass, but drivers can 295 * check the value to ensure that unsupported options are not used. 296 * This method is optional. If provided, this method will always be 297 * called when the flags change. 298 * 299 * @dev: Chip to adjust 300 * @flags: New flags value 301 * @return 0 if OK, -EINVAL if value is unsupported 302 */ 303 int (*set_flags)(struct udevice *dev, uint flags); 304 305 /** 306 * deblock() - recover a bus that is in an unknown state 307 * 308 * I2C is a synchronous protocol and resets of the processor in the 309 * middle of an access can block the I2C Bus until a powerdown of 310 * the full unit is done. This is because slaves can be stuck 311 * waiting for addition bus transitions for a transaction that will 312 * never complete. Resetting the I2C master does not help. The only 313 * way is to force the bus through a series of transitions to make 314 * sure that all slaves are done with the transaction. This method 315 * performs this 'deblocking' if support by the driver. 316 * 317 * This method is optional. 318 */ 319 int (*deblock)(struct udevice *bus); 320 }; 321 322 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) 323 324 /** 325 * i2c_get_chip() - get a device to use to access a chip on a bus 326 * 327 * This returns the device for the given chip address. The device can then 328 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. 329 * 330 * @bus: Bus to examine 331 * @chip_addr: Chip address for the new device 332 * @devp: Returns pointer to new device if found or -ENODEV if not 333 * found 334 */ 335 int i2c_get_chip(struct udevice *bus, uint chip_addr, struct udevice **devp); 336 337 /** 338 * i2c_get_chip() - get a device to use to access a chip on a bus number 339 * 340 * This returns the device for the given chip address on a particular bus 341 * number. 342 * 343 * @busnum: Bus number to examine 344 * @chip_addr: Chip address for the new device 345 * @devp: Returns pointer to new device if found or -ENODEV if not 346 * found 347 */ 348 int i2c_get_chip_for_busnum(int busnum, int chip_addr, struct udevice **devp); 349 350 /** 351 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data 352 * 353 * This decodes the chip address from a device tree node and puts it into 354 * its dm_i2c_chip structure. This should be called in your driver's 355 * ofdata_to_platdata() method. 356 * 357 * @blob: Device tree blob 358 * @node: Node offset to read from 359 * @spi: Place to put the decoded information 360 */ 361 int i2c_chip_ofdata_to_platdata(const void *blob, int node, 362 struct dm_i2c_chip *chip); 363 364 #endif 365 366 #ifndef CONFIG_DM_I2C 367 368 /* 369 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 370 * 371 * The implementation MUST NOT use static or global variables if the 372 * I2C routines are used to read SDRAM configuration information 373 * because this is done before the memories are initialized. Limited 374 * use of stack-based variables are OK (the initial stack size is 375 * limited). 376 * 377 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 378 */ 379 380 /* 381 * Configuration items. 382 */ 383 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 384 385 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 386 /* no muxes used bus = i2c adapters */ 387 #define CONFIG_SYS_I2C_DIRECT_BUS 1 388 #define CONFIG_SYS_I2C_MAX_HOPS 0 389 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 390 #else 391 /* we use i2c muxes */ 392 #undef CONFIG_SYS_I2C_DIRECT_BUS 393 #endif 394 395 /* define the I2C bus number for RTC and DTT if not already done */ 396 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 397 #define CONFIG_SYS_RTC_BUS_NUM 0 398 #endif 399 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 400 #define CONFIG_SYS_DTT_BUS_NUM 0 401 #endif 402 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 403 #define CONFIG_SYS_SPD_BUS_NUM 0 404 #endif 405 406 struct i2c_adapter { 407 void (*init)(struct i2c_adapter *adap, int speed, 408 int slaveaddr); 409 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 410 int (*read)(struct i2c_adapter *adap, uint8_t chip, 411 uint addr, int alen, uint8_t *buffer, 412 int len); 413 int (*write)(struct i2c_adapter *adap, uint8_t chip, 414 uint addr, int alen, uint8_t *buffer, 415 int len); 416 uint (*set_bus_speed)(struct i2c_adapter *adap, 417 uint speed); 418 int speed; 419 int waitdelay; 420 int slaveaddr; 421 int init_done; 422 int hwadapnr; 423 char *name; 424 }; 425 426 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 427 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 428 { \ 429 .init = _init, \ 430 .probe = _probe, \ 431 .read = _read, \ 432 .write = _write, \ 433 .set_bus_speed = _set_speed, \ 434 .speed = _speed, \ 435 .slaveaddr = _slaveaddr, \ 436 .init_done = 0, \ 437 .hwadapnr = _hwadapnr, \ 438 .name = #_name \ 439 }; 440 441 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 442 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 443 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 444 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 445 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 446 447 struct i2c_adapter *i2c_get_adapter(int index); 448 449 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 450 struct i2c_mux { 451 int id; 452 char name[16]; 453 }; 454 455 struct i2c_next_hop { 456 struct i2c_mux mux; 457 uint8_t chip; 458 uint8_t channel; 459 }; 460 461 struct i2c_bus_hose { 462 int adapter; 463 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 464 }; 465 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 466 extern struct i2c_bus_hose i2c_bus[]; 467 468 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 469 #else 470 #define I2C_ADAPTER(bus) bus 471 #endif 472 #define I2C_BUS gd->cur_i2c_bus 473 474 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 475 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 476 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 477 478 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 479 #define I2C_MUX_PCA9540_ID 1 480 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 481 #define I2C_MUX_PCA9542_ID 2 482 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 483 #define I2C_MUX_PCA9544_ID 3 484 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 485 #define I2C_MUX_PCA9547_ID 4 486 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 487 #define I2C_MUX_PCA9548_ID 5 488 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 489 #endif 490 491 #ifndef I2C_SOFT_DECLARATIONS 492 # if defined(CONFIG_MPC8260) 493 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 494 # elif defined(CONFIG_8xx) 495 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 496 497 # elif (defined(CONFIG_AT91RM9200) || \ 498 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 499 defined(CONFIG_AT91SAM9263)) 500 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 501 # else 502 # define I2C_SOFT_DECLARATIONS 503 # endif 504 #endif 505 506 #ifdef CONFIG_8xx 507 /* Set default value for the I2C bus speed on 8xx. In the 508 * future, we'll define these in all 8xx board config files. 509 */ 510 #ifndef CONFIG_SYS_I2C_SPEED 511 #define CONFIG_SYS_I2C_SPEED 50000 512 #endif 513 #endif 514 515 /* 516 * Many boards/controllers/drivers don't support an I2C slave interface so 517 * provide a default slave address for them for use in common code. A real 518 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 519 * support a slave interface. 520 */ 521 #ifndef CONFIG_SYS_I2C_SLAVE 522 #define CONFIG_SYS_I2C_SLAVE 0xfe 523 #endif 524 525 /* 526 * Initialization, must be called once on start up, may be called 527 * repeatedly to change the speed and slave addresses. 528 */ 529 void i2c_init(int speed, int slaveaddr); 530 void i2c_init_board(void); 531 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 532 void i2c_board_late_init(void); 533 #endif 534 535 #ifdef CONFIG_SYS_I2C 536 /* 537 * i2c_get_bus_num: 538 * 539 * Returns index of currently active I2C bus. Zero-based. 540 */ 541 unsigned int i2c_get_bus_num(void); 542 543 /* 544 * i2c_set_bus_num: 545 * 546 * Change the active I2C bus. Subsequent read/write calls will 547 * go to this one. 548 * 549 * bus - bus index, zero based 550 * 551 * Returns: 0 on success, not 0 on failure 552 * 553 */ 554 int i2c_set_bus_num(unsigned int bus); 555 556 /* 557 * i2c_init_all(): 558 * 559 * Initializes all I2C adapters in the system. All i2c_adap structures must 560 * be initialized beforehead with function pointers and data, including 561 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 562 */ 563 void i2c_init_all(void); 564 565 /* 566 * Probe the given I2C chip address. Returns 0 if a chip responded, 567 * not 0 on failure. 568 */ 569 int i2c_probe(uint8_t chip); 570 571 /* 572 * Read/Write interface: 573 * chip: I2C chip address, range 0..127 574 * addr: Memory (register) address within the chip 575 * alen: Number of bytes to use for addr (typically 1, 2 for larger 576 * memories, 0 for register type devices with only one 577 * register) 578 * buffer: Where to read/write the data 579 * len: How many bytes to read/write 580 * 581 * Returns: 0 on success, not 0 on failure 582 */ 583 int i2c_read(uint8_t chip, unsigned int addr, int alen, 584 uint8_t *buffer, int len); 585 586 int i2c_write(uint8_t chip, unsigned int addr, int alen, 587 uint8_t *buffer, int len); 588 589 /* 590 * Utility routines to read/write registers. 591 */ 592 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 593 594 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 595 596 /* 597 * i2c_set_bus_speed: 598 * 599 * Change the speed of the active I2C bus 600 * 601 * speed - bus speed in Hz 602 * 603 * Returns: new bus speed 604 * 605 */ 606 unsigned int i2c_set_bus_speed(unsigned int speed); 607 608 /* 609 * i2c_get_bus_speed: 610 * 611 * Returns speed of currently active I2C bus in Hz 612 */ 613 614 unsigned int i2c_get_bus_speed(void); 615 616 /* 617 * i2c_reloc_fixup: 618 * 619 * Adjusts I2C pointers after U-Boot is relocated to DRAM 620 */ 621 void i2c_reloc_fixup(void); 622 #if defined(CONFIG_SYS_I2C_SOFT) 623 void i2c_soft_init(void); 624 void i2c_soft_active(void); 625 void i2c_soft_tristate(void); 626 int i2c_soft_read(void); 627 void i2c_soft_sda(int bit); 628 void i2c_soft_scl(int bit); 629 void i2c_soft_delay(void); 630 #endif 631 #else 632 633 /* 634 * Probe the given I2C chip address. Returns 0 if a chip responded, 635 * not 0 on failure. 636 */ 637 int i2c_probe(uchar chip); 638 639 /* 640 * Read/Write interface: 641 * chip: I2C chip address, range 0..127 642 * addr: Memory (register) address within the chip 643 * alen: Number of bytes to use for addr (typically 1, 2 for larger 644 * memories, 0 for register type devices with only one 645 * register) 646 * buffer: Where to read/write the data 647 * len: How many bytes to read/write 648 * 649 * Returns: 0 on success, not 0 on failure 650 */ 651 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 652 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 653 654 /* 655 * Utility routines to read/write registers. 656 */ 657 static inline u8 i2c_reg_read(u8 addr, u8 reg) 658 { 659 u8 buf; 660 661 #ifdef CONFIG_8xx 662 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 663 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 664 #endif 665 666 #ifdef DEBUG 667 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 668 #endif 669 670 i2c_read(addr, reg, 1, &buf, 1); 671 672 return buf; 673 } 674 675 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 676 { 677 #ifdef CONFIG_8xx 678 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 679 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 680 #endif 681 682 #ifdef DEBUG 683 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 684 __func__, addr, reg, val); 685 #endif 686 687 i2c_write(addr, reg, 1, &val, 1); 688 } 689 690 /* 691 * Functions for setting the current I2C bus and its speed 692 */ 693 694 /* 695 * i2c_set_bus_num: 696 * 697 * Change the active I2C bus. Subsequent read/write calls will 698 * go to this one. 699 * 700 * bus - bus index, zero based 701 * 702 * Returns: 0 on success, not 0 on failure 703 * 704 */ 705 int i2c_set_bus_num(unsigned int bus); 706 707 /* 708 * i2c_get_bus_num: 709 * 710 * Returns index of currently active I2C bus. Zero-based. 711 */ 712 713 unsigned int i2c_get_bus_num(void); 714 715 /* 716 * i2c_set_bus_speed: 717 * 718 * Change the speed of the active I2C bus 719 * 720 * speed - bus speed in Hz 721 * 722 * Returns: 0 on success, not 0 on failure 723 * 724 */ 725 int i2c_set_bus_speed(unsigned int); 726 727 /* 728 * i2c_get_bus_speed: 729 * 730 * Returns speed of currently active I2C bus in Hz 731 */ 732 733 unsigned int i2c_get_bus_speed(void); 734 #endif /* CONFIG_SYS_I2C */ 735 736 /* 737 * only for backwardcompatibility, should go away if we switched 738 * completely to new multibus support. 739 */ 740 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 741 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 742 # define CONFIG_SYS_MAX_I2C_BUS 2 743 # endif 744 # define I2C_MULTI_BUS 1 745 #else 746 # define CONFIG_SYS_MAX_I2C_BUS 1 747 # define I2C_MULTI_BUS 0 748 #endif 749 750 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 751 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 752 static inline unsigned int I2C_GET_BUS(void) 753 { 754 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 755 } 756 757 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 758 static inline void I2C_SET_BUS(unsigned int bus) 759 { 760 if (I2C_MULTI_BUS) 761 i2c_set_bus_num(bus); 762 } 763 764 /* Multi I2C definitions */ 765 enum { 766 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 767 I2C_8, I2C_9, I2C_10, 768 }; 769 770 /* Multi I2C busses handling */ 771 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 772 extern int get_multi_scl_pin(void); 773 extern int get_multi_sda_pin(void); 774 extern int multi_i2c_init(void); 775 #endif 776 777 /** 778 * Get FDT values for i2c bus. 779 * 780 * @param blob Device tree blbo 781 * @return the number of I2C bus 782 */ 783 void board_i2c_init(const void *blob); 784 785 /** 786 * Find the I2C bus number by given a FDT I2C node. 787 * 788 * @param blob Device tree blbo 789 * @param node FDT I2C node to find 790 * @return the number of I2C bus (zero based), or -1 on error 791 */ 792 int i2c_get_bus_num_fdt(int node); 793 794 /** 795 * Reset the I2C bus represented by the given a FDT I2C node. 796 * 797 * @param blob Device tree blbo 798 * @param node FDT I2C node to find 799 * @return 0 if port was reset, -1 if not found 800 */ 801 int i2c_reset_port_fdt(const void *blob, int node); 802 803 #endif /* !CONFIG_DM_I2C */ 804 805 #endif /* _I2C_H_ */ 806