1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * The original I2C interface was 12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 13 * AIRVENT SAM s.p.a - RIMINI(ITALY) 14 * but has been changed substantially. 15 */ 16 17 #ifndef _I2C_H_ 18 #define _I2C_H_ 19 20 /* 21 * For now there are essentially two parts to this file - driver model 22 * here at the top, and the older code below (with CONFIG_SYS_I2C being 23 * most recent). The plan is to migrate everything to driver model. 24 * The driver model structures and API are separate as they are different 25 * enough as to be incompatible for compilation purposes. 26 */ 27 28 enum dm_i2c_chip_flags { 29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ 30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ 31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ 32 }; 33 34 struct udevice; 35 /** 36 * struct dm_i2c_chip - information about an i2c chip 37 * 38 * An I2C chip is a device on the I2C bus. It sits at a particular address 39 * and normally supports 7-bit or 10-bit addressing. 40 * 41 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is 42 * the chip to examine. 43 * 44 * @chip_addr: Chip address on bus 45 * @offset_len: Length of offset in bytes. A single byte offset can 46 * represent up to 256 bytes. A value larger than 1 may be 47 * needed for larger devices. 48 * @flags: Flags for this chip (dm_i2c_chip_flags) 49 * @emul: Emulator for this chip address (only used for emulation) 50 */ 51 struct dm_i2c_chip { 52 uint chip_addr; 53 uint offset_len; 54 uint flags; 55 #ifdef CONFIG_SANDBOX 56 struct udevice *emul; 57 bool test_mode; 58 #endif 59 }; 60 61 /** 62 * struct dm_i2c_bus- information about an i2c bus 63 * 64 * An I2C bus contains 0 or more chips on it, each at its own address. The 65 * bus can operate at different speeds (measured in Hz, typically 100KHz 66 * or 400KHz). 67 * 68 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the 69 * I2C bus udevice. 70 * 71 * @speed_hz: Bus speed in hertz (typically 100000) 72 */ 73 struct dm_i2c_bus { 74 int speed_hz; 75 }; 76 77 /** 78 * dm_i2c_read() - read bytes from an I2C chip 79 * 80 * To obtain an I2C device (called a 'chip') given the I2C bus address you 81 * can use i2c_get_chip(). To obtain a bus by bus number use 82 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). 83 * 84 * To set the address length of a devce use i2c_set_addr_len(). It 85 * defaults to 1. 86 * 87 * @dev: Chip to read from 88 * @offset: Offset within chip to start reading 89 * @buffer: Place to put data 90 * @len: Number of bytes to read 91 * 92 * @return 0 on success, -ve on failure 93 */ 94 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len); 95 96 /** 97 * dm_i2c_write() - write bytes to an I2C chip 98 * 99 * See notes for dm_i2c_read() above. 100 * 101 * @dev: Chip to write to 102 * @offset: Offset within chip to start writing 103 * @buffer: Buffer containing data to write 104 * @len: Number of bytes to write 105 * 106 * @return 0 on success, -ve on failure 107 */ 108 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, 109 int len); 110 111 /** 112 * dm_i2c_probe() - probe a particular chip address 113 * 114 * This can be useful to check for the existence of a chip on the bus. 115 * It is typically implemented by writing the chip address to the bus 116 * and checking that the chip replies with an ACK. 117 * 118 * @bus: Bus to probe 119 * @chip_addr: 7-bit address to probe (10-bit and others are not supported) 120 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) 121 * @devp: Returns the device found, or NULL if none 122 * @return 0 if a chip was found at that address, -ve if not 123 */ 124 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 125 struct udevice **devp); 126 127 /** 128 * dm_i2c_reg_read() - Read a value from an I2C register 129 * 130 * This reads a single value from the given address in an I2C chip 131 * 132 * @addr: Address to read from 133 * @return value read, or -ve on error 134 */ 135 int dm_i2c_reg_read(struct udevice *dev, uint offset); 136 137 /** 138 * dm_i2c_reg_write() - Write a value to an I2C register 139 * 140 * This writes a single value to the given address in an I2C chip 141 * 142 * @addr: Address to write to 143 * @val: Value to write (normally a byte) 144 * @return 0 on success, -ve on error 145 */ 146 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val); 147 148 /** 149 * dm_i2c_set_bus_speed() - set the speed of a bus 150 * 151 * @bus: Bus to adjust 152 * @speed: Requested speed in Hz 153 * @return 0 if OK, -EINVAL for invalid values 154 */ 155 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed); 156 157 /** 158 * dm_i2c_get_bus_speed() - get the speed of a bus 159 * 160 * @bus: Bus to check 161 * @return speed of selected I2C bus in Hz, -ve on error 162 */ 163 int dm_i2c_get_bus_speed(struct udevice *bus); 164 165 /** 166 * i2c_set_chip_flags() - set flags for a chip 167 * 168 * Typically addresses are 7 bits, but for 10-bit addresses you should set 169 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. 170 * 171 * @dev: Chip to adjust 172 * @flags: New flags 173 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error 174 */ 175 int i2c_set_chip_flags(struct udevice *dev, uint flags); 176 177 /** 178 * i2c_get_chip_flags() - get flags for a chip 179 * 180 * @dev: Chip to check 181 * @flagsp: Place to put flags 182 * @return 0 if OK, other -ve value on error 183 */ 184 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); 185 186 /** 187 * i2c_set_offset_len() - set the offset length for a chip 188 * 189 * The offset used to access a chip may be up to 4 bytes long. Typically it 190 * is only 1 byte, which is enough for chips with 256 bytes of memory or 191 * registers. The default value is 1, but you can call this function to 192 * change it. 193 * 194 * @offset_len: New offset length value (typically 1 or 2) 195 */ 196 197 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); 198 /** 199 * i2c_deblock() - recover a bus that is in an unknown state 200 * 201 * See the deblock() method in 'struct dm_i2c_ops' for full information 202 * 203 * @bus: Bus to recover 204 * @return 0 if OK, -ve on error 205 */ 206 int i2c_deblock(struct udevice *bus); 207 208 #ifdef CONFIG_DM_I2C_COMPAT 209 /** 210 * i2c_probe() - Compatibility function for driver model 211 * 212 * Calls dm_i2c_probe() on the current bus 213 */ 214 int i2c_probe(uint8_t chip_addr); 215 216 /** 217 * i2c_read() - Compatibility function for driver model 218 * 219 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset 220 * set to @addr. @alen must match the current setting for the device. 221 */ 222 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 223 int len); 224 225 /** 226 * i2c_write() - Compatibility function for driver model 227 * 228 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset 229 * set to @addr. @alen must match the current setting for the device. 230 */ 231 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 232 int len); 233 234 /** 235 * i2c_get_bus_num_fdt() - Compatibility function for driver model 236 * 237 * @return the bus number associated with the given device tree node 238 */ 239 int i2c_get_bus_num_fdt(int node); 240 241 /** 242 * i2c_get_bus_num() - Compatibility function for driver model 243 * 244 * @return the 'current' bus number 245 */ 246 unsigned int i2c_get_bus_num(void); 247 248 /** 249 * i2c_set_bus_num() - Compatibility function for driver model 250 * 251 * Sets the 'current' bus 252 */ 253 int i2c_set_bus_num(unsigned int bus); 254 255 static inline void I2C_SET_BUS(unsigned int bus) 256 { 257 i2c_set_bus_num(bus); 258 } 259 260 static inline unsigned int I2C_GET_BUS(void) 261 { 262 return i2c_get_bus_num(); 263 } 264 265 /** 266 * i2c_init() - Compatibility function for driver model 267 * 268 * This function does nothing. 269 */ 270 void i2c_init(int speed, int slaveaddr); 271 272 /** 273 * board_i2c_init() - Compatibility function for driver model 274 * 275 * @param blob Device tree blbo 276 * @return the number of I2C bus 277 */ 278 void board_i2c_init(const void *blob); 279 280 #endif 281 282 /* 283 * Not all of these flags are implemented in the U-Boot API 284 */ 285 enum dm_i2c_msg_flags { 286 I2C_M_TEN = 0x0010, /* ten-bit chip address */ 287 I2C_M_RD = 0x0001, /* read data, from slave to master */ 288 I2C_M_STOP = 0x8000, /* send stop after this message */ 289 I2C_M_NOSTART = 0x4000, /* no start before this message */ 290 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ 291 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ 292 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ 293 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ 294 }; 295 296 /** 297 * struct i2c_msg - an I2C message 298 * 299 * @addr: Slave address 300 * @flags: Flags (see enum dm_i2c_msg_flags) 301 * @len: Length of buffer in bytes, may be 0 for a probe 302 * @buf: Buffer to send/receive, or NULL if no data 303 */ 304 struct i2c_msg { 305 uint addr; 306 uint flags; 307 uint len; 308 u8 *buf; 309 }; 310 311 /** 312 * struct i2c_msg_list - a list of I2C messages 313 * 314 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem 315 * appropriate in U-Boot. 316 * 317 * @msg: Pointer to i2c_msg array 318 * @nmsgs: Number of elements in the array 319 */ 320 struct i2c_msg_list { 321 struct i2c_msg *msgs; 322 uint nmsgs; 323 }; 324 325 /** 326 * struct dm_i2c_ops - driver operations for I2C uclass 327 * 328 * Drivers should support these operations unless otherwise noted. These 329 * operations are intended to be used by uclass code, not directly from 330 * other code. 331 */ 332 struct dm_i2c_ops { 333 /** 334 * xfer() - transfer a list of I2C messages 335 * 336 * @bus: Bus to read from 337 * @msg: List of messages to transfer 338 * @nmsgs: Number of messages in the list 339 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, 340 * -ECOMM if the speed cannot be supported, -EPROTO if the chip 341 * flags cannot be supported, other -ve value on some other error 342 */ 343 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); 344 345 /** 346 * probe_chip() - probe for the presense of a chip address 347 * 348 * This function is optional. If omitted, the uclass will send a zero 349 * length message instead. 350 * 351 * @bus: Bus to probe 352 * @chip_addr: Chip address to probe 353 * @chip_flags: Probe flags (enum dm_i2c_chip_flags) 354 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back 355 * to default probem other -ve value on error 356 */ 357 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); 358 359 /** 360 * set_bus_speed() - set the speed of a bus (optional) 361 * 362 * The bus speed value will be updated by the uclass if this function 363 * does not return an error. This method is optional - if it is not 364 * provided then the driver can read the speed from 365 * dev_get_uclass_priv(bus)->speed_hz 366 * 367 * @bus: Bus to adjust 368 * @speed: Requested speed in Hz 369 * @return 0 if OK, -EINVAL for invalid values 370 */ 371 int (*set_bus_speed)(struct udevice *bus, unsigned int speed); 372 373 /** 374 * get_bus_speed() - get the speed of a bus (optional) 375 * 376 * Normally this can be provided by the uclass, but if you want your 377 * driver to check the bus speed by looking at the hardware, you can 378 * implement that here. This method is optional. This method would 379 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz. 380 * 381 * @bus: Bus to check 382 * @return speed of selected I2C bus in Hz, -ve on error 383 */ 384 int (*get_bus_speed)(struct udevice *bus); 385 386 /** 387 * set_flags() - set the flags for a chip (optional) 388 * 389 * This is generally implemented by the uclass, but drivers can 390 * check the value to ensure that unsupported options are not used. 391 * This method is optional. If provided, this method will always be 392 * called when the flags change. 393 * 394 * @dev: Chip to adjust 395 * @flags: New flags value 396 * @return 0 if OK, -EINVAL if value is unsupported 397 */ 398 int (*set_flags)(struct udevice *dev, uint flags); 399 400 /** 401 * deblock() - recover a bus that is in an unknown state 402 * 403 * I2C is a synchronous protocol and resets of the processor in the 404 * middle of an access can block the I2C Bus until a powerdown of 405 * the full unit is done. This is because slaves can be stuck 406 * waiting for addition bus transitions for a transaction that will 407 * never complete. Resetting the I2C master does not help. The only 408 * way is to force the bus through a series of transitions to make 409 * sure that all slaves are done with the transaction. This method 410 * performs this 'deblocking' if support by the driver. 411 * 412 * This method is optional. 413 */ 414 int (*deblock)(struct udevice *bus); 415 }; 416 417 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) 418 419 /** 420 * i2c_get_chip() - get a device to use to access a chip on a bus 421 * 422 * This returns the device for the given chip address. The device can then 423 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. 424 * 425 * @bus: Bus to examine 426 * @chip_addr: Chip address for the new device 427 * @offset_len: Length of a register offset in bytes (normally 1) 428 * @devp: Returns pointer to new device if found or -ENODEV if not 429 * found 430 */ 431 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, 432 struct udevice **devp); 433 434 /** 435 * i2c_get_chip() - get a device to use to access a chip on a bus number 436 * 437 * This returns the device for the given chip address on a particular bus 438 * number. 439 * 440 * @busnum: Bus number to examine 441 * @chip_addr: Chip address for the new device 442 * @offset_len: Length of a register offset in bytes (normally 1) 443 * @devp: Returns pointer to new device if found or -ENODEV if not 444 * found 445 */ 446 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, 447 struct udevice **devp); 448 449 /** 450 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data 451 * 452 * This decodes the chip address from a device tree node and puts it into 453 * its dm_i2c_chip structure. This should be called in your driver's 454 * ofdata_to_platdata() method. 455 * 456 * @blob: Device tree blob 457 * @node: Node offset to read from 458 * @spi: Place to put the decoded information 459 */ 460 int i2c_chip_ofdata_to_platdata(const void *blob, int node, 461 struct dm_i2c_chip *chip); 462 463 #ifndef CONFIG_DM_I2C 464 465 /* 466 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 467 * 468 * The implementation MUST NOT use static or global variables if the 469 * I2C routines are used to read SDRAM configuration information 470 * because this is done before the memories are initialized. Limited 471 * use of stack-based variables are OK (the initial stack size is 472 * limited). 473 * 474 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 475 */ 476 477 /* 478 * Configuration items. 479 */ 480 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 481 482 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 483 /* no muxes used bus = i2c adapters */ 484 #define CONFIG_SYS_I2C_DIRECT_BUS 1 485 #define CONFIG_SYS_I2C_MAX_HOPS 0 486 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 487 #else 488 /* we use i2c muxes */ 489 #undef CONFIG_SYS_I2C_DIRECT_BUS 490 #endif 491 492 /* define the I2C bus number for RTC and DTT if not already done */ 493 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 494 #define CONFIG_SYS_RTC_BUS_NUM 0 495 #endif 496 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 497 #define CONFIG_SYS_DTT_BUS_NUM 0 498 #endif 499 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 500 #define CONFIG_SYS_SPD_BUS_NUM 0 501 #endif 502 503 struct i2c_adapter { 504 void (*init)(struct i2c_adapter *adap, int speed, 505 int slaveaddr); 506 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 507 int (*read)(struct i2c_adapter *adap, uint8_t chip, 508 uint addr, int alen, uint8_t *buffer, 509 int len); 510 int (*write)(struct i2c_adapter *adap, uint8_t chip, 511 uint addr, int alen, uint8_t *buffer, 512 int len); 513 uint (*set_bus_speed)(struct i2c_adapter *adap, 514 uint speed); 515 int speed; 516 int waitdelay; 517 int slaveaddr; 518 int init_done; 519 int hwadapnr; 520 char *name; 521 }; 522 523 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 524 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 525 { \ 526 .init = _init, \ 527 .probe = _probe, \ 528 .read = _read, \ 529 .write = _write, \ 530 .set_bus_speed = _set_speed, \ 531 .speed = _speed, \ 532 .slaveaddr = _slaveaddr, \ 533 .init_done = 0, \ 534 .hwadapnr = _hwadapnr, \ 535 .name = #_name \ 536 }; 537 538 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 539 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 540 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 541 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 542 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 543 544 struct i2c_adapter *i2c_get_adapter(int index); 545 546 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 547 struct i2c_mux { 548 int id; 549 char name[16]; 550 }; 551 552 struct i2c_next_hop { 553 struct i2c_mux mux; 554 uint8_t chip; 555 uint8_t channel; 556 }; 557 558 struct i2c_bus_hose { 559 int adapter; 560 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 561 }; 562 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 563 extern struct i2c_bus_hose i2c_bus[]; 564 565 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 566 #else 567 #define I2C_ADAPTER(bus) bus 568 #endif 569 #define I2C_BUS gd->cur_i2c_bus 570 571 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 572 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 573 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 574 575 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 576 #define I2C_MUX_PCA9540_ID 1 577 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 578 #define I2C_MUX_PCA9542_ID 2 579 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 580 #define I2C_MUX_PCA9544_ID 3 581 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 582 #define I2C_MUX_PCA9547_ID 4 583 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 584 #define I2C_MUX_PCA9548_ID 5 585 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 586 #endif 587 588 #ifndef I2C_SOFT_DECLARATIONS 589 # if defined(CONFIG_MPC8260) 590 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 591 # elif defined(CONFIG_8xx) 592 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 593 594 # elif (defined(CONFIG_AT91RM9200) || \ 595 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 596 defined(CONFIG_AT91SAM9263)) 597 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 598 # else 599 # define I2C_SOFT_DECLARATIONS 600 # endif 601 #endif 602 603 #ifdef CONFIG_8xx 604 /* Set default value for the I2C bus speed on 8xx. In the 605 * future, we'll define these in all 8xx board config files. 606 */ 607 #ifndef CONFIG_SYS_I2C_SPEED 608 #define CONFIG_SYS_I2C_SPEED 50000 609 #endif 610 #endif 611 612 /* 613 * Many boards/controllers/drivers don't support an I2C slave interface so 614 * provide a default slave address for them for use in common code. A real 615 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 616 * support a slave interface. 617 */ 618 #ifndef CONFIG_SYS_I2C_SLAVE 619 #define CONFIG_SYS_I2C_SLAVE 0xfe 620 #endif 621 622 /* 623 * Initialization, must be called once on start up, may be called 624 * repeatedly to change the speed and slave addresses. 625 */ 626 void i2c_init(int speed, int slaveaddr); 627 void i2c_init_board(void); 628 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 629 void i2c_board_late_init(void); 630 #endif 631 632 #ifdef CONFIG_SYS_I2C 633 /* 634 * i2c_get_bus_num: 635 * 636 * Returns index of currently active I2C bus. Zero-based. 637 */ 638 unsigned int i2c_get_bus_num(void); 639 640 /* 641 * i2c_set_bus_num: 642 * 643 * Change the active I2C bus. Subsequent read/write calls will 644 * go to this one. 645 * 646 * bus - bus index, zero based 647 * 648 * Returns: 0 on success, not 0 on failure 649 * 650 */ 651 int i2c_set_bus_num(unsigned int bus); 652 653 /* 654 * i2c_init_all(): 655 * 656 * Initializes all I2C adapters in the system. All i2c_adap structures must 657 * be initialized beforehead with function pointers and data, including 658 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 659 */ 660 void i2c_init_all(void); 661 662 /* 663 * Probe the given I2C chip address. Returns 0 if a chip responded, 664 * not 0 on failure. 665 */ 666 int i2c_probe(uint8_t chip); 667 668 /* 669 * Read/Write interface: 670 * chip: I2C chip address, range 0..127 671 * addr: Memory (register) address within the chip 672 * alen: Number of bytes to use for addr (typically 1, 2 for larger 673 * memories, 0 for register type devices with only one 674 * register) 675 * buffer: Where to read/write the data 676 * len: How many bytes to read/write 677 * 678 * Returns: 0 on success, not 0 on failure 679 */ 680 int i2c_read(uint8_t chip, unsigned int addr, int alen, 681 uint8_t *buffer, int len); 682 683 int i2c_write(uint8_t chip, unsigned int addr, int alen, 684 uint8_t *buffer, int len); 685 686 /* 687 * Utility routines to read/write registers. 688 */ 689 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 690 691 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 692 693 /* 694 * i2c_set_bus_speed: 695 * 696 * Change the speed of the active I2C bus 697 * 698 * speed - bus speed in Hz 699 * 700 * Returns: new bus speed 701 * 702 */ 703 unsigned int i2c_set_bus_speed(unsigned int speed); 704 705 /* 706 * i2c_get_bus_speed: 707 * 708 * Returns speed of currently active I2C bus in Hz 709 */ 710 711 unsigned int i2c_get_bus_speed(void); 712 713 /* 714 * i2c_reloc_fixup: 715 * 716 * Adjusts I2C pointers after U-Boot is relocated to DRAM 717 */ 718 void i2c_reloc_fixup(void); 719 #if defined(CONFIG_SYS_I2C_SOFT) 720 void i2c_soft_init(void); 721 void i2c_soft_active(void); 722 void i2c_soft_tristate(void); 723 int i2c_soft_read(void); 724 void i2c_soft_sda(int bit); 725 void i2c_soft_scl(int bit); 726 void i2c_soft_delay(void); 727 #endif 728 #else 729 730 /* 731 * Probe the given I2C chip address. Returns 0 if a chip responded, 732 * not 0 on failure. 733 */ 734 int i2c_probe(uchar chip); 735 736 /* 737 * Read/Write interface: 738 * chip: I2C chip address, range 0..127 739 * addr: Memory (register) address within the chip 740 * alen: Number of bytes to use for addr (typically 1, 2 for larger 741 * memories, 0 for register type devices with only one 742 * register) 743 * buffer: Where to read/write the data 744 * len: How many bytes to read/write 745 * 746 * Returns: 0 on success, not 0 on failure 747 */ 748 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 749 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 750 751 /* 752 * Utility routines to read/write registers. 753 */ 754 static inline u8 i2c_reg_read(u8 addr, u8 reg) 755 { 756 u8 buf; 757 758 #ifdef CONFIG_8xx 759 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 760 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 761 #endif 762 763 #ifdef DEBUG 764 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 765 #endif 766 767 i2c_read(addr, reg, 1, &buf, 1); 768 769 return buf; 770 } 771 772 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 773 { 774 #ifdef CONFIG_8xx 775 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 776 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 777 #endif 778 779 #ifdef DEBUG 780 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 781 __func__, addr, reg, val); 782 #endif 783 784 i2c_write(addr, reg, 1, &val, 1); 785 } 786 787 /* 788 * Functions for setting the current I2C bus and its speed 789 */ 790 791 /* 792 * i2c_set_bus_num: 793 * 794 * Change the active I2C bus. Subsequent read/write calls will 795 * go to this one. 796 * 797 * bus - bus index, zero based 798 * 799 * Returns: 0 on success, not 0 on failure 800 * 801 */ 802 int i2c_set_bus_num(unsigned int bus); 803 804 /* 805 * i2c_get_bus_num: 806 * 807 * Returns index of currently active I2C bus. Zero-based. 808 */ 809 810 unsigned int i2c_get_bus_num(void); 811 812 /* 813 * i2c_set_bus_speed: 814 * 815 * Change the speed of the active I2C bus 816 * 817 * speed - bus speed in Hz 818 * 819 * Returns: 0 on success, not 0 on failure 820 * 821 */ 822 int i2c_set_bus_speed(unsigned int); 823 824 /* 825 * i2c_get_bus_speed: 826 * 827 * Returns speed of currently active I2C bus in Hz 828 */ 829 830 unsigned int i2c_get_bus_speed(void); 831 #endif /* CONFIG_SYS_I2C */ 832 833 /* 834 * only for backwardcompatibility, should go away if we switched 835 * completely to new multibus support. 836 */ 837 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 838 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 839 # define CONFIG_SYS_MAX_I2C_BUS 2 840 # endif 841 # define I2C_MULTI_BUS 1 842 #else 843 # define CONFIG_SYS_MAX_I2C_BUS 1 844 # define I2C_MULTI_BUS 0 845 #endif 846 847 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 848 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 849 static inline unsigned int I2C_GET_BUS(void) 850 { 851 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 852 } 853 854 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 855 static inline void I2C_SET_BUS(unsigned int bus) 856 { 857 if (I2C_MULTI_BUS) 858 i2c_set_bus_num(bus); 859 } 860 861 /* Multi I2C definitions */ 862 enum { 863 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 864 I2C_8, I2C_9, I2C_10, 865 }; 866 867 /* Multi I2C busses handling */ 868 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 869 extern int get_multi_scl_pin(void); 870 extern int get_multi_sda_pin(void); 871 extern int multi_i2c_init(void); 872 #endif 873 874 /** 875 * Get FDT values for i2c bus. 876 * 877 * @param blob Device tree blbo 878 * @return the number of I2C bus 879 */ 880 void board_i2c_init(const void *blob); 881 882 /** 883 * Find the I2C bus number by given a FDT I2C node. 884 * 885 * @param blob Device tree blbo 886 * @param node FDT I2C node to find 887 * @return the number of I2C bus (zero based), or -1 on error 888 */ 889 int i2c_get_bus_num_fdt(int node); 890 891 /** 892 * Reset the I2C bus represented by the given a FDT I2C node. 893 * 894 * @param blob Device tree blbo 895 * @param node FDT I2C node to find 896 * @return 0 if port was reset, -1 if not found 897 */ 898 int i2c_reset_port_fdt(const void *blob, int node); 899 900 #endif /* !CONFIG_DM_I2C */ 901 902 #endif /* _I2C_H_ */ 903