1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 5 * Changes for multibus/multiadapter I2C support. 6 * 7 * (C) Copyright 2001 8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 9 * 10 * The original I2C interface was 11 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 12 * AIRVENT SAM s.p.a - RIMINI(ITALY) 13 * but has been changed substantially. 14 */ 15 16 #ifndef _I2C_H_ 17 #define _I2C_H_ 18 19 /* 20 * For now there are essentially two parts to this file - driver model 21 * here at the top, and the older code below (with CONFIG_SYS_I2C being 22 * most recent). The plan is to migrate everything to driver model. 23 * The driver model structures and API are separate as they are different 24 * enough as to be incompatible for compilation purposes. 25 */ 26 27 enum dm_i2c_chip_flags { 28 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ 29 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ 30 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ 31 }; 32 33 struct udevice; 34 /** 35 * struct dm_i2c_chip - information about an i2c chip 36 * 37 * An I2C chip is a device on the I2C bus. It sits at a particular address 38 * and normally supports 7-bit or 10-bit addressing. 39 * 40 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is 41 * the chip to examine. 42 * 43 * @chip_addr: Chip address on bus 44 * @offset_len: Length of offset in bytes. A single byte offset can 45 * represent up to 256 bytes. A value larger than 1 may be 46 * needed for larger devices. 47 * @flags: Flags for this chip (dm_i2c_chip_flags) 48 * @emul: Emulator for this chip address (only used for emulation) 49 */ 50 struct dm_i2c_chip { 51 uint chip_addr; 52 uint offset_len; 53 uint flags; 54 #ifdef CONFIG_SANDBOX 55 struct udevice *emul; 56 bool test_mode; 57 #endif 58 }; 59 60 /** 61 * struct dm_i2c_bus- information about an i2c bus 62 * 63 * An I2C bus contains 0 or more chips on it, each at its own address. The 64 * bus can operate at different speeds (measured in Hz, typically 100KHz 65 * or 400KHz). 66 * 67 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the 68 * I2C bus udevice. 69 * 70 * @speed_hz: Bus speed in hertz (typically 100000) 71 */ 72 struct dm_i2c_bus { 73 int speed_hz; 74 }; 75 76 /* 77 * Not all of these flags are implemented in the U-Boot API 78 */ 79 enum dm_i2c_msg_flags { 80 I2C_M_TEN = 0x0010, /* ten-bit chip address */ 81 I2C_M_RD = 0x0001, /* read data, from slave to master */ 82 I2C_M_STOP = 0x8000, /* send stop after this message */ 83 I2C_M_NOSTART = 0x4000, /* no start before this message */ 84 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ 85 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ 86 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ 87 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ 88 }; 89 90 /** 91 * struct i2c_msg - an I2C message 92 * 93 * @addr: Slave address 94 * @flags: Flags (see enum dm_i2c_msg_flags) 95 * @len: Length of buffer in bytes, may be 0 for a probe 96 * @buf: Buffer to send/receive, or NULL if no data 97 */ 98 struct i2c_msg { 99 uint addr; 100 uint flags; 101 uint len; 102 u8 *buf; 103 }; 104 105 /** 106 * struct i2c_msg_list - a list of I2C messages 107 * 108 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem 109 * appropriate in U-Boot. 110 * 111 * @msg: Pointer to i2c_msg array 112 * @nmsgs: Number of elements in the array 113 */ 114 struct i2c_msg_list { 115 struct i2c_msg *msgs; 116 uint nmsgs; 117 }; 118 119 /** 120 * dm_i2c_read() - read bytes from an I2C chip 121 * 122 * To obtain an I2C device (called a 'chip') given the I2C bus address you 123 * can use i2c_get_chip(). To obtain a bus by bus number use 124 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). 125 * 126 * To set the address length of a devce use i2c_set_addr_len(). It 127 * defaults to 1. 128 * 129 * @dev: Chip to read from 130 * @offset: Offset within chip to start reading 131 * @buffer: Place to put data 132 * @len: Number of bytes to read 133 * 134 * @return 0 on success, -ve on failure 135 */ 136 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len); 137 138 /** 139 * dm_i2c_write() - write bytes to an I2C chip 140 * 141 * See notes for dm_i2c_read() above. 142 * 143 * @dev: Chip to write to 144 * @offset: Offset within chip to start writing 145 * @buffer: Buffer containing data to write 146 * @len: Number of bytes to write 147 * 148 * @return 0 on success, -ve on failure 149 */ 150 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, 151 int len); 152 153 /** 154 * dm_i2c_probe() - probe a particular chip address 155 * 156 * This can be useful to check for the existence of a chip on the bus. 157 * It is typically implemented by writing the chip address to the bus 158 * and checking that the chip replies with an ACK. 159 * 160 * @bus: Bus to probe 161 * @chip_addr: 7-bit address to probe (10-bit and others are not supported) 162 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) 163 * @devp: Returns the device found, or NULL if none 164 * @return 0 if a chip was found at that address, -ve if not 165 */ 166 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 167 struct udevice **devp); 168 169 /** 170 * dm_i2c_reg_read() - Read a value from an I2C register 171 * 172 * This reads a single value from the given address in an I2C chip 173 * 174 * @dev: Device to use for transfer 175 * @addr: Address to read from 176 * @return value read, or -ve on error 177 */ 178 int dm_i2c_reg_read(struct udevice *dev, uint offset); 179 180 /** 181 * dm_i2c_reg_write() - Write a value to an I2C register 182 * 183 * This writes a single value to the given address in an I2C chip 184 * 185 * @dev: Device to use for transfer 186 * @addr: Address to write to 187 * @val: Value to write (normally a byte) 188 * @return 0 on success, -ve on error 189 */ 190 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val); 191 192 /** 193 * dm_i2c_xfer() - Transfer messages over I2C 194 * 195 * This transfers a raw message. It is best to use dm_i2c_reg_read/write() 196 * instead. 197 * 198 * @dev: Device to use for transfer 199 * @msg: List of messages to transfer 200 * @nmsgs: Number of messages to transfer 201 * @return 0 on success, -ve on error 202 */ 203 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs); 204 205 /** 206 * dm_i2c_set_bus_speed() - set the speed of a bus 207 * 208 * @bus: Bus to adjust 209 * @speed: Requested speed in Hz 210 * @return 0 if OK, -EINVAL for invalid values 211 */ 212 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed); 213 214 /** 215 * dm_i2c_get_bus_speed() - get the speed of a bus 216 * 217 * @bus: Bus to check 218 * @return speed of selected I2C bus in Hz, -ve on error 219 */ 220 int dm_i2c_get_bus_speed(struct udevice *bus); 221 222 /** 223 * i2c_set_chip_flags() - set flags for a chip 224 * 225 * Typically addresses are 7 bits, but for 10-bit addresses you should set 226 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. 227 * 228 * @dev: Chip to adjust 229 * @flags: New flags 230 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error 231 */ 232 int i2c_set_chip_flags(struct udevice *dev, uint flags); 233 234 /** 235 * i2c_get_chip_flags() - get flags for a chip 236 * 237 * @dev: Chip to check 238 * @flagsp: Place to put flags 239 * @return 0 if OK, other -ve value on error 240 */ 241 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); 242 243 /** 244 * i2c_set_offset_len() - set the offset length for a chip 245 * 246 * The offset used to access a chip may be up to 4 bytes long. Typically it 247 * is only 1 byte, which is enough for chips with 256 bytes of memory or 248 * registers. The default value is 1, but you can call this function to 249 * change it. 250 * 251 * @offset_len: New offset length value (typically 1 or 2) 252 */ 253 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); 254 255 /** 256 * i2c_get_offset_len() - get the offset length for a chip 257 * 258 * @return: Current offset length value (typically 1 or 2) 259 */ 260 int i2c_get_chip_offset_len(struct udevice *dev); 261 262 /** 263 * i2c_deblock() - recover a bus that is in an unknown state 264 * 265 * See the deblock() method in 'struct dm_i2c_ops' for full information 266 * 267 * @bus: Bus to recover 268 * @return 0 if OK, -ve on error 269 */ 270 int i2c_deblock(struct udevice *bus); 271 272 #ifdef CONFIG_DM_I2C_COMPAT 273 /** 274 * i2c_probe() - Compatibility function for driver model 275 * 276 * Calls dm_i2c_probe() on the current bus 277 */ 278 int i2c_probe(uint8_t chip_addr); 279 280 /** 281 * i2c_read() - Compatibility function for driver model 282 * 283 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset 284 * set to @addr. @alen must match the current setting for the device. 285 */ 286 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 287 int len); 288 289 /** 290 * i2c_write() - Compatibility function for driver model 291 * 292 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset 293 * set to @addr. @alen must match the current setting for the device. 294 */ 295 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 296 int len); 297 298 /** 299 * i2c_get_bus_num_fdt() - Compatibility function for driver model 300 * 301 * @return the bus number associated with the given device tree node 302 */ 303 int i2c_get_bus_num_fdt(int node); 304 305 /** 306 * i2c_get_bus_num() - Compatibility function for driver model 307 * 308 * @return the 'current' bus number 309 */ 310 unsigned int i2c_get_bus_num(void); 311 312 /** 313 * i2c_set_bus_num() - Compatibility function for driver model 314 * 315 * Sets the 'current' bus 316 */ 317 int i2c_set_bus_num(unsigned int bus); 318 319 static inline void I2C_SET_BUS(unsigned int bus) 320 { 321 i2c_set_bus_num(bus); 322 } 323 324 static inline unsigned int I2C_GET_BUS(void) 325 { 326 return i2c_get_bus_num(); 327 } 328 329 /** 330 * i2c_init() - Compatibility function for driver model 331 * 332 * This function does nothing. 333 */ 334 void i2c_init(int speed, int slaveaddr); 335 336 /** 337 * board_i2c_init() - Compatibility function for driver model 338 * 339 * @param blob Device tree blbo 340 * @return the number of I2C bus 341 */ 342 void board_i2c_init(const void *blob); 343 344 /* 345 * Compatibility functions for driver model. 346 */ 347 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 348 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 349 350 #endif 351 352 /** 353 * struct dm_i2c_ops - driver operations for I2C uclass 354 * 355 * Drivers should support these operations unless otherwise noted. These 356 * operations are intended to be used by uclass code, not directly from 357 * other code. 358 */ 359 struct dm_i2c_ops { 360 /** 361 * xfer() - transfer a list of I2C messages 362 * 363 * @bus: Bus to read from 364 * @msg: List of messages to transfer 365 * @nmsgs: Number of messages in the list 366 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, 367 * -ECOMM if the speed cannot be supported, -EPROTO if the chip 368 * flags cannot be supported, other -ve value on some other error 369 */ 370 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); 371 372 /** 373 * probe_chip() - probe for the presense of a chip address 374 * 375 * This function is optional. If omitted, the uclass will send a zero 376 * length message instead. 377 * 378 * @bus: Bus to probe 379 * @chip_addr: Chip address to probe 380 * @chip_flags: Probe flags (enum dm_i2c_chip_flags) 381 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back 382 * to default probem other -ve value on error 383 */ 384 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); 385 386 /** 387 * set_bus_speed() - set the speed of a bus (optional) 388 * 389 * The bus speed value will be updated by the uclass if this function 390 * does not return an error. This method is optional - if it is not 391 * provided then the driver can read the speed from 392 * dev_get_uclass_priv(bus)->speed_hz 393 * 394 * @bus: Bus to adjust 395 * @speed: Requested speed in Hz 396 * @return 0 if OK, -EINVAL for invalid values 397 */ 398 int (*set_bus_speed)(struct udevice *bus, unsigned int speed); 399 400 /** 401 * get_bus_speed() - get the speed of a bus (optional) 402 * 403 * Normally this can be provided by the uclass, but if you want your 404 * driver to check the bus speed by looking at the hardware, you can 405 * implement that here. This method is optional. This method would 406 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz. 407 * 408 * @bus: Bus to check 409 * @return speed of selected I2C bus in Hz, -ve on error 410 */ 411 int (*get_bus_speed)(struct udevice *bus); 412 413 /** 414 * set_flags() - set the flags for a chip (optional) 415 * 416 * This is generally implemented by the uclass, but drivers can 417 * check the value to ensure that unsupported options are not used. 418 * This method is optional. If provided, this method will always be 419 * called when the flags change. 420 * 421 * @dev: Chip to adjust 422 * @flags: New flags value 423 * @return 0 if OK, -EINVAL if value is unsupported 424 */ 425 int (*set_flags)(struct udevice *dev, uint flags); 426 427 /** 428 * deblock() - recover a bus that is in an unknown state 429 * 430 * I2C is a synchronous protocol and resets of the processor in the 431 * middle of an access can block the I2C Bus until a powerdown of 432 * the full unit is done. This is because slaves can be stuck 433 * waiting for addition bus transitions for a transaction that will 434 * never complete. Resetting the I2C master does not help. The only 435 * way is to force the bus through a series of transitions to make 436 * sure that all slaves are done with the transaction. This method 437 * performs this 'deblocking' if support by the driver. 438 * 439 * This method is optional. 440 */ 441 int (*deblock)(struct udevice *bus); 442 }; 443 444 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) 445 446 /** 447 * struct i2c_mux_ops - operations for an I2C mux 448 * 449 * The current mux state is expected to be stored in the mux itself since 450 * it is the only thing that knows how to make things work. The mux can 451 * record the current state and then avoid switching unless it is necessary. 452 * So select() can be skipped if the mux is already in the correct state. 453 * Also deselect() can be made a nop if required. 454 */ 455 struct i2c_mux_ops { 456 /** 457 * select() - select one of of I2C buses attached to a mux 458 * 459 * This will be called when there is no bus currently selected by the 460 * mux. This method does not need to deselect the old bus since 461 * deselect() will be already have been called if necessary. 462 * 463 * @mux: Mux device 464 * @bus: I2C bus to select 465 * @channel: Channel number correponding to the bus to select 466 * @return 0 if OK, -ve on error 467 */ 468 int (*select)(struct udevice *mux, struct udevice *bus, uint channel); 469 470 /** 471 * deselect() - select one of of I2C buses attached to a mux 472 * 473 * This is used to deselect the currently selected I2C bus. 474 * 475 * @mux: Mux device 476 * @bus: I2C bus to deselect 477 * @channel: Channel number correponding to the bus to deselect 478 * @return 0 if OK, -ve on error 479 */ 480 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel); 481 }; 482 483 #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops) 484 485 /** 486 * i2c_get_chip() - get a device to use to access a chip on a bus 487 * 488 * This returns the device for the given chip address. The device can then 489 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. 490 * 491 * @bus: Bus to examine 492 * @chip_addr: Chip address for the new device 493 * @offset_len: Length of a register offset in bytes (normally 1) 494 * @devp: Returns pointer to new device if found or -ENODEV if not 495 * found 496 */ 497 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, 498 struct udevice **devp); 499 500 /** 501 * i2c_get_chip_for_busnum() - get a device to use to access a chip on 502 * a bus number 503 * 504 * This returns the device for the given chip address on a particular bus 505 * number. 506 * 507 * @busnum: Bus number to examine 508 * @chip_addr: Chip address for the new device 509 * @offset_len: Length of a register offset in bytes (normally 1) 510 * @devp: Returns pointer to new device if found or -ENODEV if not 511 * found 512 */ 513 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, 514 struct udevice **devp); 515 516 /** 517 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data 518 * 519 * This decodes the chip address from a device tree node and puts it into 520 * its dm_i2c_chip structure. This should be called in your driver's 521 * ofdata_to_platdata() method. 522 * 523 * @blob: Device tree blob 524 * @node: Node offset to read from 525 * @spi: Place to put the decoded information 526 */ 527 int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip); 528 529 /** 530 * i2c_dump_msgs() - Dump a list of I2C messages 531 * 532 * This may be useful for debugging. 533 * 534 * @msg: Message list to dump 535 * @nmsgs: Number of messages 536 */ 537 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs); 538 539 #ifndef CONFIG_DM_I2C 540 541 /* 542 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 543 * 544 * The implementation MUST NOT use static or global variables if the 545 * I2C routines are used to read SDRAM configuration information 546 * because this is done before the memories are initialized. Limited 547 * use of stack-based variables are OK (the initial stack size is 548 * limited). 549 * 550 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 551 */ 552 553 /* 554 * Configuration items. 555 */ 556 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 557 558 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 559 /* no muxes used bus = i2c adapters */ 560 #define CONFIG_SYS_I2C_DIRECT_BUS 1 561 #define CONFIG_SYS_I2C_MAX_HOPS 0 562 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 563 #else 564 /* we use i2c muxes */ 565 #undef CONFIG_SYS_I2C_DIRECT_BUS 566 #endif 567 568 /* define the I2C bus number for RTC and DTT if not already done */ 569 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 570 #define CONFIG_SYS_RTC_BUS_NUM 0 571 #endif 572 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 573 #define CONFIG_SYS_SPD_BUS_NUM 0 574 #endif 575 576 struct i2c_adapter { 577 void (*init)(struct i2c_adapter *adap, int speed, 578 int slaveaddr); 579 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 580 int (*read)(struct i2c_adapter *adap, uint8_t chip, 581 uint addr, int alen, uint8_t *buffer, 582 int len); 583 int (*write)(struct i2c_adapter *adap, uint8_t chip, 584 uint addr, int alen, uint8_t *buffer, 585 int len); 586 uint (*set_bus_speed)(struct i2c_adapter *adap, 587 uint speed); 588 int speed; 589 int waitdelay; 590 int slaveaddr; 591 int init_done; 592 int hwadapnr; 593 char *name; 594 }; 595 596 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 597 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 598 { \ 599 .init = _init, \ 600 .probe = _probe, \ 601 .read = _read, \ 602 .write = _write, \ 603 .set_bus_speed = _set_speed, \ 604 .speed = _speed, \ 605 .slaveaddr = _slaveaddr, \ 606 .init_done = 0, \ 607 .hwadapnr = _hwadapnr, \ 608 .name = #_name \ 609 }; 610 611 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 612 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 613 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 614 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 615 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 616 617 struct i2c_adapter *i2c_get_adapter(int index); 618 619 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 620 struct i2c_mux { 621 int id; 622 char name[16]; 623 }; 624 625 struct i2c_next_hop { 626 struct i2c_mux mux; 627 uint8_t chip; 628 uint8_t channel; 629 }; 630 631 struct i2c_bus_hose { 632 int adapter; 633 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 634 }; 635 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 636 extern struct i2c_bus_hose i2c_bus[]; 637 638 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 639 #else 640 #define I2C_ADAPTER(bus) bus 641 #endif 642 #define I2C_BUS gd->cur_i2c_bus 643 644 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 645 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 646 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 647 648 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 649 #define I2C_MUX_PCA9540_ID 1 650 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 651 #define I2C_MUX_PCA9542_ID 2 652 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 653 #define I2C_MUX_PCA9544_ID 3 654 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 655 #define I2C_MUX_PCA9547_ID 4 656 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 657 #define I2C_MUX_PCA9548_ID 5 658 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 659 #endif 660 661 #ifndef I2C_SOFT_DECLARATIONS 662 # if (defined(CONFIG_AT91RM9200) || \ 663 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 664 defined(CONFIG_AT91SAM9263)) 665 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 666 # else 667 # define I2C_SOFT_DECLARATIONS 668 # endif 669 #endif 670 671 /* 672 * Many boards/controllers/drivers don't support an I2C slave interface so 673 * provide a default slave address for them for use in common code. A real 674 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 675 * support a slave interface. 676 */ 677 #ifndef CONFIG_SYS_I2C_SLAVE 678 #define CONFIG_SYS_I2C_SLAVE 0xfe 679 #endif 680 681 /* 682 * Initialization, must be called once on start up, may be called 683 * repeatedly to change the speed and slave addresses. 684 */ 685 #ifdef CONFIG_SYS_I2C_EARLY_INIT 686 void i2c_early_init_f(void); 687 #endif 688 void i2c_init(int speed, int slaveaddr); 689 void i2c_init_board(void); 690 691 #ifdef CONFIG_SYS_I2C 692 /* 693 * i2c_get_bus_num: 694 * 695 * Returns index of currently active I2C bus. Zero-based. 696 */ 697 unsigned int i2c_get_bus_num(void); 698 699 /* 700 * i2c_set_bus_num: 701 * 702 * Change the active I2C bus. Subsequent read/write calls will 703 * go to this one. 704 * 705 * bus - bus index, zero based 706 * 707 * Returns: 0 on success, not 0 on failure 708 * 709 */ 710 int i2c_set_bus_num(unsigned int bus); 711 712 /* 713 * i2c_init_all(): 714 * 715 * Initializes all I2C adapters in the system. All i2c_adap structures must 716 * be initialized beforehead with function pointers and data, including 717 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 718 */ 719 void i2c_init_all(void); 720 721 /* 722 * Probe the given I2C chip address. Returns 0 if a chip responded, 723 * not 0 on failure. 724 */ 725 int i2c_probe(uint8_t chip); 726 727 /* 728 * Read/Write interface: 729 * chip: I2C chip address, range 0..127 730 * addr: Memory (register) address within the chip 731 * alen: Number of bytes to use for addr (typically 1, 2 for larger 732 * memories, 0 for register type devices with only one 733 * register) 734 * buffer: Where to read/write the data 735 * len: How many bytes to read/write 736 * 737 * Returns: 0 on success, not 0 on failure 738 */ 739 int i2c_read(uint8_t chip, unsigned int addr, int alen, 740 uint8_t *buffer, int len); 741 742 int i2c_write(uint8_t chip, unsigned int addr, int alen, 743 uint8_t *buffer, int len); 744 745 /* 746 * Utility routines to read/write registers. 747 */ 748 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 749 750 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 751 752 /* 753 * i2c_set_bus_speed: 754 * 755 * Change the speed of the active I2C bus 756 * 757 * speed - bus speed in Hz 758 * 759 * Returns: new bus speed 760 * 761 */ 762 unsigned int i2c_set_bus_speed(unsigned int speed); 763 764 /* 765 * i2c_get_bus_speed: 766 * 767 * Returns speed of currently active I2C bus in Hz 768 */ 769 770 unsigned int i2c_get_bus_speed(void); 771 772 #else 773 774 /* 775 * Probe the given I2C chip address. Returns 0 if a chip responded, 776 * not 0 on failure. 777 */ 778 int i2c_probe(uchar chip); 779 780 /* 781 * Read/Write interface: 782 * chip: I2C chip address, range 0..127 783 * addr: Memory (register) address within the chip 784 * alen: Number of bytes to use for addr (typically 1, 2 for larger 785 * memories, 0 for register type devices with only one 786 * register) 787 * buffer: Where to read/write the data 788 * len: How many bytes to read/write 789 * 790 * Returns: 0 on success, not 0 on failure 791 */ 792 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 793 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 794 795 /* 796 * Utility routines to read/write registers. 797 */ 798 static inline u8 i2c_reg_read(u8 addr, u8 reg) 799 { 800 u8 buf; 801 802 #ifdef DEBUG 803 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 804 #endif 805 806 i2c_read(addr, reg, 1, &buf, 1); 807 808 return buf; 809 } 810 811 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 812 { 813 #ifdef DEBUG 814 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 815 __func__, addr, reg, val); 816 #endif 817 818 i2c_write(addr, reg, 1, &val, 1); 819 } 820 821 /* 822 * Functions for setting the current I2C bus and its speed 823 */ 824 825 /* 826 * i2c_set_bus_num: 827 * 828 * Change the active I2C bus. Subsequent read/write calls will 829 * go to this one. 830 * 831 * bus - bus index, zero based 832 * 833 * Returns: 0 on success, not 0 on failure 834 * 835 */ 836 int i2c_set_bus_num(unsigned int bus); 837 838 /* 839 * i2c_get_bus_num: 840 * 841 * Returns index of currently active I2C bus. Zero-based. 842 */ 843 844 unsigned int i2c_get_bus_num(void); 845 846 /* 847 * i2c_set_bus_speed: 848 * 849 * Change the speed of the active I2C bus 850 * 851 * speed - bus speed in Hz 852 * 853 * Returns: 0 on success, not 0 on failure 854 * 855 */ 856 int i2c_set_bus_speed(unsigned int); 857 858 /* 859 * i2c_get_bus_speed: 860 * 861 * Returns speed of currently active I2C bus in Hz 862 */ 863 864 unsigned int i2c_get_bus_speed(void); 865 #endif /* CONFIG_SYS_I2C */ 866 867 /* 868 * only for backwardcompatibility, should go away if we switched 869 * completely to new multibus support. 870 */ 871 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 872 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 873 # define CONFIG_SYS_MAX_I2C_BUS 2 874 # endif 875 # define I2C_MULTI_BUS 1 876 #else 877 # define CONFIG_SYS_MAX_I2C_BUS 1 878 # define I2C_MULTI_BUS 0 879 #endif 880 881 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 882 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 883 static inline unsigned int I2C_GET_BUS(void) 884 { 885 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 886 } 887 888 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 889 static inline void I2C_SET_BUS(unsigned int bus) 890 { 891 if (I2C_MULTI_BUS) 892 i2c_set_bus_num(bus); 893 } 894 895 /* Multi I2C definitions */ 896 enum { 897 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 898 I2C_8, I2C_9, I2C_10, 899 }; 900 901 /** 902 * Get FDT values for i2c bus. 903 * 904 * @param blob Device tree blbo 905 * @return the number of I2C bus 906 */ 907 void board_i2c_init(const void *blob); 908 909 /** 910 * Find the I2C bus number by given a FDT I2C node. 911 * 912 * @param blob Device tree blbo 913 * @param node FDT I2C node to find 914 * @return the number of I2C bus (zero based), or -1 on error 915 */ 916 int i2c_get_bus_num_fdt(int node); 917 918 /** 919 * Reset the I2C bus represented by the given a FDT I2C node. 920 * 921 * @param blob Device tree blbo 922 * @param node FDT I2C node to find 923 * @return 0 if port was reset, -1 if not found 924 */ 925 int i2c_reset_port_fdt(const void *blob, int node); 926 927 #endif /* !CONFIG_DM_I2C */ 928 929 #endif /* _I2C_H_ */ 930