1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * The original I2C interface was 12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 13 * AIRVENT SAM s.p.a - RIMINI(ITALY) 14 * but has been changed substantially. 15 */ 16 17 #ifndef _I2C_H_ 18 #define _I2C_H_ 19 20 /* 21 * For now there are essentially two parts to this file - driver model 22 * here at the top, and the older code below (with CONFIG_SYS_I2C being 23 * most recent). The plan is to migrate everything to driver model. 24 * The driver model structures and API are separate as they are different 25 * enough as to be incompatible for compilation purposes. 26 */ 27 28 #ifdef CONFIG_DM_I2C 29 30 enum dm_i2c_chip_flags { 31 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ 32 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ 33 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ 34 }; 35 36 /** 37 * struct dm_i2c_chip - information about an i2c chip 38 * 39 * An I2C chip is a device on the I2C bus. It sits at a particular address 40 * and normally supports 7-bit or 10-bit addressing. 41 * 42 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is 43 * the chip to examine. 44 * 45 * @chip_addr: Chip address on bus 46 * @offset_len: Length of offset in bytes. A single byte offset can 47 * represent up to 256 bytes. A value larger than 1 may be 48 * needed for larger devices. 49 * @flags: Flags for this chip (dm_i2c_chip_flags) 50 * @emul: Emulator for this chip address (only used for emulation) 51 */ 52 struct dm_i2c_chip { 53 uint chip_addr; 54 uint offset_len; 55 uint flags; 56 #ifdef CONFIG_SANDBOX 57 struct udevice *emul; 58 #endif 59 }; 60 61 /** 62 * struct dm_i2c_bus- information about an i2c bus 63 * 64 * An I2C bus contains 0 or more chips on it, each at its own address. The 65 * bus can operate at different speeds (measured in Hz, typically 100KHz 66 * or 400KHz). 67 * 68 * To obtain this structure, use bus->uclass_priv where bus is the I2C 69 * bus udevice. 70 * 71 * @speed_hz: Bus speed in hertz (typically 100000) 72 */ 73 struct dm_i2c_bus { 74 int speed_hz; 75 }; 76 77 /** 78 * dm_i2c_read() - read bytes from an I2C chip 79 * 80 * To obtain an I2C device (called a 'chip') given the I2C bus address you 81 * can use i2c_get_chip(). To obtain a bus by bus number use 82 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). 83 * 84 * To set the address length of a devce use i2c_set_addr_len(). It 85 * defaults to 1. 86 * 87 * @dev: Chip to read from 88 * @offset: Offset within chip to start reading 89 * @buffer: Place to put data 90 * @len: Number of bytes to read 91 * 92 * @return 0 on success, -ve on failure 93 */ 94 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len); 95 96 /** 97 * dm_i2c_write() - write bytes to an I2C chip 98 * 99 * See notes for dm_i2c_read() above. 100 * 101 * @dev: Chip to write to 102 * @offset: Offset within chip to start writing 103 * @buffer: Buffer containing data to write 104 * @len: Number of bytes to write 105 * 106 * @return 0 on success, -ve on failure 107 */ 108 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, 109 int len); 110 111 /** 112 * dm_i2c_probe() - probe a particular chip address 113 * 114 * This can be useful to check for the existence of a chip on the bus. 115 * It is typically implemented by writing the chip address to the bus 116 * and checking that the chip replies with an ACK. 117 * 118 * @bus: Bus to probe 119 * @chip_addr: 7-bit address to probe (10-bit and others are not supported) 120 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) 121 * @devp: Returns the device found, or NULL if none 122 * @return 0 if a chip was found at that address, -ve if not 123 */ 124 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 125 struct udevice **devp); 126 127 /** 128 * i2c_set_bus_speed() - set the speed of a bus 129 * 130 * @bus: Bus to adjust 131 * @speed: Requested speed in Hz 132 * @return 0 if OK, -EINVAL for invalid values 133 */ 134 int i2c_set_bus_speed(struct udevice *bus, unsigned int speed); 135 136 /** 137 * i2c_get_bus_speed() - get the speed of a bus 138 * 139 * @bus: Bus to check 140 * @return speed of selected I2C bus in Hz, -ve on error 141 */ 142 int i2c_get_bus_speed(struct udevice *bus); 143 144 /** 145 * i2c_set_chip_flags() - set flags for a chip 146 * 147 * Typically addresses are 7 bits, but for 10-bit addresses you should set 148 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. 149 * 150 * @dev: Chip to adjust 151 * @flags: New flags 152 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error 153 */ 154 int i2c_set_chip_flags(struct udevice *dev, uint flags); 155 156 /** 157 * i2c_get_chip_flags() - get flags for a chip 158 * 159 * @dev: Chip to check 160 * @flagsp: Place to put flags 161 * @return 0 if OK, other -ve value on error 162 */ 163 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); 164 165 /** 166 * i2c_set_offset_len() - set the offset length for a chip 167 * 168 * The offset used to access a chip may be up to 4 bytes long. Typically it 169 * is only 1 byte, which is enough for chips with 256 bytes of memory or 170 * registers. The default value is 1, but you can call this function to 171 * change it. 172 * 173 * @offset_len: New offset length value (typically 1 or 2) 174 */ 175 176 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); 177 /** 178 * i2c_deblock() - recover a bus that is in an unknown state 179 * 180 * See the deblock() method in 'struct dm_i2c_ops' for full information 181 * 182 * @bus: Bus to recover 183 * @return 0 if OK, -ve on error 184 */ 185 int i2c_deblock(struct udevice *bus); 186 187 #ifdef CONFIG_DM_I2C_COMPAT 188 /** 189 * i2c_probe() - Compatibility function for driver model 190 * 191 * Calls dm_i2c_probe() on the current bus 192 */ 193 int i2c_probe(uint8_t chip_addr); 194 195 /** 196 * i2c_read() - Compatibility function for driver model 197 * 198 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset 199 * set to @addr. @alen must match the current setting for the device. 200 */ 201 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 202 int len); 203 204 /** 205 * i2c_write() - Compatibility function for driver model 206 * 207 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset 208 * set to @addr. @alen must match the current setting for the device. 209 */ 210 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 211 int len); 212 213 /** 214 * i2c_get_bus_num_fdt() - Compatibility function for driver model 215 * 216 * @return the bus number associated with the given device tree node 217 */ 218 int i2c_get_bus_num_fdt(int node); 219 220 /** 221 * i2c_get_bus_num() - Compatibility function for driver model 222 * 223 * @return the 'current' bus number 224 */ 225 unsigned int i2c_get_bus_num(void); 226 227 /** 228 * i2c_set_bus_num(): Compatibility function for driver model 229 * 230 * Sets the 'current' bus 231 */ 232 int i2c_set_bus_num(unsigned int bus); 233 234 static inline void I2C_SET_BUS(unsigned int bus) 235 { 236 i2c_set_bus_num(bus); 237 } 238 239 static inline unsigned int I2C_GET_BUS(void) 240 { 241 return i2c_get_bus_num(); 242 } 243 244 #endif 245 246 /* 247 * Not all of these flags are implemented in the U-Boot API 248 */ 249 enum dm_i2c_msg_flags { 250 I2C_M_TEN = 0x0010, /* ten-bit chip address */ 251 I2C_M_RD = 0x0001, /* read data, from slave to master */ 252 I2C_M_STOP = 0x8000, /* send stop after this message */ 253 I2C_M_NOSTART = 0x4000, /* no start before this message */ 254 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ 255 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ 256 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ 257 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ 258 }; 259 260 /** 261 * struct i2c_msg - an I2C message 262 * 263 * @addr: Slave address 264 * @flags: Flags (see enum dm_i2c_msg_flags) 265 * @len: Length of buffer in bytes, may be 0 for a probe 266 * @buf: Buffer to send/receive, or NULL if no data 267 */ 268 struct i2c_msg { 269 uint addr; 270 uint flags; 271 uint len; 272 u8 *buf; 273 }; 274 275 /** 276 * struct i2c_msg_list - a list of I2C messages 277 * 278 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem 279 * appropriate in U-Boot. 280 * 281 * @msg: Pointer to i2c_msg array 282 * @nmsgs: Number of elements in the array 283 */ 284 struct i2c_msg_list { 285 struct i2c_msg *msgs; 286 uint nmsgs; 287 }; 288 289 /** 290 * struct dm_i2c_ops - driver operations for I2C uclass 291 * 292 * Drivers should support these operations unless otherwise noted. These 293 * operations are intended to be used by uclass code, not directly from 294 * other code. 295 */ 296 struct dm_i2c_ops { 297 /** 298 * xfer() - transfer a list of I2C messages 299 * 300 * @bus: Bus to read from 301 * @msg: List of messages to transfer 302 * @nmsgs: Number of messages in the list 303 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, 304 * -ECOMM if the speed cannot be supported, -EPROTO if the chip 305 * flags cannot be supported, other -ve value on some other error 306 */ 307 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); 308 309 /** 310 * probe_chip() - probe for the presense of a chip address 311 * 312 * This function is optional. If omitted, the uclass will send a zero 313 * length message instead. 314 * 315 * @bus: Bus to probe 316 * @chip_addr: Chip address to probe 317 * @chip_flags: Probe flags (enum dm_i2c_chip_flags) 318 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back 319 * to default probem other -ve value on error 320 */ 321 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); 322 323 /** 324 * set_bus_speed() - set the speed of a bus (optional) 325 * 326 * The bus speed value will be updated by the uclass if this function 327 * does not return an error. This method is optional - if it is not 328 * provided then the driver can read the speed from 329 * bus->uclass_priv->speed_hz 330 * 331 * @bus: Bus to adjust 332 * @speed: Requested speed in Hz 333 * @return 0 if OK, -EINVAL for invalid values 334 */ 335 int (*set_bus_speed)(struct udevice *bus, unsigned int speed); 336 337 /** 338 * get_bus_speed() - get the speed of a bus (optional) 339 * 340 * Normally this can be provided by the uclass, but if you want your 341 * driver to check the bus speed by looking at the hardware, you can 342 * implement that here. This method is optional. This method would 343 * normally be expected to return bus->uclass_priv->speed_hz. 344 * 345 * @bus: Bus to check 346 * @return speed of selected I2C bus in Hz, -ve on error 347 */ 348 int (*get_bus_speed)(struct udevice *bus); 349 350 /** 351 * set_flags() - set the flags for a chip (optional) 352 * 353 * This is generally implemented by the uclass, but drivers can 354 * check the value to ensure that unsupported options are not used. 355 * This method is optional. If provided, this method will always be 356 * called when the flags change. 357 * 358 * @dev: Chip to adjust 359 * @flags: New flags value 360 * @return 0 if OK, -EINVAL if value is unsupported 361 */ 362 int (*set_flags)(struct udevice *dev, uint flags); 363 364 /** 365 * deblock() - recover a bus that is in an unknown state 366 * 367 * I2C is a synchronous protocol and resets of the processor in the 368 * middle of an access can block the I2C Bus until a powerdown of 369 * the full unit is done. This is because slaves can be stuck 370 * waiting for addition bus transitions for a transaction that will 371 * never complete. Resetting the I2C master does not help. The only 372 * way is to force the bus through a series of transitions to make 373 * sure that all slaves are done with the transaction. This method 374 * performs this 'deblocking' if support by the driver. 375 * 376 * This method is optional. 377 */ 378 int (*deblock)(struct udevice *bus); 379 }; 380 381 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) 382 383 /** 384 * i2c_get_chip() - get a device to use to access a chip on a bus 385 * 386 * This returns the device for the given chip address. The device can then 387 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. 388 * 389 * @bus: Bus to examine 390 * @chip_addr: Chip address for the new device 391 * @offset_len: Length of a register offset in bytes (normally 1) 392 * @devp: Returns pointer to new device if found or -ENODEV if not 393 * found 394 */ 395 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, 396 struct udevice **devp); 397 398 /** 399 * i2c_get_chip() - get a device to use to access a chip on a bus number 400 * 401 * This returns the device for the given chip address on a particular bus 402 * number. 403 * 404 * @busnum: Bus number to examine 405 * @chip_addr: Chip address for the new device 406 * @offset_len: Length of a register offset in bytes (normally 1) 407 * @devp: Returns pointer to new device if found or -ENODEV if not 408 * found 409 */ 410 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, 411 struct udevice **devp); 412 413 /** 414 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data 415 * 416 * This decodes the chip address from a device tree node and puts it into 417 * its dm_i2c_chip structure. This should be called in your driver's 418 * ofdata_to_platdata() method. 419 * 420 * @blob: Device tree blob 421 * @node: Node offset to read from 422 * @spi: Place to put the decoded information 423 */ 424 int i2c_chip_ofdata_to_platdata(const void *blob, int node, 425 struct dm_i2c_chip *chip); 426 427 #endif 428 429 #ifndef CONFIG_DM_I2C 430 431 /* 432 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 433 * 434 * The implementation MUST NOT use static or global variables if the 435 * I2C routines are used to read SDRAM configuration information 436 * because this is done before the memories are initialized. Limited 437 * use of stack-based variables are OK (the initial stack size is 438 * limited). 439 * 440 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 441 */ 442 443 /* 444 * Configuration items. 445 */ 446 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 447 448 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 449 /* no muxes used bus = i2c adapters */ 450 #define CONFIG_SYS_I2C_DIRECT_BUS 1 451 #define CONFIG_SYS_I2C_MAX_HOPS 0 452 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 453 #else 454 /* we use i2c muxes */ 455 #undef CONFIG_SYS_I2C_DIRECT_BUS 456 #endif 457 458 /* define the I2C bus number for RTC and DTT if not already done */ 459 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 460 #define CONFIG_SYS_RTC_BUS_NUM 0 461 #endif 462 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 463 #define CONFIG_SYS_DTT_BUS_NUM 0 464 #endif 465 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 466 #define CONFIG_SYS_SPD_BUS_NUM 0 467 #endif 468 469 struct i2c_adapter { 470 void (*init)(struct i2c_adapter *adap, int speed, 471 int slaveaddr); 472 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 473 int (*read)(struct i2c_adapter *adap, uint8_t chip, 474 uint addr, int alen, uint8_t *buffer, 475 int len); 476 int (*write)(struct i2c_adapter *adap, uint8_t chip, 477 uint addr, int alen, uint8_t *buffer, 478 int len); 479 uint (*set_bus_speed)(struct i2c_adapter *adap, 480 uint speed); 481 int speed; 482 int waitdelay; 483 int slaveaddr; 484 int init_done; 485 int hwadapnr; 486 char *name; 487 }; 488 489 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 490 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 491 { \ 492 .init = _init, \ 493 .probe = _probe, \ 494 .read = _read, \ 495 .write = _write, \ 496 .set_bus_speed = _set_speed, \ 497 .speed = _speed, \ 498 .slaveaddr = _slaveaddr, \ 499 .init_done = 0, \ 500 .hwadapnr = _hwadapnr, \ 501 .name = #_name \ 502 }; 503 504 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 505 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 506 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 507 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 508 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 509 510 struct i2c_adapter *i2c_get_adapter(int index); 511 512 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 513 struct i2c_mux { 514 int id; 515 char name[16]; 516 }; 517 518 struct i2c_next_hop { 519 struct i2c_mux mux; 520 uint8_t chip; 521 uint8_t channel; 522 }; 523 524 struct i2c_bus_hose { 525 int adapter; 526 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 527 }; 528 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 529 extern struct i2c_bus_hose i2c_bus[]; 530 531 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 532 #else 533 #define I2C_ADAPTER(bus) bus 534 #endif 535 #define I2C_BUS gd->cur_i2c_bus 536 537 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 538 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 539 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 540 541 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 542 #define I2C_MUX_PCA9540_ID 1 543 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 544 #define I2C_MUX_PCA9542_ID 2 545 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 546 #define I2C_MUX_PCA9544_ID 3 547 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 548 #define I2C_MUX_PCA9547_ID 4 549 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 550 #define I2C_MUX_PCA9548_ID 5 551 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 552 #endif 553 554 #ifndef I2C_SOFT_DECLARATIONS 555 # if defined(CONFIG_MPC8260) 556 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 557 # elif defined(CONFIG_8xx) 558 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 559 560 # elif (defined(CONFIG_AT91RM9200) || \ 561 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 562 defined(CONFIG_AT91SAM9263)) 563 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 564 # else 565 # define I2C_SOFT_DECLARATIONS 566 # endif 567 #endif 568 569 #ifdef CONFIG_8xx 570 /* Set default value for the I2C bus speed on 8xx. In the 571 * future, we'll define these in all 8xx board config files. 572 */ 573 #ifndef CONFIG_SYS_I2C_SPEED 574 #define CONFIG_SYS_I2C_SPEED 50000 575 #endif 576 #endif 577 578 /* 579 * Many boards/controllers/drivers don't support an I2C slave interface so 580 * provide a default slave address for them for use in common code. A real 581 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 582 * support a slave interface. 583 */ 584 #ifndef CONFIG_SYS_I2C_SLAVE 585 #define CONFIG_SYS_I2C_SLAVE 0xfe 586 #endif 587 588 /* 589 * Initialization, must be called once on start up, may be called 590 * repeatedly to change the speed and slave addresses. 591 */ 592 void i2c_init(int speed, int slaveaddr); 593 void i2c_init_board(void); 594 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 595 void i2c_board_late_init(void); 596 #endif 597 598 #ifdef CONFIG_SYS_I2C 599 /* 600 * i2c_get_bus_num: 601 * 602 * Returns index of currently active I2C bus. Zero-based. 603 */ 604 unsigned int i2c_get_bus_num(void); 605 606 /* 607 * i2c_set_bus_num: 608 * 609 * Change the active I2C bus. Subsequent read/write calls will 610 * go to this one. 611 * 612 * bus - bus index, zero based 613 * 614 * Returns: 0 on success, not 0 on failure 615 * 616 */ 617 int i2c_set_bus_num(unsigned int bus); 618 619 /* 620 * i2c_init_all(): 621 * 622 * Initializes all I2C adapters in the system. All i2c_adap structures must 623 * be initialized beforehead with function pointers and data, including 624 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 625 */ 626 void i2c_init_all(void); 627 628 /* 629 * Probe the given I2C chip address. Returns 0 if a chip responded, 630 * not 0 on failure. 631 */ 632 int i2c_probe(uint8_t chip); 633 634 /* 635 * Read/Write interface: 636 * chip: I2C chip address, range 0..127 637 * addr: Memory (register) address within the chip 638 * alen: Number of bytes to use for addr (typically 1, 2 for larger 639 * memories, 0 for register type devices with only one 640 * register) 641 * buffer: Where to read/write the data 642 * len: How many bytes to read/write 643 * 644 * Returns: 0 on success, not 0 on failure 645 */ 646 int i2c_read(uint8_t chip, unsigned int addr, int alen, 647 uint8_t *buffer, int len); 648 649 int i2c_write(uint8_t chip, unsigned int addr, int alen, 650 uint8_t *buffer, int len); 651 652 /* 653 * Utility routines to read/write registers. 654 */ 655 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 656 657 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 658 659 /* 660 * i2c_set_bus_speed: 661 * 662 * Change the speed of the active I2C bus 663 * 664 * speed - bus speed in Hz 665 * 666 * Returns: new bus speed 667 * 668 */ 669 unsigned int i2c_set_bus_speed(unsigned int speed); 670 671 /* 672 * i2c_get_bus_speed: 673 * 674 * Returns speed of currently active I2C bus in Hz 675 */ 676 677 unsigned int i2c_get_bus_speed(void); 678 679 /* 680 * i2c_reloc_fixup: 681 * 682 * Adjusts I2C pointers after U-Boot is relocated to DRAM 683 */ 684 void i2c_reloc_fixup(void); 685 #if defined(CONFIG_SYS_I2C_SOFT) 686 void i2c_soft_init(void); 687 void i2c_soft_active(void); 688 void i2c_soft_tristate(void); 689 int i2c_soft_read(void); 690 void i2c_soft_sda(int bit); 691 void i2c_soft_scl(int bit); 692 void i2c_soft_delay(void); 693 #endif 694 #else 695 696 /* 697 * Probe the given I2C chip address. Returns 0 if a chip responded, 698 * not 0 on failure. 699 */ 700 int i2c_probe(uchar chip); 701 702 /* 703 * Read/Write interface: 704 * chip: I2C chip address, range 0..127 705 * addr: Memory (register) address within the chip 706 * alen: Number of bytes to use for addr (typically 1, 2 for larger 707 * memories, 0 for register type devices with only one 708 * register) 709 * buffer: Where to read/write the data 710 * len: How many bytes to read/write 711 * 712 * Returns: 0 on success, not 0 on failure 713 */ 714 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 715 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 716 717 /* 718 * Utility routines to read/write registers. 719 */ 720 static inline u8 i2c_reg_read(u8 addr, u8 reg) 721 { 722 u8 buf; 723 724 #ifdef CONFIG_8xx 725 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 726 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 727 #endif 728 729 #ifdef DEBUG 730 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 731 #endif 732 733 i2c_read(addr, reg, 1, &buf, 1); 734 735 return buf; 736 } 737 738 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 739 { 740 #ifdef CONFIG_8xx 741 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 742 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 743 #endif 744 745 #ifdef DEBUG 746 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 747 __func__, addr, reg, val); 748 #endif 749 750 i2c_write(addr, reg, 1, &val, 1); 751 } 752 753 /* 754 * Functions for setting the current I2C bus and its speed 755 */ 756 757 /* 758 * i2c_set_bus_num: 759 * 760 * Change the active I2C bus. Subsequent read/write calls will 761 * go to this one. 762 * 763 * bus - bus index, zero based 764 * 765 * Returns: 0 on success, not 0 on failure 766 * 767 */ 768 int i2c_set_bus_num(unsigned int bus); 769 770 /* 771 * i2c_get_bus_num: 772 * 773 * Returns index of currently active I2C bus. Zero-based. 774 */ 775 776 unsigned int i2c_get_bus_num(void); 777 778 /* 779 * i2c_set_bus_speed: 780 * 781 * Change the speed of the active I2C bus 782 * 783 * speed - bus speed in Hz 784 * 785 * Returns: 0 on success, not 0 on failure 786 * 787 */ 788 int i2c_set_bus_speed(unsigned int); 789 790 /* 791 * i2c_get_bus_speed: 792 * 793 * Returns speed of currently active I2C bus in Hz 794 */ 795 796 unsigned int i2c_get_bus_speed(void); 797 #endif /* CONFIG_SYS_I2C */ 798 799 /* 800 * only for backwardcompatibility, should go away if we switched 801 * completely to new multibus support. 802 */ 803 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 804 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 805 # define CONFIG_SYS_MAX_I2C_BUS 2 806 # endif 807 # define I2C_MULTI_BUS 1 808 #else 809 # define CONFIG_SYS_MAX_I2C_BUS 1 810 # define I2C_MULTI_BUS 0 811 #endif 812 813 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 814 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 815 static inline unsigned int I2C_GET_BUS(void) 816 { 817 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 818 } 819 820 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 821 static inline void I2C_SET_BUS(unsigned int bus) 822 { 823 if (I2C_MULTI_BUS) 824 i2c_set_bus_num(bus); 825 } 826 827 /* Multi I2C definitions */ 828 enum { 829 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 830 I2C_8, I2C_9, I2C_10, 831 }; 832 833 /* Multi I2C busses handling */ 834 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 835 extern int get_multi_scl_pin(void); 836 extern int get_multi_sda_pin(void); 837 extern int multi_i2c_init(void); 838 #endif 839 840 /** 841 * Get FDT values for i2c bus. 842 * 843 * @param blob Device tree blbo 844 * @return the number of I2C bus 845 */ 846 void board_i2c_init(const void *blob); 847 848 /** 849 * Find the I2C bus number by given a FDT I2C node. 850 * 851 * @param blob Device tree blbo 852 * @param node FDT I2C node to find 853 * @return the number of I2C bus (zero based), or -1 on error 854 */ 855 int i2c_get_bus_num_fdt(int node); 856 857 /** 858 * Reset the I2C bus represented by the given a FDT I2C node. 859 * 860 * @param blob Device tree blbo 861 * @param node FDT I2C node to find 862 * @return 0 if port was reset, -1 if not found 863 */ 864 int i2c_reset_port_fdt(const void *blob, int node); 865 866 #endif /* !CONFIG_DM_I2C */ 867 868 #endif /* _I2C_H_ */ 869