xref: /openbmc/u-boot/include/i2c.h (revision 657fd2d0)
1 /*
2  * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3  * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4  * Changes for multibus/multiadapter I2C support.
5  *
6  * (C) Copyright 2001
7  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  *
11  * The original I2C interface was
12  *   (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13  *   AIRVENT SAM s.p.a - RIMINI(ITALY)
14  * but has been changed substantially.
15  */
16 
17 #ifndef _I2C_H_
18 #define _I2C_H_
19 
20 /*
21  * For now there are essentially two parts to this file - driver model
22  * here at the top, and the older code below (with CONFIG_SYS_I2C being
23  * most recent). The plan is to migrate everything to driver model.
24  * The driver model structures and API are separate as they are different
25  * enough as to be incompatible for compilation purposes.
26  */
27 
28 enum dm_i2c_chip_flags {
29 	DM_I2C_CHIP_10BIT	= 1 << 0, /* Use 10-bit addressing */
30 	DM_I2C_CHIP_RD_ADDRESS	= 1 << 1, /* Send address for each read byte */
31 	DM_I2C_CHIP_WR_ADDRESS	= 1 << 2, /* Send address for each write byte */
32 };
33 
34 struct udevice;
35 /**
36  * struct dm_i2c_chip - information about an i2c chip
37  *
38  * An I2C chip is a device on the I2C bus. It sits at a particular address
39  * and normally supports 7-bit or 10-bit addressing.
40  *
41  * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
42  * the chip to examine.
43  *
44  * @chip_addr:	Chip address on bus
45  * @offset_len: Length of offset in bytes. A single byte offset can
46  *		represent up to 256 bytes. A value larger than 1 may be
47  *		needed for larger devices.
48  * @flags:	Flags for this chip (dm_i2c_chip_flags)
49  * @emul: Emulator for this chip address (only used for emulation)
50  */
51 struct dm_i2c_chip {
52 	uint chip_addr;
53 	uint offset_len;
54 	uint flags;
55 #ifdef CONFIG_SANDBOX
56 	struct udevice *emul;
57 	bool test_mode;
58 #endif
59 };
60 
61 /**
62  * struct dm_i2c_bus- information about an i2c bus
63  *
64  * An I2C bus contains 0 or more chips on it, each at its own address. The
65  * bus can operate at different speeds (measured in Hz, typically 100KHz
66  * or 400KHz).
67  *
68  * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
69  * I2C bus udevice.
70  *
71  * @speed_hz: Bus speed in hertz (typically 100000)
72  */
73 struct dm_i2c_bus {
74 	int speed_hz;
75 };
76 
77 /**
78  * dm_i2c_read() - read bytes from an I2C chip
79  *
80  * To obtain an I2C device (called a 'chip') given the I2C bus address you
81  * can use i2c_get_chip(). To obtain a bus by bus number use
82  * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
83  *
84  * To set the address length of a devce use i2c_set_addr_len(). It
85  * defaults to 1.
86  *
87  * @dev:	Chip to read from
88  * @offset:	Offset within chip to start reading
89  * @buffer:	Place to put data
90  * @len:	Number of bytes to read
91  *
92  * @return 0 on success, -ve on failure
93  */
94 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
95 
96 /**
97  * dm_i2c_write() - write bytes to an I2C chip
98  *
99  * See notes for dm_i2c_read() above.
100  *
101  * @dev:	Chip to write to
102  * @offset:	Offset within chip to start writing
103  * @buffer:	Buffer containing data to write
104  * @len:	Number of bytes to write
105  *
106  * @return 0 on success, -ve on failure
107  */
108 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
109 		 int len);
110 
111 /**
112  * dm_i2c_probe() - probe a particular chip address
113  *
114  * This can be useful to check for the existence of a chip on the bus.
115  * It is typically implemented by writing the chip address to the bus
116  * and checking that the chip replies with an ACK.
117  *
118  * @bus:	Bus to probe
119  * @chip_addr:	7-bit address to probe (10-bit and others are not supported)
120  * @chip_flags:	Flags for the probe (see enum dm_i2c_chip_flags)
121  * @devp:	Returns the device found, or NULL if none
122  * @return 0 if a chip was found at that address, -ve if not
123  */
124 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
125 		 struct udevice **devp);
126 
127 /**
128  * dm_i2c_reg_read() - Read a value from an I2C register
129  *
130  * This reads a single value from the given address in an I2C chip
131  *
132  * @addr:	Address to read from
133  * @return value read, or -ve on error
134  */
135 int dm_i2c_reg_read(struct udevice *dev, uint offset);
136 
137 /**
138  * dm_i2c_reg_write() - Write a value to an I2C register
139  *
140  * This writes a single value to the given address in an I2C chip
141  *
142  * @addr:	Address to write to
143  * @val:	Value to write (normally a byte)
144  * @return 0 on success, -ve on error
145  */
146 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
147 
148 /**
149  * dm_i2c_set_bus_speed() - set the speed of a bus
150  *
151  * @bus:	Bus to adjust
152  * @speed:	Requested speed in Hz
153  * @return 0 if OK, -EINVAL for invalid values
154  */
155 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
156 
157 /**
158  * dm_i2c_get_bus_speed() - get the speed of a bus
159  *
160  * @bus:	Bus to check
161  * @return speed of selected I2C bus in Hz, -ve on error
162  */
163 int dm_i2c_get_bus_speed(struct udevice *bus);
164 
165 /**
166  * i2c_set_chip_flags() - set flags for a chip
167  *
168  * Typically addresses are 7 bits, but for 10-bit addresses you should set
169  * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
170  *
171  * @dev:	Chip to adjust
172  * @flags:	New flags
173  * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
174  */
175 int i2c_set_chip_flags(struct udevice *dev, uint flags);
176 
177 /**
178  * i2c_get_chip_flags() - get flags for a chip
179  *
180  * @dev:	Chip to check
181  * @flagsp:	Place to put flags
182  * @return 0 if OK, other -ve value on error
183  */
184 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
185 
186 /**
187  * i2c_set_offset_len() - set the offset length for a chip
188  *
189  * The offset used to access a chip may be up to 4 bytes long. Typically it
190  * is only 1 byte, which is enough for chips with 256 bytes of memory or
191  * registers. The default value is 1, but you can call this function to
192  * change it.
193  *
194  * @offset_len:	New offset length value (typically 1 or 2)
195  */
196 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
197 
198 /**
199  * i2c_get_offset_len() - get the offset length for a chip
200  *
201  * @return:	Current offset length value (typically 1 or 2)
202  */
203 int i2c_get_chip_offset_len(struct udevice *dev);
204 
205 /**
206  * i2c_deblock() - recover a bus that is in an unknown state
207  *
208  * See the deblock() method in 'struct dm_i2c_ops' for full information
209  *
210  * @bus:	Bus to recover
211  * @return 0 if OK, -ve on error
212  */
213 int i2c_deblock(struct udevice *bus);
214 
215 #ifdef CONFIG_DM_I2C_COMPAT
216 /**
217  * i2c_probe() - Compatibility function for driver model
218  *
219  * Calls dm_i2c_probe() on the current bus
220  */
221 int i2c_probe(uint8_t chip_addr);
222 
223 /**
224  * i2c_read() - Compatibility function for driver model
225  *
226  * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
227  * set to @addr. @alen must match the current setting for the device.
228  */
229 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
230 	     int len);
231 
232 /**
233  * i2c_write() - Compatibility function for driver model
234  *
235  * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
236  * set to @addr. @alen must match the current setting for the device.
237  */
238 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
239 	      int len);
240 
241 /**
242  * i2c_get_bus_num_fdt() - Compatibility function for driver model
243  *
244  * @return the bus number associated with the given device tree node
245  */
246 int i2c_get_bus_num_fdt(int node);
247 
248 /**
249  * i2c_get_bus_num() - Compatibility function for driver model
250  *
251  * @return the 'current' bus number
252  */
253 unsigned int i2c_get_bus_num(void);
254 
255 /**
256  * i2c_set_bus_num() - Compatibility function for driver model
257  *
258  * Sets the 'current' bus
259  */
260 int i2c_set_bus_num(unsigned int bus);
261 
262 static inline void I2C_SET_BUS(unsigned int bus)
263 {
264 	i2c_set_bus_num(bus);
265 }
266 
267 static inline unsigned int I2C_GET_BUS(void)
268 {
269 	return i2c_get_bus_num();
270 }
271 
272 /**
273  * i2c_init() - Compatibility function for driver model
274  *
275  * This function does nothing.
276  */
277 void i2c_init(int speed, int slaveaddr);
278 
279 /**
280  * board_i2c_init() - Compatibility function for driver model
281  *
282  * @param blob  Device tree blbo
283  * @return the number of I2C bus
284  */
285 void board_i2c_init(const void *blob);
286 
287 #endif
288 
289 /*
290  * Not all of these flags are implemented in the U-Boot API
291  */
292 enum dm_i2c_msg_flags {
293 	I2C_M_TEN		= 0x0010, /* ten-bit chip address */
294 	I2C_M_RD		= 0x0001, /* read data, from slave to master */
295 	I2C_M_STOP		= 0x8000, /* send stop after this message */
296 	I2C_M_NOSTART		= 0x4000, /* no start before this message */
297 	I2C_M_REV_DIR_ADDR	= 0x2000, /* invert polarity of R/W bit */
298 	I2C_M_IGNORE_NAK	= 0x1000, /* continue after NAK */
299 	I2C_M_NO_RD_ACK		= 0x0800, /* skip the Ack bit on reads */
300 	I2C_M_RECV_LEN		= 0x0400, /* length is first received byte */
301 };
302 
303 /**
304  * struct i2c_msg - an I2C message
305  *
306  * @addr:	Slave address
307  * @flags:	Flags (see enum dm_i2c_msg_flags)
308  * @len:	Length of buffer in bytes, may be 0 for a probe
309  * @buf:	Buffer to send/receive, or NULL if no data
310  */
311 struct i2c_msg {
312 	uint addr;
313 	uint flags;
314 	uint len;
315 	u8 *buf;
316 };
317 
318 /**
319  * struct i2c_msg_list - a list of I2C messages
320  *
321  * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
322  * appropriate in U-Boot.
323  *
324  * @msg:	Pointer to i2c_msg array
325  * @nmsgs:	Number of elements in the array
326  */
327 struct i2c_msg_list {
328 	struct i2c_msg *msgs;
329 	uint nmsgs;
330 };
331 
332 /**
333  * struct dm_i2c_ops - driver operations for I2C uclass
334  *
335  * Drivers should support these operations unless otherwise noted. These
336  * operations are intended to be used by uclass code, not directly from
337  * other code.
338  */
339 struct dm_i2c_ops {
340 	/**
341 	 * xfer() - transfer a list of I2C messages
342 	 *
343 	 * @bus:	Bus to read from
344 	 * @msg:	List of messages to transfer
345 	 * @nmsgs:	Number of messages in the list
346 	 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
347 	 *	-ECOMM if the speed cannot be supported, -EPROTO if the chip
348 	 *	flags cannot be supported, other -ve value on some other error
349 	 */
350 	int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
351 
352 	/**
353 	 * probe_chip() - probe for the presense of a chip address
354 	 *
355 	 * This function is optional. If omitted, the uclass will send a zero
356 	 * length message instead.
357 	 *
358 	 * @bus:	Bus to probe
359 	 * @chip_addr:	Chip address to probe
360 	 * @chip_flags:	Probe flags (enum dm_i2c_chip_flags)
361 	 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
362 	 * to default probem other -ve value on error
363 	 */
364 	int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
365 
366 	/**
367 	 * set_bus_speed() - set the speed of a bus (optional)
368 	 *
369 	 * The bus speed value will be updated by the uclass if this function
370 	 * does not return an error. This method is optional - if it is not
371 	 * provided then the driver can read the speed from
372 	 * dev_get_uclass_priv(bus)->speed_hz
373 	 *
374 	 * @bus:	Bus to adjust
375 	 * @speed:	Requested speed in Hz
376 	 * @return 0 if OK, -EINVAL for invalid values
377 	 */
378 	int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
379 
380 	/**
381 	 * get_bus_speed() - get the speed of a bus (optional)
382 	 *
383 	 * Normally this can be provided by the uclass, but if you want your
384 	 * driver to check the bus speed by looking at the hardware, you can
385 	 * implement that here. This method is optional. This method would
386 	 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
387 	 *
388 	 * @bus:	Bus to check
389 	 * @return speed of selected I2C bus in Hz, -ve on error
390 	 */
391 	int (*get_bus_speed)(struct udevice *bus);
392 
393 	/**
394 	 * set_flags() - set the flags for a chip (optional)
395 	 *
396 	 * This is generally implemented by the uclass, but drivers can
397 	 * check the value to ensure that unsupported options are not used.
398 	 * This method is optional. If provided, this method will always be
399 	 * called when the flags change.
400 	 *
401 	 * @dev:	Chip to adjust
402 	 * @flags:	New flags value
403 	 * @return 0 if OK, -EINVAL if value is unsupported
404 	 */
405 	int (*set_flags)(struct udevice *dev, uint flags);
406 
407 	/**
408 	 * deblock() - recover a bus that is in an unknown state
409 	 *
410 	 * I2C is a synchronous protocol and resets of the processor in the
411 	 * middle of an access can block the I2C Bus until a powerdown of
412 	 * the full unit is done. This is because slaves can be stuck
413 	 * waiting for addition bus transitions for a transaction that will
414 	 * never complete. Resetting the I2C master does not help. The only
415 	 * way is to force the bus through a series of transitions to make
416 	 * sure that all slaves are done with the transaction. This method
417 	 * performs this 'deblocking' if support by the driver.
418 	 *
419 	 * This method is optional.
420 	 */
421 	int (*deblock)(struct udevice *bus);
422 };
423 
424 #define i2c_get_ops(dev)	((struct dm_i2c_ops *)(dev)->driver->ops)
425 
426 /**
427  * i2c_get_chip() - get a device to use to access a chip on a bus
428  *
429  * This returns the device for the given chip address. The device can then
430  * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
431  *
432  * @bus:	Bus to examine
433  * @chip_addr:	Chip address for the new device
434  * @offset_len:	Length of a register offset in bytes (normally 1)
435  * @devp:	Returns pointer to new device if found or -ENODEV if not
436  *		found
437  */
438 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
439 		 struct udevice **devp);
440 
441 /**
442  * i2c_get_chip() - get a device to use to access a chip on a bus number
443  *
444  * This returns the device for the given chip address on a particular bus
445  * number.
446  *
447  * @busnum:	Bus number to examine
448  * @chip_addr:	Chip address for the new device
449  * @offset_len:	Length of a register offset in bytes (normally 1)
450  * @devp:	Returns pointer to new device if found or -ENODEV if not
451  *		found
452  */
453 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
454 			    struct udevice **devp);
455 
456 /**
457  * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
458  *
459  * This decodes the chip address from a device tree node and puts it into
460  * its dm_i2c_chip structure. This should be called in your driver's
461  * ofdata_to_platdata() method.
462  *
463  * @blob:	Device tree blob
464  * @node:	Node offset to read from
465  * @spi:	Place to put the decoded information
466  */
467 int i2c_chip_ofdata_to_platdata(const void *blob, int node,
468 				struct dm_i2c_chip *chip);
469 
470 #ifndef CONFIG_DM_I2C
471 
472 /*
473  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
474  *
475  * The implementation MUST NOT use static or global variables if the
476  * I2C routines are used to read SDRAM configuration information
477  * because this is done before the memories are initialized. Limited
478  * use of stack-based variables are OK (the initial stack size is
479  * limited).
480  *
481  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
482  */
483 
484 /*
485  * Configuration items.
486  */
487 #define I2C_RXTX_LEN	128	/* maximum tx/rx buffer length */
488 
489 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
490 /* no muxes used bus = i2c adapters */
491 #define CONFIG_SYS_I2C_DIRECT_BUS	1
492 #define CONFIG_SYS_I2C_MAX_HOPS		0
493 #define CONFIG_SYS_NUM_I2C_BUSES	ll_entry_count(struct i2c_adapter, i2c)
494 #else
495 /* we use i2c muxes */
496 #undef CONFIG_SYS_I2C_DIRECT_BUS
497 #endif
498 
499 /* define the I2C bus number for RTC and DTT if not already done */
500 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
501 #define CONFIG_SYS_RTC_BUS_NUM		0
502 #endif
503 #if !defined(CONFIG_SYS_DTT_BUS_NUM)
504 #define CONFIG_SYS_DTT_BUS_NUM		0
505 #endif
506 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
507 #define CONFIG_SYS_SPD_BUS_NUM		0
508 #endif
509 
510 struct i2c_adapter {
511 	void		(*init)(struct i2c_adapter *adap, int speed,
512 				int slaveaddr);
513 	int		(*probe)(struct i2c_adapter *adap, uint8_t chip);
514 	int		(*read)(struct i2c_adapter *adap, uint8_t chip,
515 				uint addr, int alen, uint8_t *buffer,
516 				int len);
517 	int		(*write)(struct i2c_adapter *adap, uint8_t chip,
518 				uint addr, int alen, uint8_t *buffer,
519 				int len);
520 	uint		(*set_bus_speed)(struct i2c_adapter *adap,
521 				uint speed);
522 	int		speed;
523 	int		waitdelay;
524 	int		slaveaddr;
525 	int		init_done;
526 	int		hwadapnr;
527 	char		*name;
528 };
529 
530 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
531 		_set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
532 	{ \
533 		.init		=	_init, \
534 		.probe		=	_probe, \
535 		.read		=	_read, \
536 		.write		=	_write, \
537 		.set_bus_speed	=	_set_speed, \
538 		.speed		=	_speed, \
539 		.slaveaddr	=	_slaveaddr, \
540 		.init_done	=	0, \
541 		.hwadapnr	=	_hwadapnr, \
542 		.name		=	#_name \
543 };
544 
545 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
546 			_set_speed, _speed, _slaveaddr, _hwadapnr) \
547 	ll_entry_declare(struct i2c_adapter, _name, i2c) = \
548 	U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
549 		 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
550 
551 struct i2c_adapter *i2c_get_adapter(int index);
552 
553 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
554 struct i2c_mux {
555 	int	id;
556 	char	name[16];
557 };
558 
559 struct i2c_next_hop {
560 	struct i2c_mux		mux;
561 	uint8_t		chip;
562 	uint8_t		channel;
563 };
564 
565 struct i2c_bus_hose {
566 	int	adapter;
567 	struct i2c_next_hop	next_hop[CONFIG_SYS_I2C_MAX_HOPS];
568 };
569 #define I2C_NULL_HOP	{{-1, ""}, 0, 0}
570 extern struct i2c_bus_hose	i2c_bus[];
571 
572 #define I2C_ADAPTER(bus)	i2c_bus[bus].adapter
573 #else
574 #define I2C_ADAPTER(bus)	bus
575 #endif
576 #define	I2C_BUS			gd->cur_i2c_bus
577 
578 #define	I2C_ADAP_NR(bus)	i2c_get_adapter(I2C_ADAPTER(bus))
579 #define	I2C_ADAP		I2C_ADAP_NR(gd->cur_i2c_bus)
580 #define I2C_ADAP_HWNR		(I2C_ADAP->hwadapnr)
581 
582 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
583 #define I2C_MUX_PCA9540_ID	1
584 #define I2C_MUX_PCA9540		{I2C_MUX_PCA9540_ID, "PCA9540B"}
585 #define I2C_MUX_PCA9542_ID	2
586 #define I2C_MUX_PCA9542		{I2C_MUX_PCA9542_ID, "PCA9542A"}
587 #define I2C_MUX_PCA9544_ID	3
588 #define I2C_MUX_PCA9544		{I2C_MUX_PCA9544_ID, "PCA9544A"}
589 #define I2C_MUX_PCA9547_ID	4
590 #define I2C_MUX_PCA9547		{I2C_MUX_PCA9547_ID, "PCA9547A"}
591 #define I2C_MUX_PCA9548_ID	5
592 #define I2C_MUX_PCA9548		{I2C_MUX_PCA9548_ID, "PCA9548"}
593 #endif
594 
595 #ifndef I2C_SOFT_DECLARATIONS
596 # if defined(CONFIG_MPC8260)
597 #  define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
598 # elif defined(CONFIG_8xx)
599 #  define I2C_SOFT_DECLARATIONS	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
600 
601 # elif (defined(CONFIG_AT91RM9200) || \
602 	defined(CONFIG_AT91SAM9260) ||  defined(CONFIG_AT91SAM9261) || \
603 	defined(CONFIG_AT91SAM9263))
604 #  define I2C_SOFT_DECLARATIONS	at91_pio_t *pio	= (at91_pio_t *) ATMEL_BASE_PIOA;
605 # else
606 #  define I2C_SOFT_DECLARATIONS
607 # endif
608 #endif
609 
610 #ifdef CONFIG_8xx
611 /* Set default value for the I2C bus speed on 8xx. In the
612  * future, we'll define these in all 8xx board config files.
613  */
614 #ifndef	CONFIG_SYS_I2C_SPEED
615 #define	CONFIG_SYS_I2C_SPEED	50000
616 #endif
617 #endif
618 
619 /*
620  * Many boards/controllers/drivers don't support an I2C slave interface so
621  * provide a default slave address for them for use in common code.  A real
622  * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
623  * support a slave interface.
624  */
625 #ifndef	CONFIG_SYS_I2C_SLAVE
626 #define	CONFIG_SYS_I2C_SLAVE	0xfe
627 #endif
628 
629 /*
630  * Initialization, must be called once on start up, may be called
631  * repeatedly to change the speed and slave addresses.
632  */
633 void i2c_init(int speed, int slaveaddr);
634 void i2c_init_board(void);
635 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
636 void i2c_board_late_init(void);
637 #endif
638 
639 #ifdef CONFIG_SYS_I2C
640 /*
641  * i2c_get_bus_num:
642  *
643  *  Returns index of currently active I2C bus.  Zero-based.
644  */
645 unsigned int i2c_get_bus_num(void);
646 
647 /*
648  * i2c_set_bus_num:
649  *
650  *  Change the active I2C bus.  Subsequent read/write calls will
651  *  go to this one.
652  *
653  *	bus - bus index, zero based
654  *
655  *	Returns: 0 on success, not 0 on failure
656  *
657  */
658 int i2c_set_bus_num(unsigned int bus);
659 
660 /*
661  * i2c_init_all():
662  *
663  * Initializes all I2C adapters in the system. All i2c_adap structures must
664  * be initialized beforehead with function pointers and data, including
665  * speed and slaveaddr. Returns 0 on success, non-0 on failure.
666  */
667 void i2c_init_all(void);
668 
669 /*
670  * Probe the given I2C chip address.  Returns 0 if a chip responded,
671  * not 0 on failure.
672  */
673 int i2c_probe(uint8_t chip);
674 
675 /*
676  * Read/Write interface:
677  *   chip:    I2C chip address, range 0..127
678  *   addr:    Memory (register) address within the chip
679  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
680  *              memories, 0 for register type devices with only one
681  *              register)
682  *   buffer:  Where to read/write the data
683  *   len:     How many bytes to read/write
684  *
685  *   Returns: 0 on success, not 0 on failure
686  */
687 int i2c_read(uint8_t chip, unsigned int addr, int alen,
688 				uint8_t *buffer, int len);
689 
690 int i2c_write(uint8_t chip, unsigned int addr, int alen,
691 				uint8_t *buffer, int len);
692 
693 /*
694  * Utility routines to read/write registers.
695  */
696 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
697 
698 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
699 
700 /*
701  * i2c_set_bus_speed:
702  *
703  *  Change the speed of the active I2C bus
704  *
705  *	speed - bus speed in Hz
706  *
707  *	Returns: new bus speed
708  *
709  */
710 unsigned int i2c_set_bus_speed(unsigned int speed);
711 
712 /*
713  * i2c_get_bus_speed:
714  *
715  *  Returns speed of currently active I2C bus in Hz
716  */
717 
718 unsigned int i2c_get_bus_speed(void);
719 
720 /*
721  * i2c_reloc_fixup:
722  *
723  * Adjusts I2C pointers after U-Boot is relocated to DRAM
724  */
725 void i2c_reloc_fixup(void);
726 #if defined(CONFIG_SYS_I2C_SOFT)
727 void i2c_soft_init(void);
728 void i2c_soft_active(void);
729 void i2c_soft_tristate(void);
730 int i2c_soft_read(void);
731 void i2c_soft_sda(int bit);
732 void i2c_soft_scl(int bit);
733 void i2c_soft_delay(void);
734 #endif
735 #else
736 
737 /*
738  * Probe the given I2C chip address.  Returns 0 if a chip responded,
739  * not 0 on failure.
740  */
741 int i2c_probe(uchar chip);
742 
743 /*
744  * Read/Write interface:
745  *   chip:    I2C chip address, range 0..127
746  *   addr:    Memory (register) address within the chip
747  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
748  *              memories, 0 for register type devices with only one
749  *              register)
750  *   buffer:  Where to read/write the data
751  *   len:     How many bytes to read/write
752  *
753  *   Returns: 0 on success, not 0 on failure
754  */
755 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
756 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
757 
758 /*
759  * Utility routines to read/write registers.
760  */
761 static inline u8 i2c_reg_read(u8 addr, u8 reg)
762 {
763 	u8 buf;
764 
765 #ifdef CONFIG_8xx
766 	/* MPC8xx needs this.  Maybe one day we can get rid of it. */
767 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
768 #endif
769 
770 #ifdef DEBUG
771 	printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
772 #endif
773 
774 	i2c_read(addr, reg, 1, &buf, 1);
775 
776 	return buf;
777 }
778 
779 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
780 {
781 #ifdef CONFIG_8xx
782 	/* MPC8xx needs this.  Maybe one day we can get rid of it. */
783 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
784 #endif
785 
786 #ifdef DEBUG
787 	printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
788 	       __func__, addr, reg, val);
789 #endif
790 
791 	i2c_write(addr, reg, 1, &val, 1);
792 }
793 
794 /*
795  * Functions for setting the current I2C bus and its speed
796  */
797 
798 /*
799  * i2c_set_bus_num:
800  *
801  *  Change the active I2C bus.  Subsequent read/write calls will
802  *  go to this one.
803  *
804  *	bus - bus index, zero based
805  *
806  *	Returns: 0 on success, not 0 on failure
807  *
808  */
809 int i2c_set_bus_num(unsigned int bus);
810 
811 /*
812  * i2c_get_bus_num:
813  *
814  *  Returns index of currently active I2C bus.  Zero-based.
815  */
816 
817 unsigned int i2c_get_bus_num(void);
818 
819 /*
820  * i2c_set_bus_speed:
821  *
822  *  Change the speed of the active I2C bus
823  *
824  *	speed - bus speed in Hz
825  *
826  *	Returns: 0 on success, not 0 on failure
827  *
828  */
829 int i2c_set_bus_speed(unsigned int);
830 
831 /*
832  * i2c_get_bus_speed:
833  *
834  *  Returns speed of currently active I2C bus in Hz
835  */
836 
837 unsigned int i2c_get_bus_speed(void);
838 #endif /* CONFIG_SYS_I2C */
839 
840 /*
841  * only for backwardcompatibility, should go away if we switched
842  * completely to new multibus support.
843  */
844 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
845 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
846 #  define CONFIG_SYS_MAX_I2C_BUS		2
847 # endif
848 # define I2C_MULTI_BUS				1
849 #else
850 # define CONFIG_SYS_MAX_I2C_BUS		1
851 # define I2C_MULTI_BUS				0
852 #endif
853 
854 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
855 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
856 static inline unsigned int I2C_GET_BUS(void)
857 {
858 	return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
859 }
860 
861 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
862 static inline void I2C_SET_BUS(unsigned int bus)
863 {
864 	if (I2C_MULTI_BUS)
865 		i2c_set_bus_num(bus);
866 }
867 
868 /* Multi I2C definitions */
869 enum {
870 	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
871 	I2C_8, I2C_9, I2C_10,
872 };
873 
874 /* Multi I2C busses handling */
875 #ifdef CONFIG_SOFT_I2C_MULTI_BUS
876 extern int get_multi_scl_pin(void);
877 extern int get_multi_sda_pin(void);
878 extern int multi_i2c_init(void);
879 #endif
880 
881 /**
882  * Get FDT values for i2c bus.
883  *
884  * @param blob  Device tree blbo
885  * @return the number of I2C bus
886  */
887 void board_i2c_init(const void *blob);
888 
889 /**
890  * Find the I2C bus number by given a FDT I2C node.
891  *
892  * @param blob  Device tree blbo
893  * @param node  FDT I2C node to find
894  * @return the number of I2C bus (zero based), or -1 on error
895  */
896 int i2c_get_bus_num_fdt(int node);
897 
898 /**
899  * Reset the I2C bus represented by the given a FDT I2C node.
900  *
901  * @param blob  Device tree blbo
902  * @param node  FDT I2C node to find
903  * @return 0 if port was reset, -1 if not found
904  */
905 int i2c_reset_port_fdt(const void *blob, int node);
906 
907 #endif /* !CONFIG_DM_I2C */
908 
909 #endif	/* _I2C_H_ */
910