1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * The original I2C interface was 12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 13 * AIRVENT SAM s.p.a - RIMINI(ITALY) 14 * but has been changed substantially. 15 */ 16 17 #ifndef _I2C_H_ 18 #define _I2C_H_ 19 20 /* 21 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 22 * 23 * The implementation MUST NOT use static or global variables if the 24 * I2C routines are used to read SDRAM configuration information 25 * because this is done before the memories are initialized. Limited 26 * use of stack-based variables are OK (the initial stack size is 27 * limited). 28 * 29 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 30 */ 31 32 /* 33 * Configuration items. 34 */ 35 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 36 37 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 38 /* no muxes used bus = i2c adapters */ 39 #define CONFIG_SYS_I2C_DIRECT_BUS 1 40 #define CONFIG_SYS_I2C_MAX_HOPS 0 41 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 42 #else 43 /* we use i2c muxes */ 44 #undef CONFIG_SYS_I2C_DIRECT_BUS 45 #endif 46 47 /* define the I2C bus number for RTC and DTT if not already done */ 48 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 49 #define CONFIG_SYS_RTC_BUS_NUM 0 50 #endif 51 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 52 #define CONFIG_SYS_DTT_BUS_NUM 0 53 #endif 54 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 55 #define CONFIG_SYS_SPD_BUS_NUM 0 56 #endif 57 58 struct i2c_adapter { 59 void (*init)(struct i2c_adapter *adap, int speed, 60 int slaveaddr); 61 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 62 int (*read)(struct i2c_adapter *adap, uint8_t chip, 63 uint addr, int alen, uint8_t *buffer, 64 int len); 65 int (*write)(struct i2c_adapter *adap, uint8_t chip, 66 uint addr, int alen, uint8_t *buffer, 67 int len); 68 uint (*set_bus_speed)(struct i2c_adapter *adap, 69 uint speed); 70 int speed; 71 int slaveaddr; 72 int init_done; 73 int hwadapnr; 74 char *name; 75 }; 76 77 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 78 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 79 { \ 80 .init = _init, \ 81 .probe = _probe, \ 82 .read = _read, \ 83 .write = _write, \ 84 .set_bus_speed = _set_speed, \ 85 .speed = _speed, \ 86 .slaveaddr = _slaveaddr, \ 87 .init_done = 0, \ 88 .hwadapnr = _hwadapnr, \ 89 .name = #_name \ 90 }; 91 92 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 93 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 94 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 95 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 96 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 97 98 struct i2c_adapter *i2c_get_adapter(int index); 99 100 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 101 struct i2c_mux { 102 int id; 103 char name[16]; 104 }; 105 106 struct i2c_next_hop { 107 struct i2c_mux mux; 108 uint8_t chip; 109 uint8_t channel; 110 }; 111 112 struct i2c_bus_hose { 113 int adapter; 114 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 115 }; 116 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 117 extern struct i2c_bus_hose i2c_bus[]; 118 119 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 120 #else 121 #define I2C_ADAPTER(bus) bus 122 #endif 123 #define I2C_BUS gd->cur_i2c_bus 124 125 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 126 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 127 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 128 129 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 130 #define I2C_MUX_PCA9540_ID 1 131 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 132 #define I2C_MUX_PCA9542_ID 2 133 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 134 #define I2C_MUX_PCA9544_ID 3 135 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 136 #define I2C_MUX_PCA9547_ID 4 137 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 138 #define I2C_MUX_PCA9548_ID 5 139 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 140 #endif 141 142 #ifndef I2C_SOFT_DECLARATIONS 143 # if defined(CONFIG_MPC8260) 144 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 145 # elif defined(CONFIG_8xx) 146 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 147 148 # elif (defined(CONFIG_AT91RM9200) || \ 149 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 150 defined(CONFIG_AT91SAM9263)) && !defined(CONFIG_AT91_LEGACY) 151 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 152 # else 153 # define I2C_SOFT_DECLARATIONS 154 # endif 155 #endif 156 157 #ifdef CONFIG_8xx 158 /* Set default value for the I2C bus speed on 8xx. In the 159 * future, we'll define these in all 8xx board config files. 160 */ 161 #ifndef CONFIG_SYS_I2C_SPEED 162 #define CONFIG_SYS_I2C_SPEED 50000 163 #endif 164 #endif 165 166 /* 167 * Many boards/controllers/drivers don't support an I2C slave interface so 168 * provide a default slave address for them for use in common code. A real 169 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 170 * support a slave interface. 171 */ 172 #ifndef CONFIG_SYS_I2C_SLAVE 173 #define CONFIG_SYS_I2C_SLAVE 0xfe 174 #endif 175 176 /* 177 * Initialization, must be called once on start up, may be called 178 * repeatedly to change the speed and slave addresses. 179 */ 180 void i2c_init(int speed, int slaveaddr); 181 void i2c_init_board(void); 182 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 183 void i2c_board_late_init(void); 184 #endif 185 186 #ifdef CONFIG_SYS_I2C 187 /* 188 * i2c_get_bus_num: 189 * 190 * Returns index of currently active I2C bus. Zero-based. 191 */ 192 unsigned int i2c_get_bus_num(void); 193 194 /* 195 * i2c_set_bus_num: 196 * 197 * Change the active I2C bus. Subsequent read/write calls will 198 * go to this one. 199 * 200 * bus - bus index, zero based 201 * 202 * Returns: 0 on success, not 0 on failure 203 * 204 */ 205 int i2c_set_bus_num(unsigned int bus); 206 207 /* 208 * i2c_init_all(): 209 * 210 * Initializes all I2C adapters in the system. All i2c_adap structures must 211 * be initialized beforehead with function pointers and data, including 212 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 213 */ 214 void i2c_init_all(void); 215 216 /* 217 * Probe the given I2C chip address. Returns 0 if a chip responded, 218 * not 0 on failure. 219 */ 220 int i2c_probe(uint8_t chip); 221 222 /* 223 * Read/Write interface: 224 * chip: I2C chip address, range 0..127 225 * addr: Memory (register) address within the chip 226 * alen: Number of bytes to use for addr (typically 1, 2 for larger 227 * memories, 0 for register type devices with only one 228 * register) 229 * buffer: Where to read/write the data 230 * len: How many bytes to read/write 231 * 232 * Returns: 0 on success, not 0 on failure 233 */ 234 int i2c_read(uint8_t chip, unsigned int addr, int alen, 235 uint8_t *buffer, int len); 236 237 int i2c_write(uint8_t chip, unsigned int addr, int alen, 238 uint8_t *buffer, int len); 239 240 /* 241 * Utility routines to read/write registers. 242 */ 243 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 244 245 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 246 247 /* 248 * i2c_set_bus_speed: 249 * 250 * Change the speed of the active I2C bus 251 * 252 * speed - bus speed in Hz 253 * 254 * Returns: new bus speed 255 * 256 */ 257 unsigned int i2c_set_bus_speed(unsigned int speed); 258 259 /* 260 * i2c_get_bus_speed: 261 * 262 * Returns speed of currently active I2C bus in Hz 263 */ 264 265 unsigned int i2c_get_bus_speed(void); 266 267 /* 268 * i2c_reloc_fixup: 269 * 270 * Adjusts I2C pointers after U-Boot is relocated to DRAM 271 */ 272 void i2c_reloc_fixup(void); 273 #if defined(CONFIG_SYS_I2C_SOFT) 274 void i2c_soft_init(void); 275 void i2c_soft_active(void); 276 void i2c_soft_tristate(void); 277 int i2c_soft_read(void); 278 void i2c_soft_sda(int bit); 279 void i2c_soft_scl(int bit); 280 void i2c_soft_delay(void); 281 #endif 282 #else 283 284 /* 285 * Probe the given I2C chip address. Returns 0 if a chip responded, 286 * not 0 on failure. 287 */ 288 int i2c_probe(uchar chip); 289 290 /* 291 * Read/Write interface: 292 * chip: I2C chip address, range 0..127 293 * addr: Memory (register) address within the chip 294 * alen: Number of bytes to use for addr (typically 1, 2 for larger 295 * memories, 0 for register type devices with only one 296 * register) 297 * buffer: Where to read/write the data 298 * len: How many bytes to read/write 299 * 300 * Returns: 0 on success, not 0 on failure 301 */ 302 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 303 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 304 305 /* 306 * Utility routines to read/write registers. 307 */ 308 static inline u8 i2c_reg_read(u8 addr, u8 reg) 309 { 310 u8 buf; 311 312 #ifdef CONFIG_8xx 313 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 314 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 315 #endif 316 317 #ifdef DEBUG 318 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 319 #endif 320 321 i2c_read(addr, reg, 1, &buf, 1); 322 323 return buf; 324 } 325 326 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 327 { 328 #ifdef CONFIG_8xx 329 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 330 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 331 #endif 332 333 #ifdef DEBUG 334 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 335 __func__, addr, reg, val); 336 #endif 337 338 i2c_write(addr, reg, 1, &val, 1); 339 } 340 341 /* 342 * Functions for setting the current I2C bus and its speed 343 */ 344 345 /* 346 * i2c_set_bus_num: 347 * 348 * Change the active I2C bus. Subsequent read/write calls will 349 * go to this one. 350 * 351 * bus - bus index, zero based 352 * 353 * Returns: 0 on success, not 0 on failure 354 * 355 */ 356 int i2c_set_bus_num(unsigned int bus); 357 358 /* 359 * i2c_get_bus_num: 360 * 361 * Returns index of currently active I2C bus. Zero-based. 362 */ 363 364 unsigned int i2c_get_bus_num(void); 365 366 /* 367 * i2c_set_bus_speed: 368 * 369 * Change the speed of the active I2C bus 370 * 371 * speed - bus speed in Hz 372 * 373 * Returns: 0 on success, not 0 on failure 374 * 375 */ 376 int i2c_set_bus_speed(unsigned int); 377 378 /* 379 * i2c_get_bus_speed: 380 * 381 * Returns speed of currently active I2C bus in Hz 382 */ 383 384 unsigned int i2c_get_bus_speed(void); 385 #endif /* CONFIG_SYS_I2C */ 386 387 /* 388 * only for backwardcompatibility, should go away if we switched 389 * completely to new multibus support. 390 */ 391 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 392 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 393 # define CONFIG_SYS_MAX_I2C_BUS 2 394 # endif 395 # define I2C_MULTI_BUS 1 396 #else 397 # define CONFIG_SYS_MAX_I2C_BUS 1 398 # define I2C_MULTI_BUS 0 399 #endif 400 401 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 402 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 403 static inline unsigned int I2C_GET_BUS(void) 404 { 405 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 406 } 407 408 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 409 static inline void I2C_SET_BUS(unsigned int bus) 410 { 411 if (I2C_MULTI_BUS) 412 i2c_set_bus_num(bus); 413 } 414 415 /* Multi I2C definitions */ 416 enum { 417 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 418 I2C_8, I2C_9, I2C_10, 419 }; 420 421 /* Multi I2C busses handling */ 422 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 423 extern int get_multi_scl_pin(void); 424 extern int get_multi_sda_pin(void); 425 extern int multi_i2c_init(void); 426 #endif 427 428 /** 429 * Get FDT values for i2c bus. 430 * 431 * @param blob Device tree blbo 432 * @return the number of I2C bus 433 */ 434 void board_i2c_init(const void *blob); 435 436 /** 437 * Find the I2C bus number by given a FDT I2C node. 438 * 439 * @param blob Device tree blbo 440 * @param node FDT I2C node to find 441 * @return the number of I2C bus (zero based), or -1 on error 442 */ 443 int i2c_get_bus_num_fdt(int node); 444 445 /** 446 * Reset the I2C bus represented by the given a FDT I2C node. 447 * 448 * @param blob Device tree blbo 449 * @param node FDT I2C node to find 450 * @return 0 if port was reset, -1 if not found 451 */ 452 int i2c_reset_port_fdt(const void *blob, int node); 453 #endif /* _I2C_H_ */ 454