1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * The original I2C interface was 12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 13 * AIRVENT SAM s.p.a - RIMINI(ITALY) 14 * but has been changed substantially. 15 */ 16 17 #ifndef _I2C_H_ 18 #define _I2C_H_ 19 20 /* 21 * For now there are essentially two parts to this file - driver model 22 * here at the top, and the older code below (with CONFIG_SYS_I2C being 23 * most recent). The plan is to migrate everything to driver model. 24 * The driver model structures and API are separate as they are different 25 * enough as to be incompatible for compilation purposes. 26 */ 27 28 enum dm_i2c_chip_flags { 29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ 30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ 31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ 32 }; 33 34 struct udevice; 35 /** 36 * struct dm_i2c_chip - information about an i2c chip 37 * 38 * An I2C chip is a device on the I2C bus. It sits at a particular address 39 * and normally supports 7-bit or 10-bit addressing. 40 * 41 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is 42 * the chip to examine. 43 * 44 * @chip_addr: Chip address on bus 45 * @offset_len: Length of offset in bytes. A single byte offset can 46 * represent up to 256 bytes. A value larger than 1 may be 47 * needed for larger devices. 48 * @flags: Flags for this chip (dm_i2c_chip_flags) 49 * @emul: Emulator for this chip address (only used for emulation) 50 */ 51 struct dm_i2c_chip { 52 uint chip_addr; 53 uint offset_len; 54 uint flags; 55 #ifdef CONFIG_SANDBOX 56 struct udevice *emul; 57 bool test_mode; 58 #endif 59 }; 60 61 /** 62 * struct dm_i2c_bus- information about an i2c bus 63 * 64 * An I2C bus contains 0 or more chips on it, each at its own address. The 65 * bus can operate at different speeds (measured in Hz, typically 100KHz 66 * or 400KHz). 67 * 68 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the 69 * I2C bus udevice. 70 * 71 * @speed_hz: Bus speed in hertz (typically 100000) 72 */ 73 struct dm_i2c_bus { 74 int speed_hz; 75 }; 76 77 /** 78 * dm_i2c_read() - read bytes from an I2C chip 79 * 80 * To obtain an I2C device (called a 'chip') given the I2C bus address you 81 * can use i2c_get_chip(). To obtain a bus by bus number use 82 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). 83 * 84 * To set the address length of a devce use i2c_set_addr_len(). It 85 * defaults to 1. 86 * 87 * @dev: Chip to read from 88 * @offset: Offset within chip to start reading 89 * @buffer: Place to put data 90 * @len: Number of bytes to read 91 * 92 * @return 0 on success, -ve on failure 93 */ 94 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len); 95 96 /** 97 * dm_i2c_write() - write bytes to an I2C chip 98 * 99 * See notes for dm_i2c_read() above. 100 * 101 * @dev: Chip to write to 102 * @offset: Offset within chip to start writing 103 * @buffer: Buffer containing data to write 104 * @len: Number of bytes to write 105 * 106 * @return 0 on success, -ve on failure 107 */ 108 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, 109 int len); 110 111 /** 112 * dm_i2c_probe() - probe a particular chip address 113 * 114 * This can be useful to check for the existence of a chip on the bus. 115 * It is typically implemented by writing the chip address to the bus 116 * and checking that the chip replies with an ACK. 117 * 118 * @bus: Bus to probe 119 * @chip_addr: 7-bit address to probe (10-bit and others are not supported) 120 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) 121 * @devp: Returns the device found, or NULL if none 122 * @return 0 if a chip was found at that address, -ve if not 123 */ 124 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 125 struct udevice **devp); 126 127 /** 128 * dm_i2c_reg_read() - Read a value from an I2C register 129 * 130 * This reads a single value from the given address in an I2C chip 131 * 132 * @addr: Address to read from 133 * @return value read, or -ve on error 134 */ 135 int dm_i2c_reg_read(struct udevice *dev, uint offset); 136 137 /** 138 * dm_i2c_reg_write() - Write a value to an I2C register 139 * 140 * This writes a single value to the given address in an I2C chip 141 * 142 * @addr: Address to write to 143 * @val: Value to write (normally a byte) 144 * @return 0 on success, -ve on error 145 */ 146 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val); 147 148 /** 149 * dm_i2c_set_bus_speed() - set the speed of a bus 150 * 151 * @bus: Bus to adjust 152 * @speed: Requested speed in Hz 153 * @return 0 if OK, -EINVAL for invalid values 154 */ 155 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed); 156 157 /** 158 * dm_i2c_get_bus_speed() - get the speed of a bus 159 * 160 * @bus: Bus to check 161 * @return speed of selected I2C bus in Hz, -ve on error 162 */ 163 int dm_i2c_get_bus_speed(struct udevice *bus); 164 165 /** 166 * i2c_set_chip_flags() - set flags for a chip 167 * 168 * Typically addresses are 7 bits, but for 10-bit addresses you should set 169 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. 170 * 171 * @dev: Chip to adjust 172 * @flags: New flags 173 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error 174 */ 175 int i2c_set_chip_flags(struct udevice *dev, uint flags); 176 177 /** 178 * i2c_get_chip_flags() - get flags for a chip 179 * 180 * @dev: Chip to check 181 * @flagsp: Place to put flags 182 * @return 0 if OK, other -ve value on error 183 */ 184 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); 185 186 /** 187 * i2c_set_offset_len() - set the offset length for a chip 188 * 189 * The offset used to access a chip may be up to 4 bytes long. Typically it 190 * is only 1 byte, which is enough for chips with 256 bytes of memory or 191 * registers. The default value is 1, but you can call this function to 192 * change it. 193 * 194 * @offset_len: New offset length value (typically 1 or 2) 195 */ 196 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); 197 198 /** 199 * i2c_get_offset_len() - get the offset length for a chip 200 * 201 * @return: Current offset length value (typically 1 or 2) 202 */ 203 int i2c_get_chip_offset_len(struct udevice *dev); 204 205 /** 206 * i2c_deblock() - recover a bus that is in an unknown state 207 * 208 * See the deblock() method in 'struct dm_i2c_ops' for full information 209 * 210 * @bus: Bus to recover 211 * @return 0 if OK, -ve on error 212 */ 213 int i2c_deblock(struct udevice *bus); 214 215 #ifdef CONFIG_DM_I2C_COMPAT 216 /** 217 * i2c_probe() - Compatibility function for driver model 218 * 219 * Calls dm_i2c_probe() on the current bus 220 */ 221 int i2c_probe(uint8_t chip_addr); 222 223 /** 224 * i2c_read() - Compatibility function for driver model 225 * 226 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset 227 * set to @addr. @alen must match the current setting for the device. 228 */ 229 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 230 int len); 231 232 /** 233 * i2c_write() - Compatibility function for driver model 234 * 235 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset 236 * set to @addr. @alen must match the current setting for the device. 237 */ 238 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 239 int len); 240 241 /** 242 * i2c_get_bus_num_fdt() - Compatibility function for driver model 243 * 244 * @return the bus number associated with the given device tree node 245 */ 246 int i2c_get_bus_num_fdt(int node); 247 248 /** 249 * i2c_get_bus_num() - Compatibility function for driver model 250 * 251 * @return the 'current' bus number 252 */ 253 unsigned int i2c_get_bus_num(void); 254 255 /** 256 * i2c_set_bus_num() - Compatibility function for driver model 257 * 258 * Sets the 'current' bus 259 */ 260 int i2c_set_bus_num(unsigned int bus); 261 262 static inline void I2C_SET_BUS(unsigned int bus) 263 { 264 i2c_set_bus_num(bus); 265 } 266 267 static inline unsigned int I2C_GET_BUS(void) 268 { 269 return i2c_get_bus_num(); 270 } 271 272 /** 273 * i2c_init() - Compatibility function for driver model 274 * 275 * This function does nothing. 276 */ 277 void i2c_init(int speed, int slaveaddr); 278 279 /** 280 * board_i2c_init() - Compatibility function for driver model 281 * 282 * @param blob Device tree blbo 283 * @return the number of I2C bus 284 */ 285 void board_i2c_init(const void *blob); 286 287 /* 288 * Compatibility functions for driver model. 289 */ 290 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 291 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 292 293 #endif 294 295 /* 296 * Not all of these flags are implemented in the U-Boot API 297 */ 298 enum dm_i2c_msg_flags { 299 I2C_M_TEN = 0x0010, /* ten-bit chip address */ 300 I2C_M_RD = 0x0001, /* read data, from slave to master */ 301 I2C_M_STOP = 0x8000, /* send stop after this message */ 302 I2C_M_NOSTART = 0x4000, /* no start before this message */ 303 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ 304 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ 305 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ 306 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ 307 }; 308 309 /** 310 * struct i2c_msg - an I2C message 311 * 312 * @addr: Slave address 313 * @flags: Flags (see enum dm_i2c_msg_flags) 314 * @len: Length of buffer in bytes, may be 0 for a probe 315 * @buf: Buffer to send/receive, or NULL if no data 316 */ 317 struct i2c_msg { 318 uint addr; 319 uint flags; 320 uint len; 321 u8 *buf; 322 }; 323 324 /** 325 * struct i2c_msg_list - a list of I2C messages 326 * 327 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem 328 * appropriate in U-Boot. 329 * 330 * @msg: Pointer to i2c_msg array 331 * @nmsgs: Number of elements in the array 332 */ 333 struct i2c_msg_list { 334 struct i2c_msg *msgs; 335 uint nmsgs; 336 }; 337 338 /** 339 * struct dm_i2c_ops - driver operations for I2C uclass 340 * 341 * Drivers should support these operations unless otherwise noted. These 342 * operations are intended to be used by uclass code, not directly from 343 * other code. 344 */ 345 struct dm_i2c_ops { 346 /** 347 * xfer() - transfer a list of I2C messages 348 * 349 * @bus: Bus to read from 350 * @msg: List of messages to transfer 351 * @nmsgs: Number of messages in the list 352 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, 353 * -ECOMM if the speed cannot be supported, -EPROTO if the chip 354 * flags cannot be supported, other -ve value on some other error 355 */ 356 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); 357 358 /** 359 * probe_chip() - probe for the presense of a chip address 360 * 361 * This function is optional. If omitted, the uclass will send a zero 362 * length message instead. 363 * 364 * @bus: Bus to probe 365 * @chip_addr: Chip address to probe 366 * @chip_flags: Probe flags (enum dm_i2c_chip_flags) 367 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back 368 * to default probem other -ve value on error 369 */ 370 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); 371 372 /** 373 * set_bus_speed() - set the speed of a bus (optional) 374 * 375 * The bus speed value will be updated by the uclass if this function 376 * does not return an error. This method is optional - if it is not 377 * provided then the driver can read the speed from 378 * dev_get_uclass_priv(bus)->speed_hz 379 * 380 * @bus: Bus to adjust 381 * @speed: Requested speed in Hz 382 * @return 0 if OK, -EINVAL for invalid values 383 */ 384 int (*set_bus_speed)(struct udevice *bus, unsigned int speed); 385 386 /** 387 * get_bus_speed() - get the speed of a bus (optional) 388 * 389 * Normally this can be provided by the uclass, but if you want your 390 * driver to check the bus speed by looking at the hardware, you can 391 * implement that here. This method is optional. This method would 392 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz. 393 * 394 * @bus: Bus to check 395 * @return speed of selected I2C bus in Hz, -ve on error 396 */ 397 int (*get_bus_speed)(struct udevice *bus); 398 399 /** 400 * set_flags() - set the flags for a chip (optional) 401 * 402 * This is generally implemented by the uclass, but drivers can 403 * check the value to ensure that unsupported options are not used. 404 * This method is optional. If provided, this method will always be 405 * called when the flags change. 406 * 407 * @dev: Chip to adjust 408 * @flags: New flags value 409 * @return 0 if OK, -EINVAL if value is unsupported 410 */ 411 int (*set_flags)(struct udevice *dev, uint flags); 412 413 /** 414 * deblock() - recover a bus that is in an unknown state 415 * 416 * I2C is a synchronous protocol and resets of the processor in the 417 * middle of an access can block the I2C Bus until a powerdown of 418 * the full unit is done. This is because slaves can be stuck 419 * waiting for addition bus transitions for a transaction that will 420 * never complete. Resetting the I2C master does not help. The only 421 * way is to force the bus through a series of transitions to make 422 * sure that all slaves are done with the transaction. This method 423 * performs this 'deblocking' if support by the driver. 424 * 425 * This method is optional. 426 */ 427 int (*deblock)(struct udevice *bus); 428 }; 429 430 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) 431 432 /** 433 * i2c_get_chip() - get a device to use to access a chip on a bus 434 * 435 * This returns the device for the given chip address. The device can then 436 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. 437 * 438 * @bus: Bus to examine 439 * @chip_addr: Chip address for the new device 440 * @offset_len: Length of a register offset in bytes (normally 1) 441 * @devp: Returns pointer to new device if found or -ENODEV if not 442 * found 443 */ 444 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, 445 struct udevice **devp); 446 447 /** 448 * i2c_get_chip() - get a device to use to access a chip on a bus number 449 * 450 * This returns the device for the given chip address on a particular bus 451 * number. 452 * 453 * @busnum: Bus number to examine 454 * @chip_addr: Chip address for the new device 455 * @offset_len: Length of a register offset in bytes (normally 1) 456 * @devp: Returns pointer to new device if found or -ENODEV if not 457 * found 458 */ 459 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, 460 struct udevice **devp); 461 462 /** 463 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data 464 * 465 * This decodes the chip address from a device tree node and puts it into 466 * its dm_i2c_chip structure. This should be called in your driver's 467 * ofdata_to_platdata() method. 468 * 469 * @blob: Device tree blob 470 * @node: Node offset to read from 471 * @spi: Place to put the decoded information 472 */ 473 int i2c_chip_ofdata_to_platdata(const void *blob, int node, 474 struct dm_i2c_chip *chip); 475 476 #ifndef CONFIG_DM_I2C 477 478 /* 479 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 480 * 481 * The implementation MUST NOT use static or global variables if the 482 * I2C routines are used to read SDRAM configuration information 483 * because this is done before the memories are initialized. Limited 484 * use of stack-based variables are OK (the initial stack size is 485 * limited). 486 * 487 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 488 */ 489 490 /* 491 * Configuration items. 492 */ 493 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 494 495 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 496 /* no muxes used bus = i2c adapters */ 497 #define CONFIG_SYS_I2C_DIRECT_BUS 1 498 #define CONFIG_SYS_I2C_MAX_HOPS 0 499 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 500 #else 501 /* we use i2c muxes */ 502 #undef CONFIG_SYS_I2C_DIRECT_BUS 503 #endif 504 505 /* define the I2C bus number for RTC and DTT if not already done */ 506 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 507 #define CONFIG_SYS_RTC_BUS_NUM 0 508 #endif 509 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 510 #define CONFIG_SYS_DTT_BUS_NUM 0 511 #endif 512 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 513 #define CONFIG_SYS_SPD_BUS_NUM 0 514 #endif 515 516 struct i2c_adapter { 517 void (*init)(struct i2c_adapter *adap, int speed, 518 int slaveaddr); 519 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 520 int (*read)(struct i2c_adapter *adap, uint8_t chip, 521 uint addr, int alen, uint8_t *buffer, 522 int len); 523 int (*write)(struct i2c_adapter *adap, uint8_t chip, 524 uint addr, int alen, uint8_t *buffer, 525 int len); 526 uint (*set_bus_speed)(struct i2c_adapter *adap, 527 uint speed); 528 int speed; 529 int waitdelay; 530 int slaveaddr; 531 int init_done; 532 int hwadapnr; 533 char *name; 534 }; 535 536 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 537 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 538 { \ 539 .init = _init, \ 540 .probe = _probe, \ 541 .read = _read, \ 542 .write = _write, \ 543 .set_bus_speed = _set_speed, \ 544 .speed = _speed, \ 545 .slaveaddr = _slaveaddr, \ 546 .init_done = 0, \ 547 .hwadapnr = _hwadapnr, \ 548 .name = #_name \ 549 }; 550 551 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 552 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 553 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 554 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 555 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 556 557 struct i2c_adapter *i2c_get_adapter(int index); 558 559 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 560 struct i2c_mux { 561 int id; 562 char name[16]; 563 }; 564 565 struct i2c_next_hop { 566 struct i2c_mux mux; 567 uint8_t chip; 568 uint8_t channel; 569 }; 570 571 struct i2c_bus_hose { 572 int adapter; 573 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 574 }; 575 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 576 extern struct i2c_bus_hose i2c_bus[]; 577 578 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 579 #else 580 #define I2C_ADAPTER(bus) bus 581 #endif 582 #define I2C_BUS gd->cur_i2c_bus 583 584 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 585 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 586 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 587 588 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 589 #define I2C_MUX_PCA9540_ID 1 590 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 591 #define I2C_MUX_PCA9542_ID 2 592 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 593 #define I2C_MUX_PCA9544_ID 3 594 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 595 #define I2C_MUX_PCA9547_ID 4 596 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 597 #define I2C_MUX_PCA9548_ID 5 598 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 599 #endif 600 601 #ifndef I2C_SOFT_DECLARATIONS 602 # if defined(CONFIG_MPC8260) 603 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 604 # elif defined(CONFIG_8xx) 605 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 606 607 # elif (defined(CONFIG_AT91RM9200) || \ 608 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 609 defined(CONFIG_AT91SAM9263)) 610 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 611 # else 612 # define I2C_SOFT_DECLARATIONS 613 # endif 614 #endif 615 616 #ifdef CONFIG_8xx 617 /* Set default value for the I2C bus speed on 8xx. In the 618 * future, we'll define these in all 8xx board config files. 619 */ 620 #ifndef CONFIG_SYS_I2C_SPEED 621 #define CONFIG_SYS_I2C_SPEED 50000 622 #endif 623 #endif 624 625 /* 626 * Many boards/controllers/drivers don't support an I2C slave interface so 627 * provide a default slave address for them for use in common code. A real 628 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 629 * support a slave interface. 630 */ 631 #ifndef CONFIG_SYS_I2C_SLAVE 632 #define CONFIG_SYS_I2C_SLAVE 0xfe 633 #endif 634 635 /* 636 * Initialization, must be called once on start up, may be called 637 * repeatedly to change the speed and slave addresses. 638 */ 639 void i2c_init(int speed, int slaveaddr); 640 void i2c_init_board(void); 641 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 642 void i2c_board_late_init(void); 643 #endif 644 645 #ifdef CONFIG_SYS_I2C 646 /* 647 * i2c_get_bus_num: 648 * 649 * Returns index of currently active I2C bus. Zero-based. 650 */ 651 unsigned int i2c_get_bus_num(void); 652 653 /* 654 * i2c_set_bus_num: 655 * 656 * Change the active I2C bus. Subsequent read/write calls will 657 * go to this one. 658 * 659 * bus - bus index, zero based 660 * 661 * Returns: 0 on success, not 0 on failure 662 * 663 */ 664 int i2c_set_bus_num(unsigned int bus); 665 666 /* 667 * i2c_init_all(): 668 * 669 * Initializes all I2C adapters in the system. All i2c_adap structures must 670 * be initialized beforehead with function pointers and data, including 671 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 672 */ 673 void i2c_init_all(void); 674 675 /* 676 * Probe the given I2C chip address. Returns 0 if a chip responded, 677 * not 0 on failure. 678 */ 679 int i2c_probe(uint8_t chip); 680 681 /* 682 * Read/Write interface: 683 * chip: I2C chip address, range 0..127 684 * addr: Memory (register) address within the chip 685 * alen: Number of bytes to use for addr (typically 1, 2 for larger 686 * memories, 0 for register type devices with only one 687 * register) 688 * buffer: Where to read/write the data 689 * len: How many bytes to read/write 690 * 691 * Returns: 0 on success, not 0 on failure 692 */ 693 int i2c_read(uint8_t chip, unsigned int addr, int alen, 694 uint8_t *buffer, int len); 695 696 int i2c_write(uint8_t chip, unsigned int addr, int alen, 697 uint8_t *buffer, int len); 698 699 /* 700 * Utility routines to read/write registers. 701 */ 702 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 703 704 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 705 706 /* 707 * i2c_set_bus_speed: 708 * 709 * Change the speed of the active I2C bus 710 * 711 * speed - bus speed in Hz 712 * 713 * Returns: new bus speed 714 * 715 */ 716 unsigned int i2c_set_bus_speed(unsigned int speed); 717 718 /* 719 * i2c_get_bus_speed: 720 * 721 * Returns speed of currently active I2C bus in Hz 722 */ 723 724 unsigned int i2c_get_bus_speed(void); 725 726 /* 727 * i2c_reloc_fixup: 728 * 729 * Adjusts I2C pointers after U-Boot is relocated to DRAM 730 */ 731 void i2c_reloc_fixup(void); 732 #if defined(CONFIG_SYS_I2C_SOFT) 733 void i2c_soft_init(void); 734 void i2c_soft_active(void); 735 void i2c_soft_tristate(void); 736 int i2c_soft_read(void); 737 void i2c_soft_sda(int bit); 738 void i2c_soft_scl(int bit); 739 void i2c_soft_delay(void); 740 #endif 741 #else 742 743 /* 744 * Probe the given I2C chip address. Returns 0 if a chip responded, 745 * not 0 on failure. 746 */ 747 int i2c_probe(uchar chip); 748 749 /* 750 * Read/Write interface: 751 * chip: I2C chip address, range 0..127 752 * addr: Memory (register) address within the chip 753 * alen: Number of bytes to use for addr (typically 1, 2 for larger 754 * memories, 0 for register type devices with only one 755 * register) 756 * buffer: Where to read/write the data 757 * len: How many bytes to read/write 758 * 759 * Returns: 0 on success, not 0 on failure 760 */ 761 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 762 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 763 764 /* 765 * Utility routines to read/write registers. 766 */ 767 static inline u8 i2c_reg_read(u8 addr, u8 reg) 768 { 769 u8 buf; 770 771 #ifdef CONFIG_8xx 772 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 773 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 774 #endif 775 776 #ifdef DEBUG 777 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 778 #endif 779 780 i2c_read(addr, reg, 1, &buf, 1); 781 782 return buf; 783 } 784 785 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 786 { 787 #ifdef CONFIG_8xx 788 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 789 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 790 #endif 791 792 #ifdef DEBUG 793 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 794 __func__, addr, reg, val); 795 #endif 796 797 i2c_write(addr, reg, 1, &val, 1); 798 } 799 800 /* 801 * Functions for setting the current I2C bus and its speed 802 */ 803 804 /* 805 * i2c_set_bus_num: 806 * 807 * Change the active I2C bus. Subsequent read/write calls will 808 * go to this one. 809 * 810 * bus - bus index, zero based 811 * 812 * Returns: 0 on success, not 0 on failure 813 * 814 */ 815 int i2c_set_bus_num(unsigned int bus); 816 817 /* 818 * i2c_get_bus_num: 819 * 820 * Returns index of currently active I2C bus. Zero-based. 821 */ 822 823 unsigned int i2c_get_bus_num(void); 824 825 /* 826 * i2c_set_bus_speed: 827 * 828 * Change the speed of the active I2C bus 829 * 830 * speed - bus speed in Hz 831 * 832 * Returns: 0 on success, not 0 on failure 833 * 834 */ 835 int i2c_set_bus_speed(unsigned int); 836 837 /* 838 * i2c_get_bus_speed: 839 * 840 * Returns speed of currently active I2C bus in Hz 841 */ 842 843 unsigned int i2c_get_bus_speed(void); 844 #endif /* CONFIG_SYS_I2C */ 845 846 /* 847 * only for backwardcompatibility, should go away if we switched 848 * completely to new multibus support. 849 */ 850 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 851 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 852 # define CONFIG_SYS_MAX_I2C_BUS 2 853 # endif 854 # define I2C_MULTI_BUS 1 855 #else 856 # define CONFIG_SYS_MAX_I2C_BUS 1 857 # define I2C_MULTI_BUS 0 858 #endif 859 860 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 861 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 862 static inline unsigned int I2C_GET_BUS(void) 863 { 864 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 865 } 866 867 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 868 static inline void I2C_SET_BUS(unsigned int bus) 869 { 870 if (I2C_MULTI_BUS) 871 i2c_set_bus_num(bus); 872 } 873 874 /* Multi I2C definitions */ 875 enum { 876 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 877 I2C_8, I2C_9, I2C_10, 878 }; 879 880 /* Multi I2C busses handling */ 881 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 882 extern int get_multi_scl_pin(void); 883 extern int get_multi_sda_pin(void); 884 extern int multi_i2c_init(void); 885 #endif 886 887 /** 888 * Get FDT values for i2c bus. 889 * 890 * @param blob Device tree blbo 891 * @return the number of I2C bus 892 */ 893 void board_i2c_init(const void *blob); 894 895 /** 896 * Find the I2C bus number by given a FDT I2C node. 897 * 898 * @param blob Device tree blbo 899 * @param node FDT I2C node to find 900 * @return the number of I2C bus (zero based), or -1 on error 901 */ 902 int i2c_get_bus_num_fdt(int node); 903 904 /** 905 * Reset the I2C bus represented by the given a FDT I2C node. 906 * 907 * @param blob Device tree blbo 908 * @param node FDT I2C node to find 909 * @return 0 if port was reset, -1 if not found 910 */ 911 int i2c_reset_port_fdt(const void *blob, int node); 912 913 #endif /* !CONFIG_DM_I2C */ 914 915 #endif /* _I2C_H_ */ 916