1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * The original I2C interface was 12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 13 * AIRVENT SAM s.p.a - RIMINI(ITALY) 14 * but has been changed substantially. 15 */ 16 17 #ifndef _I2C_H_ 18 #define _I2C_H_ 19 20 /* 21 * For now there are essentially two parts to this file - driver model 22 * here at the top, and the older code below (with CONFIG_SYS_I2C being 23 * most recent). The plan is to migrate everything to driver model. 24 * The driver model structures and API are separate as they are different 25 * enough as to be incompatible for compilation purposes. 26 */ 27 28 enum dm_i2c_chip_flags { 29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */ 30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */ 31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */ 32 }; 33 34 struct udevice; 35 /** 36 * struct dm_i2c_chip - information about an i2c chip 37 * 38 * An I2C chip is a device on the I2C bus. It sits at a particular address 39 * and normally supports 7-bit or 10-bit addressing. 40 * 41 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is 42 * the chip to examine. 43 * 44 * @chip_addr: Chip address on bus 45 * @offset_len: Length of offset in bytes. A single byte offset can 46 * represent up to 256 bytes. A value larger than 1 may be 47 * needed for larger devices. 48 * @flags: Flags for this chip (dm_i2c_chip_flags) 49 * @emul: Emulator for this chip address (only used for emulation) 50 */ 51 struct dm_i2c_chip { 52 uint chip_addr; 53 uint offset_len; 54 uint flags; 55 #ifdef CONFIG_SANDBOX 56 struct udevice *emul; 57 #endif 58 }; 59 60 /** 61 * struct dm_i2c_bus- information about an i2c bus 62 * 63 * An I2C bus contains 0 or more chips on it, each at its own address. The 64 * bus can operate at different speeds (measured in Hz, typically 100KHz 65 * or 400KHz). 66 * 67 * To obtain this structure, use bus->uclass_priv where bus is the I2C 68 * bus udevice. 69 * 70 * @speed_hz: Bus speed in hertz (typically 100000) 71 */ 72 struct dm_i2c_bus { 73 int speed_hz; 74 }; 75 76 /** 77 * dm_i2c_read() - read bytes from an I2C chip 78 * 79 * To obtain an I2C device (called a 'chip') given the I2C bus address you 80 * can use i2c_get_chip(). To obtain a bus by bus number use 81 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>). 82 * 83 * To set the address length of a devce use i2c_set_addr_len(). It 84 * defaults to 1. 85 * 86 * @dev: Chip to read from 87 * @offset: Offset within chip to start reading 88 * @buffer: Place to put data 89 * @len: Number of bytes to read 90 * 91 * @return 0 on success, -ve on failure 92 */ 93 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len); 94 95 /** 96 * dm_i2c_write() - write bytes to an I2C chip 97 * 98 * See notes for dm_i2c_read() above. 99 * 100 * @dev: Chip to write to 101 * @offset: Offset within chip to start writing 102 * @buffer: Buffer containing data to write 103 * @len: Number of bytes to write 104 * 105 * @return 0 on success, -ve on failure 106 */ 107 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, 108 int len); 109 110 /** 111 * dm_i2c_probe() - probe a particular chip address 112 * 113 * This can be useful to check for the existence of a chip on the bus. 114 * It is typically implemented by writing the chip address to the bus 115 * and checking that the chip replies with an ACK. 116 * 117 * @bus: Bus to probe 118 * @chip_addr: 7-bit address to probe (10-bit and others are not supported) 119 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) 120 * @devp: Returns the device found, or NULL if none 121 * @return 0 if a chip was found at that address, -ve if not 122 */ 123 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, 124 struct udevice **devp); 125 126 /** 127 * dm_i2c_set_bus_speed() - set the speed of a bus 128 * 129 * @bus: Bus to adjust 130 * @speed: Requested speed in Hz 131 * @return 0 if OK, -EINVAL for invalid values 132 */ 133 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed); 134 135 /** 136 * dm_i2c_get_bus_speed() - get the speed of a bus 137 * 138 * @bus: Bus to check 139 * @return speed of selected I2C bus in Hz, -ve on error 140 */ 141 int dm_i2c_get_bus_speed(struct udevice *bus); 142 143 /** 144 * i2c_set_chip_flags() - set flags for a chip 145 * 146 * Typically addresses are 7 bits, but for 10-bit addresses you should set 147 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing. 148 * 149 * @dev: Chip to adjust 150 * @flags: New flags 151 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error 152 */ 153 int i2c_set_chip_flags(struct udevice *dev, uint flags); 154 155 /** 156 * i2c_get_chip_flags() - get flags for a chip 157 * 158 * @dev: Chip to check 159 * @flagsp: Place to put flags 160 * @return 0 if OK, other -ve value on error 161 */ 162 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp); 163 164 /** 165 * i2c_set_offset_len() - set the offset length for a chip 166 * 167 * The offset used to access a chip may be up to 4 bytes long. Typically it 168 * is only 1 byte, which is enough for chips with 256 bytes of memory or 169 * registers. The default value is 1, but you can call this function to 170 * change it. 171 * 172 * @offset_len: New offset length value (typically 1 or 2) 173 */ 174 175 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len); 176 /** 177 * i2c_deblock() - recover a bus that is in an unknown state 178 * 179 * See the deblock() method in 'struct dm_i2c_ops' for full information 180 * 181 * @bus: Bus to recover 182 * @return 0 if OK, -ve on error 183 */ 184 int i2c_deblock(struct udevice *bus); 185 186 #ifdef CONFIG_DM_I2C_COMPAT 187 /** 188 * i2c_probe() - Compatibility function for driver model 189 * 190 * Calls dm_i2c_probe() on the current bus 191 */ 192 int i2c_probe(uint8_t chip_addr); 193 194 /** 195 * i2c_read() - Compatibility function for driver model 196 * 197 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset 198 * set to @addr. @alen must match the current setting for the device. 199 */ 200 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 201 int len); 202 203 /** 204 * i2c_write() - Compatibility function for driver model 205 * 206 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset 207 * set to @addr. @alen must match the current setting for the device. 208 */ 209 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer, 210 int len); 211 212 /** 213 * i2c_get_bus_num_fdt() - Compatibility function for driver model 214 * 215 * @return the bus number associated with the given device tree node 216 */ 217 int i2c_get_bus_num_fdt(int node); 218 219 /** 220 * i2c_get_bus_num() - Compatibility function for driver model 221 * 222 * @return the 'current' bus number 223 */ 224 unsigned int i2c_get_bus_num(void); 225 226 /** 227 * i2c_set_bus_num() - Compatibility function for driver model 228 * 229 * Sets the 'current' bus 230 */ 231 int i2c_set_bus_num(unsigned int bus); 232 233 static inline void I2C_SET_BUS(unsigned int bus) 234 { 235 i2c_set_bus_num(bus); 236 } 237 238 static inline unsigned int I2C_GET_BUS(void) 239 { 240 return i2c_get_bus_num(); 241 } 242 243 /** 244 * i2c_init() - Compatibility function for driver model 245 * 246 * This function does nothing. 247 */ 248 void i2c_init(int speed, int slaveaddr); 249 250 /** 251 * board_i2c_init() - Compatibility function for driver model 252 * 253 * @param blob Device tree blbo 254 * @return the number of I2C bus 255 */ 256 void board_i2c_init(const void *blob); 257 258 #endif 259 260 /* 261 * Not all of these flags are implemented in the U-Boot API 262 */ 263 enum dm_i2c_msg_flags { 264 I2C_M_TEN = 0x0010, /* ten-bit chip address */ 265 I2C_M_RD = 0x0001, /* read data, from slave to master */ 266 I2C_M_STOP = 0x8000, /* send stop after this message */ 267 I2C_M_NOSTART = 0x4000, /* no start before this message */ 268 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */ 269 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */ 270 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */ 271 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */ 272 }; 273 274 /** 275 * struct i2c_msg - an I2C message 276 * 277 * @addr: Slave address 278 * @flags: Flags (see enum dm_i2c_msg_flags) 279 * @len: Length of buffer in bytes, may be 0 for a probe 280 * @buf: Buffer to send/receive, or NULL if no data 281 */ 282 struct i2c_msg { 283 uint addr; 284 uint flags; 285 uint len; 286 u8 *buf; 287 }; 288 289 /** 290 * struct i2c_msg_list - a list of I2C messages 291 * 292 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem 293 * appropriate in U-Boot. 294 * 295 * @msg: Pointer to i2c_msg array 296 * @nmsgs: Number of elements in the array 297 */ 298 struct i2c_msg_list { 299 struct i2c_msg *msgs; 300 uint nmsgs; 301 }; 302 303 /** 304 * struct dm_i2c_ops - driver operations for I2C uclass 305 * 306 * Drivers should support these operations unless otherwise noted. These 307 * operations are intended to be used by uclass code, not directly from 308 * other code. 309 */ 310 struct dm_i2c_ops { 311 /** 312 * xfer() - transfer a list of I2C messages 313 * 314 * @bus: Bus to read from 315 * @msg: List of messages to transfer 316 * @nmsgs: Number of messages in the list 317 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte, 318 * -ECOMM if the speed cannot be supported, -EPROTO if the chip 319 * flags cannot be supported, other -ve value on some other error 320 */ 321 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs); 322 323 /** 324 * probe_chip() - probe for the presense of a chip address 325 * 326 * This function is optional. If omitted, the uclass will send a zero 327 * length message instead. 328 * 329 * @bus: Bus to probe 330 * @chip_addr: Chip address to probe 331 * @chip_flags: Probe flags (enum dm_i2c_chip_flags) 332 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back 333 * to default probem other -ve value on error 334 */ 335 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags); 336 337 /** 338 * set_bus_speed() - set the speed of a bus (optional) 339 * 340 * The bus speed value will be updated by the uclass if this function 341 * does not return an error. This method is optional - if it is not 342 * provided then the driver can read the speed from 343 * bus->uclass_priv->speed_hz 344 * 345 * @bus: Bus to adjust 346 * @speed: Requested speed in Hz 347 * @return 0 if OK, -EINVAL for invalid values 348 */ 349 int (*set_bus_speed)(struct udevice *bus, unsigned int speed); 350 351 /** 352 * get_bus_speed() - get the speed of a bus (optional) 353 * 354 * Normally this can be provided by the uclass, but if you want your 355 * driver to check the bus speed by looking at the hardware, you can 356 * implement that here. This method is optional. This method would 357 * normally be expected to return bus->uclass_priv->speed_hz. 358 * 359 * @bus: Bus to check 360 * @return speed of selected I2C bus in Hz, -ve on error 361 */ 362 int (*get_bus_speed)(struct udevice *bus); 363 364 /** 365 * set_flags() - set the flags for a chip (optional) 366 * 367 * This is generally implemented by the uclass, but drivers can 368 * check the value to ensure that unsupported options are not used. 369 * This method is optional. If provided, this method will always be 370 * called when the flags change. 371 * 372 * @dev: Chip to adjust 373 * @flags: New flags value 374 * @return 0 if OK, -EINVAL if value is unsupported 375 */ 376 int (*set_flags)(struct udevice *dev, uint flags); 377 378 /** 379 * deblock() - recover a bus that is in an unknown state 380 * 381 * I2C is a synchronous protocol and resets of the processor in the 382 * middle of an access can block the I2C Bus until a powerdown of 383 * the full unit is done. This is because slaves can be stuck 384 * waiting for addition bus transitions for a transaction that will 385 * never complete. Resetting the I2C master does not help. The only 386 * way is to force the bus through a series of transitions to make 387 * sure that all slaves are done with the transaction. This method 388 * performs this 'deblocking' if support by the driver. 389 * 390 * This method is optional. 391 */ 392 int (*deblock)(struct udevice *bus); 393 }; 394 395 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops) 396 397 /** 398 * i2c_get_chip() - get a device to use to access a chip on a bus 399 * 400 * This returns the device for the given chip address. The device can then 401 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc. 402 * 403 * @bus: Bus to examine 404 * @chip_addr: Chip address for the new device 405 * @offset_len: Length of a register offset in bytes (normally 1) 406 * @devp: Returns pointer to new device if found or -ENODEV if not 407 * found 408 */ 409 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, 410 struct udevice **devp); 411 412 /** 413 * i2c_get_chip() - get a device to use to access a chip on a bus number 414 * 415 * This returns the device for the given chip address on a particular bus 416 * number. 417 * 418 * @busnum: Bus number to examine 419 * @chip_addr: Chip address for the new device 420 * @offset_len: Length of a register offset in bytes (normally 1) 421 * @devp: Returns pointer to new device if found or -ENODEV if not 422 * found 423 */ 424 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, 425 struct udevice **devp); 426 427 /** 428 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data 429 * 430 * This decodes the chip address from a device tree node and puts it into 431 * its dm_i2c_chip structure. This should be called in your driver's 432 * ofdata_to_platdata() method. 433 * 434 * @blob: Device tree blob 435 * @node: Node offset to read from 436 * @spi: Place to put the decoded information 437 */ 438 int i2c_chip_ofdata_to_platdata(const void *blob, int node, 439 struct dm_i2c_chip *chip); 440 441 #ifndef CONFIG_DM_I2C 442 443 /* 444 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 445 * 446 * The implementation MUST NOT use static or global variables if the 447 * I2C routines are used to read SDRAM configuration information 448 * because this is done before the memories are initialized. Limited 449 * use of stack-based variables are OK (the initial stack size is 450 * limited). 451 * 452 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 453 */ 454 455 /* 456 * Configuration items. 457 */ 458 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 459 460 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 461 /* no muxes used bus = i2c adapters */ 462 #define CONFIG_SYS_I2C_DIRECT_BUS 1 463 #define CONFIG_SYS_I2C_MAX_HOPS 0 464 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 465 #else 466 /* we use i2c muxes */ 467 #undef CONFIG_SYS_I2C_DIRECT_BUS 468 #endif 469 470 /* define the I2C bus number for RTC and DTT if not already done */ 471 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 472 #define CONFIG_SYS_RTC_BUS_NUM 0 473 #endif 474 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 475 #define CONFIG_SYS_DTT_BUS_NUM 0 476 #endif 477 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 478 #define CONFIG_SYS_SPD_BUS_NUM 0 479 #endif 480 481 struct i2c_adapter { 482 void (*init)(struct i2c_adapter *adap, int speed, 483 int slaveaddr); 484 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 485 int (*read)(struct i2c_adapter *adap, uint8_t chip, 486 uint addr, int alen, uint8_t *buffer, 487 int len); 488 int (*write)(struct i2c_adapter *adap, uint8_t chip, 489 uint addr, int alen, uint8_t *buffer, 490 int len); 491 uint (*set_bus_speed)(struct i2c_adapter *adap, 492 uint speed); 493 int speed; 494 int waitdelay; 495 int slaveaddr; 496 int init_done; 497 int hwadapnr; 498 char *name; 499 }; 500 501 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 502 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 503 { \ 504 .init = _init, \ 505 .probe = _probe, \ 506 .read = _read, \ 507 .write = _write, \ 508 .set_bus_speed = _set_speed, \ 509 .speed = _speed, \ 510 .slaveaddr = _slaveaddr, \ 511 .init_done = 0, \ 512 .hwadapnr = _hwadapnr, \ 513 .name = #_name \ 514 }; 515 516 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 517 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 518 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 519 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 520 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 521 522 struct i2c_adapter *i2c_get_adapter(int index); 523 524 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 525 struct i2c_mux { 526 int id; 527 char name[16]; 528 }; 529 530 struct i2c_next_hop { 531 struct i2c_mux mux; 532 uint8_t chip; 533 uint8_t channel; 534 }; 535 536 struct i2c_bus_hose { 537 int adapter; 538 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 539 }; 540 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 541 extern struct i2c_bus_hose i2c_bus[]; 542 543 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 544 #else 545 #define I2C_ADAPTER(bus) bus 546 #endif 547 #define I2C_BUS gd->cur_i2c_bus 548 549 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 550 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 551 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 552 553 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 554 #define I2C_MUX_PCA9540_ID 1 555 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 556 #define I2C_MUX_PCA9542_ID 2 557 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 558 #define I2C_MUX_PCA9544_ID 3 559 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 560 #define I2C_MUX_PCA9547_ID 4 561 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 562 #define I2C_MUX_PCA9548_ID 5 563 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} 564 #endif 565 566 #ifndef I2C_SOFT_DECLARATIONS 567 # if defined(CONFIG_MPC8260) 568 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 569 # elif defined(CONFIG_8xx) 570 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 571 572 # elif (defined(CONFIG_AT91RM9200) || \ 573 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 574 defined(CONFIG_AT91SAM9263)) 575 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 576 # else 577 # define I2C_SOFT_DECLARATIONS 578 # endif 579 #endif 580 581 #ifdef CONFIG_8xx 582 /* Set default value for the I2C bus speed on 8xx. In the 583 * future, we'll define these in all 8xx board config files. 584 */ 585 #ifndef CONFIG_SYS_I2C_SPEED 586 #define CONFIG_SYS_I2C_SPEED 50000 587 #endif 588 #endif 589 590 /* 591 * Many boards/controllers/drivers don't support an I2C slave interface so 592 * provide a default slave address for them for use in common code. A real 593 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 594 * support a slave interface. 595 */ 596 #ifndef CONFIG_SYS_I2C_SLAVE 597 #define CONFIG_SYS_I2C_SLAVE 0xfe 598 #endif 599 600 /* 601 * Initialization, must be called once on start up, may be called 602 * repeatedly to change the speed and slave addresses. 603 */ 604 void i2c_init(int speed, int slaveaddr); 605 void i2c_init_board(void); 606 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 607 void i2c_board_late_init(void); 608 #endif 609 610 #ifdef CONFIG_SYS_I2C 611 /* 612 * i2c_get_bus_num: 613 * 614 * Returns index of currently active I2C bus. Zero-based. 615 */ 616 unsigned int i2c_get_bus_num(void); 617 618 /* 619 * i2c_set_bus_num: 620 * 621 * Change the active I2C bus. Subsequent read/write calls will 622 * go to this one. 623 * 624 * bus - bus index, zero based 625 * 626 * Returns: 0 on success, not 0 on failure 627 * 628 */ 629 int i2c_set_bus_num(unsigned int bus); 630 631 /* 632 * i2c_init_all(): 633 * 634 * Initializes all I2C adapters in the system. All i2c_adap structures must 635 * be initialized beforehead with function pointers and data, including 636 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 637 */ 638 void i2c_init_all(void); 639 640 /* 641 * Probe the given I2C chip address. Returns 0 if a chip responded, 642 * not 0 on failure. 643 */ 644 int i2c_probe(uint8_t chip); 645 646 /* 647 * Read/Write interface: 648 * chip: I2C chip address, range 0..127 649 * addr: Memory (register) address within the chip 650 * alen: Number of bytes to use for addr (typically 1, 2 for larger 651 * memories, 0 for register type devices with only one 652 * register) 653 * buffer: Where to read/write the data 654 * len: How many bytes to read/write 655 * 656 * Returns: 0 on success, not 0 on failure 657 */ 658 int i2c_read(uint8_t chip, unsigned int addr, int alen, 659 uint8_t *buffer, int len); 660 661 int i2c_write(uint8_t chip, unsigned int addr, int alen, 662 uint8_t *buffer, int len); 663 664 /* 665 * Utility routines to read/write registers. 666 */ 667 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 668 669 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 670 671 /* 672 * i2c_set_bus_speed: 673 * 674 * Change the speed of the active I2C bus 675 * 676 * speed - bus speed in Hz 677 * 678 * Returns: new bus speed 679 * 680 */ 681 unsigned int i2c_set_bus_speed(unsigned int speed); 682 683 /* 684 * i2c_get_bus_speed: 685 * 686 * Returns speed of currently active I2C bus in Hz 687 */ 688 689 unsigned int i2c_get_bus_speed(void); 690 691 /* 692 * i2c_reloc_fixup: 693 * 694 * Adjusts I2C pointers after U-Boot is relocated to DRAM 695 */ 696 void i2c_reloc_fixup(void); 697 #if defined(CONFIG_SYS_I2C_SOFT) 698 void i2c_soft_init(void); 699 void i2c_soft_active(void); 700 void i2c_soft_tristate(void); 701 int i2c_soft_read(void); 702 void i2c_soft_sda(int bit); 703 void i2c_soft_scl(int bit); 704 void i2c_soft_delay(void); 705 #endif 706 #else 707 708 /* 709 * Probe the given I2C chip address. Returns 0 if a chip responded, 710 * not 0 on failure. 711 */ 712 int i2c_probe(uchar chip); 713 714 /* 715 * Read/Write interface: 716 * chip: I2C chip address, range 0..127 717 * addr: Memory (register) address within the chip 718 * alen: Number of bytes to use for addr (typically 1, 2 for larger 719 * memories, 0 for register type devices with only one 720 * register) 721 * buffer: Where to read/write the data 722 * len: How many bytes to read/write 723 * 724 * Returns: 0 on success, not 0 on failure 725 */ 726 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 727 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 728 729 /* 730 * Utility routines to read/write registers. 731 */ 732 static inline u8 i2c_reg_read(u8 addr, u8 reg) 733 { 734 u8 buf; 735 736 #ifdef CONFIG_8xx 737 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 738 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 739 #endif 740 741 #ifdef DEBUG 742 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 743 #endif 744 745 i2c_read(addr, reg, 1, &buf, 1); 746 747 return buf; 748 } 749 750 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 751 { 752 #ifdef CONFIG_8xx 753 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 754 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 755 #endif 756 757 #ifdef DEBUG 758 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 759 __func__, addr, reg, val); 760 #endif 761 762 i2c_write(addr, reg, 1, &val, 1); 763 } 764 765 /* 766 * Functions for setting the current I2C bus and its speed 767 */ 768 769 /* 770 * i2c_set_bus_num: 771 * 772 * Change the active I2C bus. Subsequent read/write calls will 773 * go to this one. 774 * 775 * bus - bus index, zero based 776 * 777 * Returns: 0 on success, not 0 on failure 778 * 779 */ 780 int i2c_set_bus_num(unsigned int bus); 781 782 /* 783 * i2c_get_bus_num: 784 * 785 * Returns index of currently active I2C bus. Zero-based. 786 */ 787 788 unsigned int i2c_get_bus_num(void); 789 790 /* 791 * i2c_set_bus_speed: 792 * 793 * Change the speed of the active I2C bus 794 * 795 * speed - bus speed in Hz 796 * 797 * Returns: 0 on success, not 0 on failure 798 * 799 */ 800 int i2c_set_bus_speed(unsigned int); 801 802 /* 803 * i2c_get_bus_speed: 804 * 805 * Returns speed of currently active I2C bus in Hz 806 */ 807 808 unsigned int i2c_get_bus_speed(void); 809 #endif /* CONFIG_SYS_I2C */ 810 811 /* 812 * only for backwardcompatibility, should go away if we switched 813 * completely to new multibus support. 814 */ 815 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 816 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 817 # define CONFIG_SYS_MAX_I2C_BUS 2 818 # endif 819 # define I2C_MULTI_BUS 1 820 #else 821 # define CONFIG_SYS_MAX_I2C_BUS 1 822 # define I2C_MULTI_BUS 0 823 #endif 824 825 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 826 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 827 static inline unsigned int I2C_GET_BUS(void) 828 { 829 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 830 } 831 832 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 833 static inline void I2C_SET_BUS(unsigned int bus) 834 { 835 if (I2C_MULTI_BUS) 836 i2c_set_bus_num(bus); 837 } 838 839 /* Multi I2C definitions */ 840 enum { 841 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 842 I2C_8, I2C_9, I2C_10, 843 }; 844 845 /* Multi I2C busses handling */ 846 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 847 extern int get_multi_scl_pin(void); 848 extern int get_multi_sda_pin(void); 849 extern int multi_i2c_init(void); 850 #endif 851 852 /** 853 * Get FDT values for i2c bus. 854 * 855 * @param blob Device tree blbo 856 * @return the number of I2C bus 857 */ 858 void board_i2c_init(const void *blob); 859 860 /** 861 * Find the I2C bus number by given a FDT I2C node. 862 * 863 * @param blob Device tree blbo 864 * @param node FDT I2C node to find 865 * @return the number of I2C bus (zero based), or -1 on error 866 */ 867 int i2c_get_bus_num_fdt(int node); 868 869 /** 870 * Reset the I2C bus represented by the given a FDT I2C node. 871 * 872 * @param blob Device tree blbo 873 * @param node FDT I2C node to find 874 * @return 0 if port was reset, -1 if not found 875 */ 876 int i2c_reset_port_fdt(const void *blob, int node); 877 878 #endif /* !CONFIG_DM_I2C */ 879 880 #endif /* _I2C_H_ */ 881