1 /* 2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> 3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de> 4 * Changes for multibus/multiadapter I2C support. 5 * 6 * (C) Copyright 2001 7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 * 11 * The original I2C interface was 12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 13 * AIRVENT SAM s.p.a - RIMINI(ITALY) 14 * but has been changed substantially. 15 */ 16 17 #ifndef _I2C_H_ 18 #define _I2C_H_ 19 20 /* 21 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 22 * 23 * The implementation MUST NOT use static or global variables if the 24 * I2C routines are used to read SDRAM configuration information 25 * because this is done before the memories are initialized. Limited 26 * use of stack-based variables are OK (the initial stack size is 27 * limited). 28 * 29 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 30 */ 31 32 /* 33 * Configuration items. 34 */ 35 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 36 37 #if !defined(CONFIG_SYS_I2C_MAX_HOPS) 38 /* no muxes used bus = i2c adapters */ 39 #define CONFIG_SYS_I2C_DIRECT_BUS 1 40 #define CONFIG_SYS_I2C_MAX_HOPS 0 41 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) 42 #else 43 /* we use i2c muxes */ 44 #undef CONFIG_SYS_I2C_DIRECT_BUS 45 #endif 46 47 /* define the I2C bus number for RTC and DTT if not already done */ 48 #if !defined(CONFIG_SYS_RTC_BUS_NUM) 49 #define CONFIG_SYS_RTC_BUS_NUM 0 50 #endif 51 #if !defined(CONFIG_SYS_DTT_BUS_NUM) 52 #define CONFIG_SYS_DTT_BUS_NUM 0 53 #endif 54 #if !defined(CONFIG_SYS_SPD_BUS_NUM) 55 #define CONFIG_SYS_SPD_BUS_NUM 0 56 #endif 57 58 struct i2c_adapter { 59 void (*init)(struct i2c_adapter *adap, int speed, 60 int slaveaddr); 61 int (*probe)(struct i2c_adapter *adap, uint8_t chip); 62 int (*read)(struct i2c_adapter *adap, uint8_t chip, 63 uint addr, int alen, uint8_t *buffer, 64 int len); 65 int (*write)(struct i2c_adapter *adap, uint8_t chip, 66 uint addr, int alen, uint8_t *buffer, 67 int len); 68 uint (*set_bus_speed)(struct i2c_adapter *adap, 69 uint speed); 70 int speed; 71 int slaveaddr; 72 int init_done; 73 int hwadapnr; 74 char *name; 75 }; 76 77 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 78 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \ 79 { \ 80 .init = _init, \ 81 .probe = _probe, \ 82 .read = _read, \ 83 .write = _write, \ 84 .set_bus_speed = _set_speed, \ 85 .speed = _speed, \ 86 .slaveaddr = _slaveaddr, \ 87 .init_done = 0, \ 88 .hwadapnr = _hwadapnr, \ 89 .name = #_name \ 90 }; 91 92 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \ 93 _set_speed, _speed, _slaveaddr, _hwadapnr) \ 94 ll_entry_declare(struct i2c_adapter, _name, i2c) = \ 95 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \ 96 _set_speed, _speed, _slaveaddr, _hwadapnr, _name); 97 98 struct i2c_adapter *i2c_get_adapter(int index); 99 100 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 101 struct i2c_mux { 102 int id; 103 char name[16]; 104 }; 105 106 struct i2c_next_hop { 107 struct i2c_mux mux; 108 uint8_t chip; 109 uint8_t channel; 110 }; 111 112 struct i2c_bus_hose { 113 int adapter; 114 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; 115 }; 116 #define I2C_NULL_HOP {{-1, ""}, 0, 0} 117 extern struct i2c_bus_hose i2c_bus[]; 118 119 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter 120 #else 121 #define I2C_ADAPTER(bus) bus 122 #endif 123 #define I2C_BUS gd->cur_i2c_bus 124 125 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) 126 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) 127 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) 128 129 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 130 #define I2C_MUX_PCA9540_ID 1 131 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} 132 #define I2C_MUX_PCA9542_ID 2 133 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} 134 #define I2C_MUX_PCA9544_ID 3 135 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} 136 #define I2C_MUX_PCA9547_ID 4 137 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} 138 #endif 139 140 #ifndef I2C_SOFT_DECLARATIONS 141 # if defined(CONFIG_MPC8260) 142 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 143 # elif defined(CONFIG_8xx) 144 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 145 146 # elif (defined(CONFIG_AT91RM9200) || \ 147 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ 148 defined(CONFIG_AT91SAM9263)) && !defined(CONFIG_AT91_LEGACY) 149 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; 150 # else 151 # define I2C_SOFT_DECLARATIONS 152 # endif 153 #endif 154 155 #ifdef CONFIG_8xx 156 /* Set default value for the I2C bus speed on 8xx. In the 157 * future, we'll define these in all 8xx board config files. 158 */ 159 #ifndef CONFIG_SYS_I2C_SPEED 160 #define CONFIG_SYS_I2C_SPEED 50000 161 #endif 162 #endif 163 164 /* 165 * Many boards/controllers/drivers don't support an I2C slave interface so 166 * provide a default slave address for them for use in common code. A real 167 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does 168 * support a slave interface. 169 */ 170 #ifndef CONFIG_SYS_I2C_SLAVE 171 #define CONFIG_SYS_I2C_SLAVE 0xfe 172 #endif 173 174 /* 175 * Initialization, must be called once on start up, may be called 176 * repeatedly to change the speed and slave addresses. 177 */ 178 void i2c_init(int speed, int slaveaddr); 179 void i2c_init_board(void); 180 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 181 void i2c_board_late_init(void); 182 #endif 183 184 #ifdef CONFIG_SYS_I2C 185 /* 186 * i2c_get_bus_num: 187 * 188 * Returns index of currently active I2C bus. Zero-based. 189 */ 190 unsigned int i2c_get_bus_num(void); 191 192 /* 193 * i2c_set_bus_num: 194 * 195 * Change the active I2C bus. Subsequent read/write calls will 196 * go to this one. 197 * 198 * bus - bus index, zero based 199 * 200 * Returns: 0 on success, not 0 on failure 201 * 202 */ 203 int i2c_set_bus_num(unsigned int bus); 204 205 /* 206 * i2c_init_all(): 207 * 208 * Initializes all I2C adapters in the system. All i2c_adap structures must 209 * be initialized beforehead with function pointers and data, including 210 * speed and slaveaddr. Returns 0 on success, non-0 on failure. 211 */ 212 void i2c_init_all(void); 213 214 /* 215 * Probe the given I2C chip address. Returns 0 if a chip responded, 216 * not 0 on failure. 217 */ 218 int i2c_probe(uint8_t chip); 219 220 /* 221 * Read/Write interface: 222 * chip: I2C chip address, range 0..127 223 * addr: Memory (register) address within the chip 224 * alen: Number of bytes to use for addr (typically 1, 2 for larger 225 * memories, 0 for register type devices with only one 226 * register) 227 * buffer: Where to read/write the data 228 * len: How many bytes to read/write 229 * 230 * Returns: 0 on success, not 0 on failure 231 */ 232 int i2c_read(uint8_t chip, unsigned int addr, int alen, 233 uint8_t *buffer, int len); 234 235 int i2c_write(uint8_t chip, unsigned int addr, int alen, 236 uint8_t *buffer, int len); 237 238 /* 239 * Utility routines to read/write registers. 240 */ 241 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg); 242 243 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val); 244 245 /* 246 * i2c_set_bus_speed: 247 * 248 * Change the speed of the active I2C bus 249 * 250 * speed - bus speed in Hz 251 * 252 * Returns: new bus speed 253 * 254 */ 255 unsigned int i2c_set_bus_speed(unsigned int speed); 256 257 /* 258 * i2c_get_bus_speed: 259 * 260 * Returns speed of currently active I2C bus in Hz 261 */ 262 263 unsigned int i2c_get_bus_speed(void); 264 265 /* 266 * i2c_reloc_fixup: 267 * 268 * Adjusts I2C pointers after U-Boot is relocated to DRAM 269 */ 270 void i2c_reloc_fixup(void); 271 #if defined(CONFIG_SYS_I2C_SOFT) 272 void i2c_soft_init(void); 273 void i2c_soft_active(void); 274 void i2c_soft_tristate(void); 275 int i2c_soft_read(void); 276 void i2c_soft_sda(int bit); 277 void i2c_soft_scl(int bit); 278 void i2c_soft_delay(void); 279 #endif 280 #else 281 282 /* 283 * Probe the given I2C chip address. Returns 0 if a chip responded, 284 * not 0 on failure. 285 */ 286 int i2c_probe(uchar chip); 287 288 /* 289 * Read/Write interface: 290 * chip: I2C chip address, range 0..127 291 * addr: Memory (register) address within the chip 292 * alen: Number of bytes to use for addr (typically 1, 2 for larger 293 * memories, 0 for register type devices with only one 294 * register) 295 * buffer: Where to read/write the data 296 * len: How many bytes to read/write 297 * 298 * Returns: 0 on success, not 0 on failure 299 */ 300 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 301 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 302 303 /* 304 * Utility routines to read/write registers. 305 */ 306 static inline u8 i2c_reg_read(u8 addr, u8 reg) 307 { 308 u8 buf; 309 310 #ifdef CONFIG_8xx 311 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 312 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 313 #endif 314 315 #ifdef DEBUG 316 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 317 #endif 318 319 i2c_read(addr, reg, 1, &buf, 1); 320 321 return buf; 322 } 323 324 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 325 { 326 #ifdef CONFIG_8xx 327 /* MPC8xx needs this. Maybe one day we can get rid of it. */ 328 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 329 #endif 330 331 #ifdef DEBUG 332 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 333 __func__, addr, reg, val); 334 #endif 335 336 i2c_write(addr, reg, 1, &val, 1); 337 } 338 339 /* 340 * Functions for setting the current I2C bus and its speed 341 */ 342 343 /* 344 * i2c_set_bus_num: 345 * 346 * Change the active I2C bus. Subsequent read/write calls will 347 * go to this one. 348 * 349 * bus - bus index, zero based 350 * 351 * Returns: 0 on success, not 0 on failure 352 * 353 */ 354 int i2c_set_bus_num(unsigned int bus); 355 356 /* 357 * i2c_get_bus_num: 358 * 359 * Returns index of currently active I2C bus. Zero-based. 360 */ 361 362 unsigned int i2c_get_bus_num(void); 363 364 /* 365 * i2c_set_bus_speed: 366 * 367 * Change the speed of the active I2C bus 368 * 369 * speed - bus speed in Hz 370 * 371 * Returns: 0 on success, not 0 on failure 372 * 373 */ 374 int i2c_set_bus_speed(unsigned int); 375 376 /* 377 * i2c_get_bus_speed: 378 * 379 * Returns speed of currently active I2C bus in Hz 380 */ 381 382 unsigned int i2c_get_bus_speed(void); 383 #endif /* CONFIG_SYS_I2C */ 384 385 /* 386 * only for backwardcompatibility, should go away if we switched 387 * completely to new multibus support. 388 */ 389 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 390 # if !defined(CONFIG_SYS_MAX_I2C_BUS) 391 # define CONFIG_SYS_MAX_I2C_BUS 2 392 # endif 393 # define I2C_MULTI_BUS 1 394 #else 395 # define CONFIG_SYS_MAX_I2C_BUS 1 396 # define I2C_MULTI_BUS 0 397 #endif 398 399 /* NOTE: These two functions MUST be always_inline to avoid code growth! */ 400 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); 401 static inline unsigned int I2C_GET_BUS(void) 402 { 403 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; 404 } 405 406 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); 407 static inline void I2C_SET_BUS(unsigned int bus) 408 { 409 if (I2C_MULTI_BUS) 410 i2c_set_bus_num(bus); 411 } 412 413 /* Multi I2C definitions */ 414 enum { 415 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, 416 I2C_8, I2C_9, I2C_10, 417 }; 418 419 /* Multi I2C busses handling */ 420 #ifdef CONFIG_SOFT_I2C_MULTI_BUS 421 extern int get_multi_scl_pin(void); 422 extern int get_multi_sda_pin(void); 423 extern int multi_i2c_init(void); 424 #endif 425 426 /** 427 * Get FDT values for i2c bus. 428 * 429 * @param blob Device tree blbo 430 * @return the number of I2C bus 431 */ 432 void board_i2c_init(const void *blob); 433 434 /** 435 * Find the I2C bus number by given a FDT I2C node. 436 * 437 * @param blob Device tree blbo 438 * @param node FDT I2C node to find 439 * @return the number of I2C bus (zero based), or -1 on error 440 */ 441 int i2c_get_bus_num_fdt(int node); 442 443 /** 444 * Reset the I2C bus represented by the given a FDT I2C node. 445 * 446 * @param blob Device tree blbo 447 * @param node FDT I2C node to find 448 * @return 0 if port was reset, -1 if not found 449 */ 450 int i2c_reset_port_fdt(const void *blob, int node); 451 #endif /* _I2C_H_ */ 452