xref: /openbmc/u-boot/include/i2c.h (revision 0a61ee88)
1  /*
2   * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3   * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4   * Changes for multibus/multiadapter I2C support.
5   *
6   * (C) Copyright 2001
7   * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
8   *
9   * SPDX-License-Identifier:	GPL-2.0+
10   *
11   * The original I2C interface was
12   *   (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13   *   AIRVENT SAM s.p.a - RIMINI(ITALY)
14   * but has been changed substantially.
15   */
16  
17  #ifndef _I2C_H_
18  #define _I2C_H_
19  
20  /*
21   * For now there are essentially two parts to this file - driver model
22   * here at the top, and the older code below (with CONFIG_SYS_I2C being
23   * most recent). The plan is to migrate everything to driver model.
24   * The driver model structures and API are separate as they are different
25   * enough as to be incompatible for compilation purposes.
26   */
27  
28  enum dm_i2c_chip_flags {
29  	DM_I2C_CHIP_10BIT	= 1 << 0, /* Use 10-bit addressing */
30  	DM_I2C_CHIP_RD_ADDRESS	= 1 << 1, /* Send address for each read byte */
31  	DM_I2C_CHIP_WR_ADDRESS	= 1 << 2, /* Send address for each write byte */
32  };
33  
34  struct udevice;
35  /**
36   * struct dm_i2c_chip - information about an i2c chip
37   *
38   * An I2C chip is a device on the I2C bus. It sits at a particular address
39   * and normally supports 7-bit or 10-bit addressing.
40   *
41   * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
42   * the chip to examine.
43   *
44   * @chip_addr:	Chip address on bus
45   * @offset_len: Length of offset in bytes. A single byte offset can
46   *		represent up to 256 bytes. A value larger than 1 may be
47   *		needed for larger devices.
48   * @flags:	Flags for this chip (dm_i2c_chip_flags)
49   * @emul: Emulator for this chip address (only used for emulation)
50   */
51  struct dm_i2c_chip {
52  	uint chip_addr;
53  	uint offset_len;
54  	uint flags;
55  #ifdef CONFIG_SANDBOX
56  	struct udevice *emul;
57  	bool test_mode;
58  #endif
59  };
60  
61  /**
62   * struct dm_i2c_bus- information about an i2c bus
63   *
64   * An I2C bus contains 0 or more chips on it, each at its own address. The
65   * bus can operate at different speeds (measured in Hz, typically 100KHz
66   * or 400KHz).
67   *
68   * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
69   * I2C bus udevice.
70   *
71   * @speed_hz: Bus speed in hertz (typically 100000)
72   */
73  struct dm_i2c_bus {
74  	int speed_hz;
75  };
76  
77  /*
78   * Not all of these flags are implemented in the U-Boot API
79   */
80  enum dm_i2c_msg_flags {
81  	I2C_M_TEN		= 0x0010, /* ten-bit chip address */
82  	I2C_M_RD		= 0x0001, /* read data, from slave to master */
83  	I2C_M_STOP		= 0x8000, /* send stop after this message */
84  	I2C_M_NOSTART		= 0x4000, /* no start before this message */
85  	I2C_M_REV_DIR_ADDR	= 0x2000, /* invert polarity of R/W bit */
86  	I2C_M_IGNORE_NAK	= 0x1000, /* continue after NAK */
87  	I2C_M_NO_RD_ACK		= 0x0800, /* skip the Ack bit on reads */
88  	I2C_M_RECV_LEN		= 0x0400, /* length is first received byte */
89  };
90  
91  /**
92   * struct i2c_msg - an I2C message
93   *
94   * @addr:	Slave address
95   * @flags:	Flags (see enum dm_i2c_msg_flags)
96   * @len:	Length of buffer in bytes, may be 0 for a probe
97   * @buf:	Buffer to send/receive, or NULL if no data
98   */
99  struct i2c_msg {
100  	uint addr;
101  	uint flags;
102  	uint len;
103  	u8 *buf;
104  };
105  
106  /**
107   * struct i2c_msg_list - a list of I2C messages
108   *
109   * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
110   * appropriate in U-Boot.
111   *
112   * @msg:	Pointer to i2c_msg array
113   * @nmsgs:	Number of elements in the array
114   */
115  struct i2c_msg_list {
116  	struct i2c_msg *msgs;
117  	uint nmsgs;
118  };
119  
120  /**
121   * dm_i2c_read() - read bytes from an I2C chip
122   *
123   * To obtain an I2C device (called a 'chip') given the I2C bus address you
124   * can use i2c_get_chip(). To obtain a bus by bus number use
125   * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
126   *
127   * To set the address length of a devce use i2c_set_addr_len(). It
128   * defaults to 1.
129   *
130   * @dev:	Chip to read from
131   * @offset:	Offset within chip to start reading
132   * @buffer:	Place to put data
133   * @len:	Number of bytes to read
134   *
135   * @return 0 on success, -ve on failure
136   */
137  int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
138  
139  /**
140   * dm_i2c_write() - write bytes to an I2C chip
141   *
142   * See notes for dm_i2c_read() above.
143   *
144   * @dev:	Chip to write to
145   * @offset:	Offset within chip to start writing
146   * @buffer:	Buffer containing data to write
147   * @len:	Number of bytes to write
148   *
149   * @return 0 on success, -ve on failure
150   */
151  int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
152  		 int len);
153  
154  /**
155   * dm_i2c_probe() - probe a particular chip address
156   *
157   * This can be useful to check for the existence of a chip on the bus.
158   * It is typically implemented by writing the chip address to the bus
159   * and checking that the chip replies with an ACK.
160   *
161   * @bus:	Bus to probe
162   * @chip_addr:	7-bit address to probe (10-bit and others are not supported)
163   * @chip_flags:	Flags for the probe (see enum dm_i2c_chip_flags)
164   * @devp:	Returns the device found, or NULL if none
165   * @return 0 if a chip was found at that address, -ve if not
166   */
167  int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
168  		 struct udevice **devp);
169  
170  /**
171   * dm_i2c_reg_read() - Read a value from an I2C register
172   *
173   * This reads a single value from the given address in an I2C chip
174   *
175   * @dev:	Device to use for transfer
176   * @addr:	Address to read from
177   * @return value read, or -ve on error
178   */
179  int dm_i2c_reg_read(struct udevice *dev, uint offset);
180  
181  /**
182   * dm_i2c_reg_write() - Write a value to an I2C register
183   *
184   * This writes a single value to the given address in an I2C chip
185   *
186   * @dev:	Device to use for transfer
187   * @addr:	Address to write to
188   * @val:	Value to write (normally a byte)
189   * @return 0 on success, -ve on error
190   */
191  int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
192  
193  /**
194   * dm_i2c_xfer() - Transfer messages over I2C
195   *
196   * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
197   * instead.
198   *
199   * @dev:	Device to use for transfer
200   * @msg:	List of messages to transfer
201   * @nmsgs:	Number of messages to transfer
202   * @return 0 on success, -ve on error
203   */
204  int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
205  
206  /**
207   * dm_i2c_set_bus_speed() - set the speed of a bus
208   *
209   * @bus:	Bus to adjust
210   * @speed:	Requested speed in Hz
211   * @return 0 if OK, -EINVAL for invalid values
212   */
213  int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
214  
215  /**
216   * dm_i2c_get_bus_speed() - get the speed of a bus
217   *
218   * @bus:	Bus to check
219   * @return speed of selected I2C bus in Hz, -ve on error
220   */
221  int dm_i2c_get_bus_speed(struct udevice *bus);
222  
223  /**
224   * i2c_set_chip_flags() - set flags for a chip
225   *
226   * Typically addresses are 7 bits, but for 10-bit addresses you should set
227   * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
228   *
229   * @dev:	Chip to adjust
230   * @flags:	New flags
231   * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
232   */
233  int i2c_set_chip_flags(struct udevice *dev, uint flags);
234  
235  /**
236   * i2c_get_chip_flags() - get flags for a chip
237   *
238   * @dev:	Chip to check
239   * @flagsp:	Place to put flags
240   * @return 0 if OK, other -ve value on error
241   */
242  int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
243  
244  /**
245   * i2c_set_offset_len() - set the offset length for a chip
246   *
247   * The offset used to access a chip may be up to 4 bytes long. Typically it
248   * is only 1 byte, which is enough for chips with 256 bytes of memory or
249   * registers. The default value is 1, but you can call this function to
250   * change it.
251   *
252   * @offset_len:	New offset length value (typically 1 or 2)
253   */
254  int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
255  
256  /**
257   * i2c_get_offset_len() - get the offset length for a chip
258   *
259   * @return:	Current offset length value (typically 1 or 2)
260   */
261  int i2c_get_chip_offset_len(struct udevice *dev);
262  
263  /**
264   * i2c_deblock() - recover a bus that is in an unknown state
265   *
266   * See the deblock() method in 'struct dm_i2c_ops' for full information
267   *
268   * @bus:	Bus to recover
269   * @return 0 if OK, -ve on error
270   */
271  int i2c_deblock(struct udevice *bus);
272  
273  #ifdef CONFIG_DM_I2C_COMPAT
274  /**
275   * i2c_probe() - Compatibility function for driver model
276   *
277   * Calls dm_i2c_probe() on the current bus
278   */
279  int i2c_probe(uint8_t chip_addr);
280  
281  /**
282   * i2c_read() - Compatibility function for driver model
283   *
284   * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
285   * set to @addr. @alen must match the current setting for the device.
286   */
287  int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
288  	     int len);
289  
290  /**
291   * i2c_write() - Compatibility function for driver model
292   *
293   * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
294   * set to @addr. @alen must match the current setting for the device.
295   */
296  int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
297  	      int len);
298  
299  /**
300   * i2c_get_bus_num_fdt() - Compatibility function for driver model
301   *
302   * @return the bus number associated with the given device tree node
303   */
304  int i2c_get_bus_num_fdt(int node);
305  
306  /**
307   * i2c_get_bus_num() - Compatibility function for driver model
308   *
309   * @return the 'current' bus number
310   */
311  unsigned int i2c_get_bus_num(void);
312  
313  /**
314   * i2c_set_bus_num() - Compatibility function for driver model
315   *
316   * Sets the 'current' bus
317   */
318  int i2c_set_bus_num(unsigned int bus);
319  
320  static inline void I2C_SET_BUS(unsigned int bus)
321  {
322  	i2c_set_bus_num(bus);
323  }
324  
325  static inline unsigned int I2C_GET_BUS(void)
326  {
327  	return i2c_get_bus_num();
328  }
329  
330  /**
331   * i2c_init() - Compatibility function for driver model
332   *
333   * This function does nothing.
334   */
335  void i2c_init(int speed, int slaveaddr);
336  
337  /**
338   * board_i2c_init() - Compatibility function for driver model
339   *
340   * @param blob  Device tree blbo
341   * @return the number of I2C bus
342   */
343  void board_i2c_init(const void *blob);
344  
345  /*
346   * Compatibility functions for driver model.
347   */
348  uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
349  void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
350  
351  #endif
352  
353  /**
354   * struct dm_i2c_ops - driver operations for I2C uclass
355   *
356   * Drivers should support these operations unless otherwise noted. These
357   * operations are intended to be used by uclass code, not directly from
358   * other code.
359   */
360  struct dm_i2c_ops {
361  	/**
362  	 * xfer() - transfer a list of I2C messages
363  	 *
364  	 * @bus:	Bus to read from
365  	 * @msg:	List of messages to transfer
366  	 * @nmsgs:	Number of messages in the list
367  	 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
368  	 *	-ECOMM if the speed cannot be supported, -EPROTO if the chip
369  	 *	flags cannot be supported, other -ve value on some other error
370  	 */
371  	int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
372  
373  	/**
374  	 * probe_chip() - probe for the presense of a chip address
375  	 *
376  	 * This function is optional. If omitted, the uclass will send a zero
377  	 * length message instead.
378  	 *
379  	 * @bus:	Bus to probe
380  	 * @chip_addr:	Chip address to probe
381  	 * @chip_flags:	Probe flags (enum dm_i2c_chip_flags)
382  	 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
383  	 * to default probem other -ve value on error
384  	 */
385  	int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
386  
387  	/**
388  	 * set_bus_speed() - set the speed of a bus (optional)
389  	 *
390  	 * The bus speed value will be updated by the uclass if this function
391  	 * does not return an error. This method is optional - if it is not
392  	 * provided then the driver can read the speed from
393  	 * dev_get_uclass_priv(bus)->speed_hz
394  	 *
395  	 * @bus:	Bus to adjust
396  	 * @speed:	Requested speed in Hz
397  	 * @return 0 if OK, -EINVAL for invalid values
398  	 */
399  	int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
400  
401  	/**
402  	 * get_bus_speed() - get the speed of a bus (optional)
403  	 *
404  	 * Normally this can be provided by the uclass, but if you want your
405  	 * driver to check the bus speed by looking at the hardware, you can
406  	 * implement that here. This method is optional. This method would
407  	 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
408  	 *
409  	 * @bus:	Bus to check
410  	 * @return speed of selected I2C bus in Hz, -ve on error
411  	 */
412  	int (*get_bus_speed)(struct udevice *bus);
413  
414  	/**
415  	 * set_flags() - set the flags for a chip (optional)
416  	 *
417  	 * This is generally implemented by the uclass, but drivers can
418  	 * check the value to ensure that unsupported options are not used.
419  	 * This method is optional. If provided, this method will always be
420  	 * called when the flags change.
421  	 *
422  	 * @dev:	Chip to adjust
423  	 * @flags:	New flags value
424  	 * @return 0 if OK, -EINVAL if value is unsupported
425  	 */
426  	int (*set_flags)(struct udevice *dev, uint flags);
427  
428  	/**
429  	 * deblock() - recover a bus that is in an unknown state
430  	 *
431  	 * I2C is a synchronous protocol and resets of the processor in the
432  	 * middle of an access can block the I2C Bus until a powerdown of
433  	 * the full unit is done. This is because slaves can be stuck
434  	 * waiting for addition bus transitions for a transaction that will
435  	 * never complete. Resetting the I2C master does not help. The only
436  	 * way is to force the bus through a series of transitions to make
437  	 * sure that all slaves are done with the transaction. This method
438  	 * performs this 'deblocking' if support by the driver.
439  	 *
440  	 * This method is optional.
441  	 */
442  	int (*deblock)(struct udevice *bus);
443  };
444  
445  #define i2c_get_ops(dev)	((struct dm_i2c_ops *)(dev)->driver->ops)
446  
447  /**
448   * struct i2c_mux_ops - operations for an I2C mux
449   *
450   * The current mux state is expected to be stored in the mux itself since
451   * it is the only thing that knows how to make things work. The mux can
452   * record the current state and then avoid switching unless it is necessary.
453   * So select() can be skipped if the mux is already in the correct state.
454   * Also deselect() can be made a nop if required.
455   */
456  struct i2c_mux_ops {
457  	/**
458  	 * select() - select one of of I2C buses attached to a mux
459  	 *
460  	 * This will be called when there is no bus currently selected by the
461  	 * mux. This method does not need to deselect the old bus since
462  	 * deselect() will be already have been called if necessary.
463  	 *
464  	 * @mux:	Mux device
465  	 * @bus:	I2C bus to select
466  	 * @channel:	Channel number correponding to the bus to select
467  	 * @return 0 if OK, -ve on error
468  	 */
469  	int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
470  
471  	/**
472  	 * deselect() - select one of of I2C buses attached to a mux
473  	 *
474  	 * This is used to deselect the currently selected I2C bus.
475  	 *
476  	 * @mux:	Mux device
477  	 * @bus:	I2C bus to deselect
478  	 * @channel:	Channel number correponding to the bus to deselect
479  	 * @return 0 if OK, -ve on error
480  	 */
481  	int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
482  };
483  
484  #define i2c_mux_get_ops(dev)	((struct i2c_mux_ops *)(dev)->driver->ops)
485  
486  /**
487   * i2c_get_chip() - get a device to use to access a chip on a bus
488   *
489   * This returns the device for the given chip address. The device can then
490   * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
491   *
492   * @bus:	Bus to examine
493   * @chip_addr:	Chip address for the new device
494   * @offset_len:	Length of a register offset in bytes (normally 1)
495   * @devp:	Returns pointer to new device if found or -ENODEV if not
496   *		found
497   */
498  int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
499  		 struct udevice **devp);
500  
501  /**
502   * i2c_get_chip_for_busnum() - get a device to use to access a chip on
503   *			       a bus number
504   *
505   * This returns the device for the given chip address on a particular bus
506   * number.
507   *
508   * @busnum:	Bus number to examine
509   * @chip_addr:	Chip address for the new device
510   * @offset_len:	Length of a register offset in bytes (normally 1)
511   * @devp:	Returns pointer to new device if found or -ENODEV if not
512   *		found
513   */
514  int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
515  			    struct udevice **devp);
516  
517  /**
518   * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
519   *
520   * This decodes the chip address from a device tree node and puts it into
521   * its dm_i2c_chip structure. This should be called in your driver's
522   * ofdata_to_platdata() method.
523   *
524   * @blob:	Device tree blob
525   * @node:	Node offset to read from
526   * @spi:	Place to put the decoded information
527   */
528  int i2c_chip_ofdata_to_platdata(const void *blob, int node,
529  				struct dm_i2c_chip *chip);
530  
531  /**
532   * i2c_dump_msgs() - Dump a list of I2C messages
533   *
534   * This may be useful for debugging.
535   *
536   * @msg:	Message list to dump
537   * @nmsgs:	Number of messages
538   */
539  void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
540  
541  #ifndef CONFIG_DM_I2C
542  
543  /*
544   * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
545   *
546   * The implementation MUST NOT use static or global variables if the
547   * I2C routines are used to read SDRAM configuration information
548   * because this is done before the memories are initialized. Limited
549   * use of stack-based variables are OK (the initial stack size is
550   * limited).
551   *
552   * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
553   */
554  
555  /*
556   * Configuration items.
557   */
558  #define I2C_RXTX_LEN	128	/* maximum tx/rx buffer length */
559  
560  #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
561  /* no muxes used bus = i2c adapters */
562  #define CONFIG_SYS_I2C_DIRECT_BUS	1
563  #define CONFIG_SYS_I2C_MAX_HOPS		0
564  #define CONFIG_SYS_NUM_I2C_BUSES	ll_entry_count(struct i2c_adapter, i2c)
565  #else
566  /* we use i2c muxes */
567  #undef CONFIG_SYS_I2C_DIRECT_BUS
568  #endif
569  
570  /* define the I2C bus number for RTC and DTT if not already done */
571  #if !defined(CONFIG_SYS_RTC_BUS_NUM)
572  #define CONFIG_SYS_RTC_BUS_NUM		0
573  #endif
574  #if !defined(CONFIG_SYS_DTT_BUS_NUM)
575  #define CONFIG_SYS_DTT_BUS_NUM		0
576  #endif
577  #if !defined(CONFIG_SYS_SPD_BUS_NUM)
578  #define CONFIG_SYS_SPD_BUS_NUM		0
579  #endif
580  
581  struct i2c_adapter {
582  	void		(*init)(struct i2c_adapter *adap, int speed,
583  				int slaveaddr);
584  	int		(*probe)(struct i2c_adapter *adap, uint8_t chip);
585  	int		(*read)(struct i2c_adapter *adap, uint8_t chip,
586  				uint addr, int alen, uint8_t *buffer,
587  				int len);
588  	int		(*write)(struct i2c_adapter *adap, uint8_t chip,
589  				uint addr, int alen, uint8_t *buffer,
590  				int len);
591  	uint		(*set_bus_speed)(struct i2c_adapter *adap,
592  				uint speed);
593  	int		speed;
594  	int		waitdelay;
595  	int		slaveaddr;
596  	int		init_done;
597  	int		hwadapnr;
598  	char		*name;
599  };
600  
601  #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
602  		_set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
603  	{ \
604  		.init		=	_init, \
605  		.probe		=	_probe, \
606  		.read		=	_read, \
607  		.write		=	_write, \
608  		.set_bus_speed	=	_set_speed, \
609  		.speed		=	_speed, \
610  		.slaveaddr	=	_slaveaddr, \
611  		.init_done	=	0, \
612  		.hwadapnr	=	_hwadapnr, \
613  		.name		=	#_name \
614  };
615  
616  #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
617  			_set_speed, _speed, _slaveaddr, _hwadapnr) \
618  	ll_entry_declare(struct i2c_adapter, _name, i2c) = \
619  	U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
620  		 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
621  
622  struct i2c_adapter *i2c_get_adapter(int index);
623  
624  #ifndef CONFIG_SYS_I2C_DIRECT_BUS
625  struct i2c_mux {
626  	int	id;
627  	char	name[16];
628  };
629  
630  struct i2c_next_hop {
631  	struct i2c_mux		mux;
632  	uint8_t		chip;
633  	uint8_t		channel;
634  };
635  
636  struct i2c_bus_hose {
637  	int	adapter;
638  	struct i2c_next_hop	next_hop[CONFIG_SYS_I2C_MAX_HOPS];
639  };
640  #define I2C_NULL_HOP	{{-1, ""}, 0, 0}
641  extern struct i2c_bus_hose	i2c_bus[];
642  
643  #define I2C_ADAPTER(bus)	i2c_bus[bus].adapter
644  #else
645  #define I2C_ADAPTER(bus)	bus
646  #endif
647  #define	I2C_BUS			gd->cur_i2c_bus
648  
649  #define	I2C_ADAP_NR(bus)	i2c_get_adapter(I2C_ADAPTER(bus))
650  #define	I2C_ADAP		I2C_ADAP_NR(gd->cur_i2c_bus)
651  #define I2C_ADAP_HWNR		(I2C_ADAP->hwadapnr)
652  
653  #ifndef CONFIG_SYS_I2C_DIRECT_BUS
654  #define I2C_MUX_PCA9540_ID	1
655  #define I2C_MUX_PCA9540		{I2C_MUX_PCA9540_ID, "PCA9540B"}
656  #define I2C_MUX_PCA9542_ID	2
657  #define I2C_MUX_PCA9542		{I2C_MUX_PCA9542_ID, "PCA9542A"}
658  #define I2C_MUX_PCA9544_ID	3
659  #define I2C_MUX_PCA9544		{I2C_MUX_PCA9544_ID, "PCA9544A"}
660  #define I2C_MUX_PCA9547_ID	4
661  #define I2C_MUX_PCA9547		{I2C_MUX_PCA9547_ID, "PCA9547A"}
662  #define I2C_MUX_PCA9548_ID	5
663  #define I2C_MUX_PCA9548		{I2C_MUX_PCA9548_ID, "PCA9548"}
664  #endif
665  
666  #ifndef I2C_SOFT_DECLARATIONS
667  # if defined(CONFIG_MPC8260)
668  #  define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
669  # elif defined(CONFIG_8xx)
670  #  define I2C_SOFT_DECLARATIONS	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
671  
672  # elif (defined(CONFIG_AT91RM9200) || \
673  	defined(CONFIG_AT91SAM9260) ||  defined(CONFIG_AT91SAM9261) || \
674  	defined(CONFIG_AT91SAM9263))
675  #  define I2C_SOFT_DECLARATIONS	at91_pio_t *pio	= (at91_pio_t *) ATMEL_BASE_PIOA;
676  # else
677  #  define I2C_SOFT_DECLARATIONS
678  # endif
679  #endif
680  
681  #ifdef CONFIG_8xx
682  /* Set default value for the I2C bus speed on 8xx. In the
683   * future, we'll define these in all 8xx board config files.
684   */
685  #ifndef	CONFIG_SYS_I2C_SPEED
686  #define	CONFIG_SYS_I2C_SPEED	50000
687  #endif
688  #endif
689  
690  /*
691   * Many boards/controllers/drivers don't support an I2C slave interface so
692   * provide a default slave address for them for use in common code.  A real
693   * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
694   * support a slave interface.
695   */
696  #ifndef	CONFIG_SYS_I2C_SLAVE
697  #define	CONFIG_SYS_I2C_SLAVE	0xfe
698  #endif
699  
700  /*
701   * Initialization, must be called once on start up, may be called
702   * repeatedly to change the speed and slave addresses.
703   */
704  void i2c_init(int speed, int slaveaddr);
705  void i2c_init_board(void);
706  #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
707  void i2c_board_late_init(void);
708  #endif
709  
710  #ifdef CONFIG_SYS_I2C
711  /*
712   * i2c_get_bus_num:
713   *
714   *  Returns index of currently active I2C bus.  Zero-based.
715   */
716  unsigned int i2c_get_bus_num(void);
717  
718  /*
719   * i2c_set_bus_num:
720   *
721   *  Change the active I2C bus.  Subsequent read/write calls will
722   *  go to this one.
723   *
724   *	bus - bus index, zero based
725   *
726   *	Returns: 0 on success, not 0 on failure
727   *
728   */
729  int i2c_set_bus_num(unsigned int bus);
730  
731  /*
732   * i2c_init_all():
733   *
734   * Initializes all I2C adapters in the system. All i2c_adap structures must
735   * be initialized beforehead with function pointers and data, including
736   * speed and slaveaddr. Returns 0 on success, non-0 on failure.
737   */
738  void i2c_init_all(void);
739  
740  /*
741   * Probe the given I2C chip address.  Returns 0 if a chip responded,
742   * not 0 on failure.
743   */
744  int i2c_probe(uint8_t chip);
745  
746  /*
747   * Read/Write interface:
748   *   chip:    I2C chip address, range 0..127
749   *   addr:    Memory (register) address within the chip
750   *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
751   *              memories, 0 for register type devices with only one
752   *              register)
753   *   buffer:  Where to read/write the data
754   *   len:     How many bytes to read/write
755   *
756   *   Returns: 0 on success, not 0 on failure
757   */
758  int i2c_read(uint8_t chip, unsigned int addr, int alen,
759  				uint8_t *buffer, int len);
760  
761  int i2c_write(uint8_t chip, unsigned int addr, int alen,
762  				uint8_t *buffer, int len);
763  
764  /*
765   * Utility routines to read/write registers.
766   */
767  uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
768  
769  void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
770  
771  /*
772   * i2c_set_bus_speed:
773   *
774   *  Change the speed of the active I2C bus
775   *
776   *	speed - bus speed in Hz
777   *
778   *	Returns: new bus speed
779   *
780   */
781  unsigned int i2c_set_bus_speed(unsigned int speed);
782  
783  /*
784   * i2c_get_bus_speed:
785   *
786   *  Returns speed of currently active I2C bus in Hz
787   */
788  
789  unsigned int i2c_get_bus_speed(void);
790  
791  /*
792   * i2c_reloc_fixup:
793   *
794   * Adjusts I2C pointers after U-Boot is relocated to DRAM
795   */
796  void i2c_reloc_fixup(void);
797  #if defined(CONFIG_SYS_I2C_SOFT)
798  void i2c_soft_init(void);
799  void i2c_soft_active(void);
800  void i2c_soft_tristate(void);
801  int i2c_soft_read(void);
802  void i2c_soft_sda(int bit);
803  void i2c_soft_scl(int bit);
804  void i2c_soft_delay(void);
805  #endif
806  #else
807  
808  /*
809   * Probe the given I2C chip address.  Returns 0 if a chip responded,
810   * not 0 on failure.
811   */
812  int i2c_probe(uchar chip);
813  
814  /*
815   * Read/Write interface:
816   *   chip:    I2C chip address, range 0..127
817   *   addr:    Memory (register) address within the chip
818   *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
819   *              memories, 0 for register type devices with only one
820   *              register)
821   *   buffer:  Where to read/write the data
822   *   len:     How many bytes to read/write
823   *
824   *   Returns: 0 on success, not 0 on failure
825   */
826  int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
827  int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
828  
829  /*
830   * Utility routines to read/write registers.
831   */
832  static inline u8 i2c_reg_read(u8 addr, u8 reg)
833  {
834  	u8 buf;
835  
836  #ifdef CONFIG_8xx
837  	/* MPC8xx needs this.  Maybe one day we can get rid of it. */
838  	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
839  #endif
840  
841  #ifdef DEBUG
842  	printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
843  #endif
844  
845  	i2c_read(addr, reg, 1, &buf, 1);
846  
847  	return buf;
848  }
849  
850  static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
851  {
852  #ifdef CONFIG_8xx
853  	/* MPC8xx needs this.  Maybe one day we can get rid of it. */
854  	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
855  #endif
856  
857  #ifdef DEBUG
858  	printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
859  	       __func__, addr, reg, val);
860  #endif
861  
862  	i2c_write(addr, reg, 1, &val, 1);
863  }
864  
865  /*
866   * Functions for setting the current I2C bus and its speed
867   */
868  
869  /*
870   * i2c_set_bus_num:
871   *
872   *  Change the active I2C bus.  Subsequent read/write calls will
873   *  go to this one.
874   *
875   *	bus - bus index, zero based
876   *
877   *	Returns: 0 on success, not 0 on failure
878   *
879   */
880  int i2c_set_bus_num(unsigned int bus);
881  
882  /*
883   * i2c_get_bus_num:
884   *
885   *  Returns index of currently active I2C bus.  Zero-based.
886   */
887  
888  unsigned int i2c_get_bus_num(void);
889  
890  /*
891   * i2c_set_bus_speed:
892   *
893   *  Change the speed of the active I2C bus
894   *
895   *	speed - bus speed in Hz
896   *
897   *	Returns: 0 on success, not 0 on failure
898   *
899   */
900  int i2c_set_bus_speed(unsigned int);
901  
902  /*
903   * i2c_get_bus_speed:
904   *
905   *  Returns speed of currently active I2C bus in Hz
906   */
907  
908  unsigned int i2c_get_bus_speed(void);
909  #endif /* CONFIG_SYS_I2C */
910  
911  /*
912   * only for backwardcompatibility, should go away if we switched
913   * completely to new multibus support.
914   */
915  #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
916  # if !defined(CONFIG_SYS_MAX_I2C_BUS)
917  #  define CONFIG_SYS_MAX_I2C_BUS		2
918  # endif
919  # define I2C_MULTI_BUS				1
920  #else
921  # define CONFIG_SYS_MAX_I2C_BUS		1
922  # define I2C_MULTI_BUS				0
923  #endif
924  
925  /* NOTE: These two functions MUST be always_inline to avoid code growth! */
926  static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
927  static inline unsigned int I2C_GET_BUS(void)
928  {
929  	return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
930  }
931  
932  static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
933  static inline void I2C_SET_BUS(unsigned int bus)
934  {
935  	if (I2C_MULTI_BUS)
936  		i2c_set_bus_num(bus);
937  }
938  
939  /* Multi I2C definitions */
940  enum {
941  	I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
942  	I2C_8, I2C_9, I2C_10,
943  };
944  
945  /* Multi I2C busses handling */
946  #ifdef CONFIG_SOFT_I2C_MULTI_BUS
947  extern int get_multi_scl_pin(void);
948  extern int get_multi_sda_pin(void);
949  extern int multi_i2c_init(void);
950  #endif
951  
952  /**
953   * Get FDT values for i2c bus.
954   *
955   * @param blob  Device tree blbo
956   * @return the number of I2C bus
957   */
958  void board_i2c_init(const void *blob);
959  
960  /**
961   * Find the I2C bus number by given a FDT I2C node.
962   *
963   * @param blob  Device tree blbo
964   * @param node  FDT I2C node to find
965   * @return the number of I2C bus (zero based), or -1 on error
966   */
967  int i2c_get_bus_num_fdt(int node);
968  
969  /**
970   * Reset the I2C bus represented by the given a FDT I2C node.
971   *
972   * @param blob  Device tree blbo
973   * @param node  FDT I2C node to find
974   * @return 0 if port was reset, -1 if not found
975   */
976  int i2c_reset_port_fdt(const void *blob, int node);
977  
978  #endif /* !CONFIG_DM_I2C */
979  
980  #endif	/* _I2C_H_ */
981